`reset
state <= 0;
end else begin
- if (!in_r && in_a) in_a <= 0;
+ `flush
+ if (!in_r_ && in_a) in_a <= 0;
if (out_r && out_a) out_r <= 0;
if (!out_r && !out_a && state==3) begin
out_d <= { 1'b0, temp };
end
== Test ==============================================================
-
// expected output
#expect 0x3c4bc6
#expect 0x1796d2