add software implementation of Button ship

[fleet.git] / ships / Debug.ship

diff --git a/ships/Debug.ship b/ships/Debug.ship
index 861e66c..f796446 100644 (file)
--- a/ships/Debug.ship
+++ b/ships/Debug.ship
@@ -32,7 +32,7 @@ ship.
 == Fleeterpreter ====================================================
 public void service() {
   if (box_in.dataReadyForShip())
-    ((Interpreter)getFleet()).debug(box_in.removeDataForShip());
+    ((Interpreter)getFleet()).debug(new BitVector(37).set(box_in.removeDataForShip()));
 }
 
 == FleetSim ==============================================================
@@ -63,14 +63,17 @@ public void service() {
   wire break;
   wire uart_cts;
   assign uart_cts = 0;
-  assign rst_out = rst_in || (force_reset!=0);
+  assign rst_out = rst_in || (force_reset!=0) /* || break */;
 
   // fst=3 means clock divider is 3+2=5 for a 50Mhz clock => 10Mhz
   // using a 33Mhz clock,
   //   33.333Mhz / 38400hz * 4 = 217.013 => 215+2,1 => 215,1
   // using a 100Mhz clock,
   //   100Mhz / 38400hz * 4 = 651.039 => 215+2,3 => 215,3
-  sasc_brg sasc_brg(clk, !rst_in, 215, 3, sio_ce, sio_ce_x4);
+  // using a 100Mhz clock, 115200baud
+  //   100Mhz / 115200hz * 4 = 217.013 => 215+2,1 => 215,1
+//  sasc_brg sasc_brg(clk, !rst_in, 215, 3, sio_ce, sio_ce_x4);
+  sasc_brg sasc_brg(clk, !rst_in, 215, 1, sio_ce, sio_ce_x4);
   sasc_top sasc_top(clk, !rst_in,
                     uart_in,
                     uart_out,
@@ -91,7 +94,7 @@ public void service() {
 
    // fpga -> host
    always @(posedge clk) begin
-     if (rst_in) begin
+     if (rst_in /* || break */) begin
        count_in    <= 0;
        count_out   <= 0;
        force_reset <= 0;
@@ -128,6 +131,11 @@ public void service() {
        data_to_fleet_read_enable <= 0;
        if (!data_to_fleet_empty && !data_to_fleet_read_enable) begin
 
+         // Note: if the switch fabric refuses to accept a new item,
+         // we can get deadlocked in a state where sending a reset
+         // code (2'b11) won't have any effect.  Probably need to go
+         // back to using the break signal.
+
            // command 0: data
          if (data_to_fleet[7:6] == 2'b00 && `out_empty) begin
            data_to_fleet_read_enable <= 1;