add dummy test for DRAM

[fleet.git] / ships / Fifo.ship

diff --git a/ships/Fifo.ship b/ships/Fifo.ship
index 8c96494..0a620b2 100644 (file)
--- a/ships/Fifo.ship
+++ b/ships/Fifo.ship
@@ -2,12 +2,22 @@ ship: Fifo
 
 == Ports ===========================================================
 data  in:   in
+
 data  out:  out
 
 == Constants ========================================================
+
 == TeX ==============================================================
+
+The {\tt Fifo} ship is a simple fifo.  Word-sized delivered to the {\tt
+in} port are enqueued into the fifo, and values which arrive at the
+end of the fifo are provided to the {\tt out} port.
+
+The internal capacity of the fifo is unspecified, but guaranteed to be
+at least 16 words.
+
 == Fleeterpreter ====================================================
-    private Queue<Integer> fifo = new LinkedList<Integer>();
+    private Queue<Long> fifo = new LinkedList<Long>();
     public void service() {
         if (box_in.dataReadyForShip()) {
             fifo.add(box_in.removeDataForShip());
@@ -17,8 +27,47 @@ data  out:  out
         }
     }
 
-== ArchSim ==============================================================
+== FleetSim ==============================================================
+
 == FPGA ==============================================================
 
+  input  [(`DATAWIDTH-1):0] in_d;
+  output [(`DATAWIDTH-1):0] out_d_;
+  input in_r;
+  output in_a_;
+  output out_r_;
+  input out_a;
+
+  fifo8x37 fifo8x37(clk, rst,
+                    in_r,  in_a_, in_d,
+                    out_r_, out_a, out_d_);
+
+
+== Test =================================================================
+// expected output
+#expect 9
+
+// ships required in order to run this code
+#ship debug        : Debug
+#ship fifo         : Fifo
+
+debug.in:   set ilc=*;  recv, deliver;
+fifo.in:
+  set word= 9;
+  deliver;
+  set ilc=63;
+  recv, deliver;
+  set ilc=37;
+  recv, deliver;
+
+fifo.out:
+  set ilc=63;
+  collect, send to fifo.in;
+  set ilc=36;
+  collect, send to fifo.in;
+  collect, send to debug.in;
+
+
+
 == Contributors =========================================================
 Adam Megacz <megacz@cs.berkeley.edu>