== TeX ==============================================================
-The {\tt Fifo} ship is a simple fifo. Values delivered to the {\tt
+The {\tt Fifo} ship is a simple fifo. Word-sized delivered to the {\tt
in} port are enqueued into the fifo, and values which arrive at the
end of the fifo are provided to the {\tt out} port.
== FleetSim ==============================================================
+== FPGA ==============================================================
+
+// not used
+
== Test =================================================================
// expected output
#expect 9
#ship debug : Debug
#ship fifo : Fifo
-debug.in: [*] take, deliver;
+debug.in: set ilc=*; recv, deliver;
fifo.in:
- literal 9;
+ set word= 9;
deliver;
- [100] take, deliver;
+ set ilc=63;
+ recv, deliver;
+ set ilc=37;
+ recv, deliver;
+
fifo.out:
- [99] take, sendto fifo.in;
- [1] take, sendto debug.in;
+ set ilc=63;
+ collect, send to fifo.in;
+ set ilc=36;
+ collect, send to fifo.in;
+ collect, send to debug.in;