ship: Iscratch
== Ports ===========================================================
-data in: write_addr
-data in: write_data
-token out: write_done
+data in: inWriteAddr
+data in: inWriteData
+token out: outWriteDone
-data in: cbd
+data in: inCBD
== Fleeterpreter ====================================================
}
public void service() {
- if (box_cbd.dataReadyForShip()) {
- int val = box_cbd.removeDataForShip();
- int addr = val >> 6;
- int size = val & 0x3f;
- dispatch(addr, size);
+ if (box_inCBD.dataReadyForShip()) {
+ long val = box_inCBD.removeDataForShip();
+ long addr = val >> 6;
+ long size = val & 0x3f;
+ dispatch((int)addr, (int)size);
}
- if (box_write_addr.dataReadyForShip() &&
- box_write_data.dataReadyForShip() &&
- box_write_done.readyForItemFromShip()) {
+ if (box_inWriteAddr.dataReadyForShip() &&
+ box_inWriteData.dataReadyForShip() &&
+ box_outWriteDone.readyForItemFromShip()) {
Interpreter f = (Interpreter)getFleet();
- f.writeMem(box_write_addr.removeDataForShip(),
- box_write_data.removeDataForShip());
- box_write_done.addTokenFromShip();
+ writeMem((int)box_inWriteAddr.removeDataForShip(),
+ box_inWriteData.removeDataForShip());
+ box_outWriteDone.addDataFromShip(0);
}
}
public void boot(byte[] instructions) {
Interpreter fleet = (Interpreter)getFleet();
- // load the iscratch and take note of the 0-address CBD
+ // load the iscratch and take note of the 0-address INCBD
long launch = 0;
for(int i=0; i<instructions.length; i+=6) {
long word = 0;
if (i==0) launch = word;
}
- // dispatch the 0-address CBD
+ // dispatch the 0-address INCBD
int base = (int)(launch >> 6);
base = base & ~(0xffffffff << 18);
int size = (int)launch;
== Constants ========================================================
== TeX ==============================================================
-== ArchSim ==============================================================
+== FleetSim ==============================================================
== FPGA ==============================================================
`include "macros.v"
`define BRAM_ADDR_WIDTH 14
end
2: begin
dhorn_full <= 1;
- `packet_data(dhorn_d) <= command[23:0];
+ `packet_data(dhorn_d) <= { {(`DATAWIDTH-24){command[23]}}, command[23:0] };
`packet_dest(dhorn_d) <= command[34:24];
end
3: begin
dhorn_full <= 1;
- `packet_data(dhorn_d) <= command[23:0] + current_instruction_read_from;
+ `packet_data(dhorn_d) <= { {(`DATAWIDTH-24){command[23]}}, command[23:0] } + current_instruction_read_from;
`packet_dest(dhorn_d) <= command[34:24];
end
endcase