comment in Memory.ship

[fleet.git] / ships / Lut3.ship

diff --git a/ships/Lut3.ship b/ships/Lut3.ship
index 5a0460b..e6bd469 100644 (file)
--- a/ships/Lut3.ship
+++ b/ships/Lut3.ship
@@ -66,7 +66,7 @@ is considered ``bit zero'').
 
   genvar i;
   generate
-    for(i=0; i<`DATAWIDTH; i=i+1) begin : OUT
+    for(i=0; i<`WORDWIDTH; i=i+1) begin : OUT
       assign out_d_[i] = lut[{in3_d[i], in2_d[i], in1_d[i]}];
     end
   endgenerate
@@ -77,19 +77,16 @@ is considered ``bit zero'').
     if (!rst) begin
       `reset
     end else begin
-      if (!in1_r && in1_a)     in1_a <= 0;
-      if (!in2_r && in2_a)     in2_a <= 0;
-      if (!in3_r && in3_a)     in3_a <= 0;
-      if (!inLut_r && inLut_a) inLut_a <= 0;
-      if (out_r && out_a) begin
-         in1_a <= 1;
-         in2_a <= 1;
-         in3_a <= 1;
-         inLut_a <= 1;
-         out_r <= 0;
+      `flush
+      `cleanup
+      if (`out_draining) begin
+         `drain_in1
+         `drain_in2
+         `drain_in3
+         `drain_inLut
       end
-      if (in1_r && !in1_a && in2_r && !in2_a && in3_r && !in3_a && inLut_r && !inLut_a && !out_r && !out_a) begin
-        out_r <= 1;
+      if (`in1_full && `in2_full && `in3_full && `inLut_full && `out_empty) begin
+         `fill_out
       end
     end
   end
@@ -355,7 +352,7 @@ is considered ``bit zero'').
 
 #ship debug        : Debug
 #ship lut          : Lut3
-#ship alu          : Alu2
+#ship alu          : Alu
 
 lut.in1:   set word= 85; set ilc=*;  deliver;
 lut.in2:   set word= 51; set ilc=*;  deliver;
@@ -367,7 +364,7 @@ alu.in2:
    set word= 1;
    set ilc=*;  deliver;
 alu.inOp:
-   set word= Alu2.inOp[ADD];
+   set word= Alu.inOp[ADD];
    set ilc=*;  deliver;
 alu.in1:
    set word= 0;