assign out_d_ = { out_w, out1 };
- // I use "blocking assignment" here in order to facilitate BRAM inferencea
+ // I use "blocking assignment" here in order to facilitate BRAM inference
always @(posedge clk) begin
write_flag = 0;
- if (!rst) begin
+ if (rst) begin
`reset
cursor = 0;
counter = 0;
end else begin
- `flush
`cleanup
if (counter!=0) begin