get rid of ChainControls
[fleet.git] / ships / Memory.ship
index 5ccced3..2d1d6f1 100644 (file)
@@ -105,55 +105,28 @@ sequence guarantee problem mentioned in the previous paragraph.
         }
         mem[addr] = val;
     }
-
-    private long stride = 0;
-    private long count = 0;
-    private long addr = 0;
-    private boolean writing = false;
-
     private Queue<Long> toDispatch = new LinkedList<Long>();
+    public void reset() {
+      super.reset();
+      mem = new long[0];
+      toDispatch.clear();
+    }
     public void service() {
-
         if (toDispatch.size() > 0) {
-            //if (!box_out.readyForDataFromShip()) return;
-            //box_out.addDataFromShip(toDispatch.remove());
-            getInterpreter().dispatch(getInterpreter().readInstruction(toDispatch.remove(), getDock("out")));
+            if (!box_out.readyForDataFromShip()) return;
+            box_out.addDataFromShip(toDispatch.remove());
         }
-
-        if (box_inCBD.dataReadyForShip() && box_out.readyForDataFromShip()) {
+        if (box_inCBD.dataReadyForShip()) {
             long val = box_inCBD.removeDataForShip();
-            long addr = val >> 6;
-            long size = val & 0x3f;
+            long addr = ((Interpreter)getFleet()).CBD_OFFSET.getval(val);
+            long size = ((Interpreter)getFleet()).CBD_SIZE.getval(val);
             for(int i=0; i<size; i++)
               toDispatch.add(readMem((int)(addr+i)));
-        }
-        if (count > 0) {
-            if (writing) {
-              if (box_inDataWrite.dataReadyForShip() && box_out.readyForDataFromShip()) {
-                 writeMem((int)addr, box_inDataWrite.removeDataForShip());
-                 box_out.addDataFromShip(0);
-                 count--;
-                 addr += stride;
-              }
-            } else {
-              if (box_out.readyForDataFromShip()) {
-                 box_out.addDataFromShip(readMem((int)addr));
-                 count--;
-                 addr += stride;
-              }
-            }
-
-        } else if (box_inAddrRead.dataReadyForShip()) {
-            addr = box_inAddrRead.removeDataForShip();
-            stride = 0;
-            count = 1;
-            writing = false;
-
-        } else if (box_inAddrWrite.dataReadyForShip()) {
-            addr = box_inAddrWrite.removeDataForShip();
-            stride = 0;
-            count = 1;
-            writing = true;
+        } else if (box_inAddrWrite.dataReadyForShip() && box_inDataWrite.dataReadyForShip() && box_out.readyForDataFromShip()) {
+            writeMem((int)box_inAddrWrite.removeDataForShip(), box_inDataWrite.removeDataForShip());
+            box_out.addDataFromShip(0,true);
+        } else if (box_inAddrRead.dataReadyForShip() && box_out.readyForDataFromShip()) {
+            box_out.addDataFromShip(readMem((int)box_inAddrRead.removeDataForShip()),false);
         }
     }
 
@@ -177,15 +150,15 @@ sequence guarantee problem mentioned in the previous paragraph.
 
   assign out_d_ = { out_w, out1 };
 
+  // I use "blocking assignment" here in order to facilitate BRAM inference
   always @(posedge clk) begin
     write_flag = 0;
 
-    if (!rst) begin
+    if (rst) begin
       `reset
       cursor      = 0;
       counter     = 0;
     end else begin
-      `flush
       `cleanup
 
       if (counter!=0) begin