use DATAWIDTH instead of INSTRUCTION_WIDTH in Memory.ship

[fleet.git] / ships / Memory.ship

diff --git a/ships/Memory.ship b/ships/Memory.ship
index f97347c..5395cb3 100644 (file)
--- a/ships/Memory.ship
+++ b/ships/Memory.ship
@@ -202,7 +202,7 @@ sequence guarantee problem mentioned in the previous paragraph.
       // assumes we never want a zero-length codebag
       if ( inCBD_r && !inCBD_a && !out_r && !out_a) begin
         if (!dispatching_cbd) begin
-          cursor          <= inCBD_d[(`INSTRUCTION_WIDTH-1):(`CODEBAG_SIZE_BITS)];
+          cursor          <= inCBD_d[(`DATAWIDTH-1):(`CODEBAG_SIZE_BITS)];
           counter         <= 0;
           dispatching_cbd <= 1;
         end