some_bram mybram(clk, rst, write_flag, in_addr, current_instruction_read_from, write_data, not_connected, ramread);
assign out_d_ = ramread;
- always @(posedge clk) begin
+ always @(posedge clk /*or negedge rst*/) begin
+
+ if (!rst) begin
+ ihorn_full <= 0;
+ dhorn_full <= 0;
+ command_valid <= 0;
+/*
+ preload_size <= 0;
+*/
+ launched <= 0;
+ command_valid_read <= 0;
+ write_flag <= 0;
+
+ dhorn_r <= 0;
+ ihorn_r <= 0;
+ out_r <= 0;
+
+ end else begin
write_flag <= 0;
end
end
end
+
+ end
+
end
end
endmodule