package edu.berkeley.fleet.fpga;
-import edu.berkeley.fleet.doc.*;
import edu.berkeley.fleet.api.*;
import java.util.*;
import java.io.*;
+import edu.berkeley.fleet.two.*;
+import static edu.berkeley.fleet.two.FleetTwoFleet.*;
+import static edu.berkeley.fleet.fpga.verilog.Verilog.*;
/** a ship, which belongs to a fleet and which may have many ports */
-public class FpgaShip extends Ship {
+public class FpgaShip extends FleetTwoShip {
+ private Module module;
+ private Module.InstantiatedModule instance;
+ private LinkedHashMap<String,FpgaDock> ports = new LinkedHashMap<String,FpgaDock>();
+ LinkedHashMap<String,Module.SourcePort> docklessPorts = new LinkedHashMap<String,Module.SourcePort>();
+
/** You should instantiate a bunch of Inboxes and Outboxes in your constructor */
- public FpgaShip(Fpga fleet, String name, String type, ShipDescription sd) {
- this.fleet = fleet; this.type = type;
- for(BenkoBoxDescription sdbb : sd) {
- FpgaBenkoBox sbb = new FpgaBenkoBox(sdbb.isInbox(), this, sdbb.getName());
- for(String port : sdbb) {
- if (port.equals("")) continue;
- sbb.addDestination(port);
+ public FpgaShip(Fpga fleet, ShipDescription sd) {
+ super(fleet, sd);
+ this.module = new Module(getType().toLowerCase());
+ this.instance = new Module.InstantiatedModule(fleet.getVerilogModule(), module);
+ for(DockDescription sdbb : sd.ports()) {
+ if (sdbb.isDockless()) {
+ module.createOutputPort(sdbb.getName(), fleet.WIDTH_PACKET);
+ docklessPorts.put(sdbb.getName(), instance.getOutputPort(sdbb.getName()));
+ } else {
+ if (sdbb.isInputDock()) module.createInputPort(sdbb.getName(), getFleet().getWordWidth()+1);
+ else module.createOutputPort(sdbb.getName(), getFleet().getWordWidth()+1);
+ ports.put(sdbb.getName(), new FpgaDock(this, sdbb));
}
}
- if (type.equals("Debug")) {
- new FpgaBenkoBox(false, this, "out", true);
-
- } else if (type.equals("Execute")) {
- new FpgaBenkoBox(false, this, "ihorn", true, true, false);
- new FpgaBenkoBox(false, this, "dhorn", true, false, true);
-
- } else if (type.equals("Memory")) {
- new FpgaBenkoBox(true, this, "command", true);
- new FpgaBenkoBox(false, this, "ihorn", true, true, false);
- new FpgaBenkoBox(false, this, "dhorn", true, false, true);
- }
+ for(PercolatedPort pp : sd.percolatedPorts)
+ this.module.percolatedPorts.add(pp);
}
- private Fpga fleet;
- private String type;
-
- public long resolveLiteral(String s) {
- if (s.equals("NEG")) return 0;
- if (s.equals("INC")) return 1;
- if (s.equals("DEC")) return 2;
- if (s.equals("ABS")) return 3;
- if (s.equals("ADD")) return 0;
- if (s.equals("SUB")) return 1;
- if (s.equals("MAX")) return 2;
- if (s.equals("MIN")) return 3;
- return super.resolveLiteral(s);
- }
-
- // this is dumb, the fpga fleet currently requires these in declaration-order; it shouldn't
- private ArrayList<FpgaBenkoBox> portlist = new ArrayList<FpgaBenkoBox>();
- private HashMap<String,FpgaBenkoBox> ports = new HashMap<String,FpgaBenkoBox>();
-
- public Iterable<BenkoBox> getBenkoBoxes() { return (Iterable<BenkoBox>)(Object)portlist; }
- public String getType() { return type; }
- public Fleet getFleet() { return fleet; }
- public Fpga getSlipway() { return fleet; }
-
- void addBenkoBox(String name, FpgaBenkoBox port) { ports.put(name, port); portlist.add(port); }
+ public Iterator<Dock> iterator() { return (Iterator<Dock>)(Object)ports.values().iterator(); }
+ public Module.InstantiatedModule getVerilogModule() { return instance; }
}