#expect 42
#expect 46
-#ship alu : Alu2
+#ship alu : Alu
#ship debug : Debug
-// this test is bogus to begin with; doesn't have proper flow control
+alu.inOp: set word=Alu.inOp[ADD];
+ set ilc=*; deliver;
-alu.inOp: literal Alu2.inOp[ADD];
- [*] deliver;
+debug.in: set ilc=41; recv, deliver, send token to alu.out;
-debug.in: [*] take, deliver;
+alu.in2: set word= 4;
+ set ilc=*; deliver;
-alu.in2: literal 4;
- [*] deliver;
-
-alu.out: load loop counter with 40;
- [L] take, sendto alu.in1;
- [L] sendto debug.in;
+alu.out: set olc=40;
+ head;
+ collect, send to alu.in1;
+ send to debug.in;
+ recv token;
tail;
-alu.in1: literal 2;
- load repeat counter with 4;
+alu.in1: set word= 2;
+ set ilc=4;
deliver;
- load loop counter with 2;
- [L] take, deliver;
- [L] discard, deliver;
+ set olc=2;
+ head;
+ recv, deliver;
+ recv nothing, deliver;
tail;