enforce ordering on percolated ports

diff --git a/src/edu/berkeley/fleet/fpga/verilog/Verilog.java b/src/edu/berkeley/fleet/fpga/verilog/Verilog.java
index 17e447b..bbf8c1e 100644 (file)
--- a/src/edu/berkeley/fleet/fpga/verilog/Verilog.java
+++ b/src/edu/berkeley/fleet/fpga/verilog/Verilog.java
@@ -163,7 +163,10 @@ public class Verilog {
         public String getName() { return name; }
         public Port getPort(String name) { return ports.get(name); }
 
-        public HashSet<InstantiatedModule> instantiatedModules = new HashSet<InstantiatedModule>();
+        // order matters here
+        public LinkedList<InstantiatedModule> instantiatedModules = new LinkedList<InstantiatedModule>();
+
+        // order matters here
         public LinkedList<PercolatedPort> percolatedPorts = new LinkedList<PercolatedPort>();
         public final ArrayList<Event> events = new ArrayList<Event>();