merge proof correction
[coq-hetmet.git] / examples / Makefile
1 # -fwarn-incomplete-patterns
2
3 ghc = ../../../inplace/bin/ghc-stage2
4 #ghc = ghc
5 ghc_opt :=  -Werror -odir .build -hidir .build
6
7 open:
8         make demo
9         open .build/test.pdf
10
11 #sanity += BiGArrow.hs
12 sanity += IFLDemos.hs
13 sanity += CircuitExample.hs
14 sanity += CommandSyntaxExample.hs
15 sanity += DotProduct.hs
16 sanity += GArrowTutorial.hs
17 sanity += GArrowVerilog.hs
18 sanity += ImmutableHeap.hs
19 sanity += IsomorphismForCodeTypes.hs
20 sanity += LambdaCalculusInterpreter.hs
21 sanity += TypeSafeRun.hs
22 #sanity += Unflattening.hs
23
24 sanity_opts  = -dcore-lint -fforce-recomp -fcoqpass -ddump-coqpass -ddump-to-file
25 sanity_opts += -fsimpleopt-before-flatten
26 sanity_opts += -odir .build -hidir .build 
27
28 sanity:
29         for A in $(sanity); do echo; echo; $(ghc) $(sanity_opts) $$A +RTS -K500M || exit -1; done
30
31 demo-pretty:
32         $(ghc) $(ghc_opt) -main-is GArrowPretty GArrowPretty.hs -o GArrowPretty
33
34 demo-v:
35         $(ghc) $(ghc_opt) -main-is GArrowVerilog GArrowVerilog.hs -o GArrowVerilog
36         ./GArrowVerilog
37
38 demo-verilog:
39         $(ghc) $(sanity_opts) -c VerilogDemo.hs
40         $(ghc) $(ghc_opt) -main-is GArrowVerilog GArrowVerilog.hs -o GArrowVerilog
41         ./GArrowVerilog
42
43 demo:
44         mkdir -p .build
45         $(ghc) $(ghc_opt) -c Demo.hs -fforce-recomp
46         $(ghc) $(ghc_opt) --show-iface .build/Demo.hi
47         $(ghc) $(ghc_opt) GArrowTikZ.hs Demo.hs DemoMain.hs Unify.hs -o .build/demo
48         ./.build/demo > .build/test.tex
49         cd .build; TEXINPUTS=../tex-bits/:$TEXINPUTS: pdflatex test.tex