am42: updates

[fleet.git] / chips / f2 / doc / am42 / am42.tex

diff --git a/chips/f2/doc/am42/am42.tex b/chips/f2/doc/am42/am42.tex
index a85e825..bc72048 100644 (file)
--- a/chips/f2/doc/am42/am42.tex
+++ b/chips/f2/doc/am42/am42.tex
@@ -29,6 +29,14 @@ To Do:
 
 \begin{verbatim}
 
+"Supertorpedo" for retrieving dock state.
+
+THEREFORE: I propose that DockTwo only be able to load the counter from the data latch, not from the instruction word.  This gets rid of an entire instruction.  In exchange, I would like to propose that "data predecessor full is a condition of execution" and "drain data predecessor when you execute" be different opcode bits.
+
+
+  - debug capability?  ability to kick the dock in the head to get it
+    to spit out its state?
+
   - tokenhood as address bit
   - signal/path boundary/etc
   - Rename EPI and OD to something more meaningful
@@ -360,6 +368,8 @@ will not cause this transition when the {\tt P} flag is cleared.
 \item {\tt Sh} - Ship: at an input/output dock, wait for the ship successor/predecessor to be empty/full and fill/drain it.
 \end{itemize}
 
+Ability to await and capture, but not drain, data predecessor.
+
 The fabric successor must be empty in order for a {\tt move}
 instruction to attempt execution.
 
@@ -456,15 +466,6 @@ loop counter.
 \end{bytefield}}
 
 \begin{bytefield}{25}
-  \bitheader[b]{0,11-18}\\
-  \bitbox[1]{5}{\raggedleft {\tt Immediate}$\to${\tt LC}}
-  \bitbox[r]{1}{}
-  \bitbox{4}{\tt 1000}
-  \bitbox{3}{\tt 100}
-  \bitbox{12}{\tt Immediate}
-\end{bytefield}
-
-\begin{bytefield}{25}
   \bitheader[b]{12-18}\\
   \bitbox[1]{5}{\raggedleft {\tt Data Latch}$\to${\tt LC}}
   \bitbox[r]{1}{}
@@ -474,21 +475,6 @@ loop counter.
 \end{bytefield}
 
 \begin{bytefield}{25}
-  \bitheader[b]{0,13-18}\\
-  \bitbox[1]{5}{\raggedleft \footnotesize {\tt Sign-Extended Immediate}$\to${\tt Data Latch}}
-  \bitbox[r]{1}{}
-  \bitbox{4}{\tt 0010}
-  \bitbox{1}{\begin{minipage}{0.5cm}{
-\begin{center}
-\tt{\footnotesize{Si
-
-\vspace{-2mm}gn}}
-\end{center}}
-\end{minipage}}
-  \bitbox{14}{\tt Immediate}
-\end{bytefield}
-
-\begin{bytefield}{25}
   \bitheader[b]{0,5,6,11,15-18}\\
   \bitbox[1]{5}{\raggedleft {\tt Update Flags}}
   \bitbox[r]{1}{}
@@ -542,19 +528,20 @@ be used to create a {\tt nop} (no-op) by setting each flag to itself.
 
 
 \pagebreak
-\subsection{{\tt shift}}
+\subsection{{\tt literal}}
 
-\newcommand{\shiftImmediateSize}{19}
+\newcommand{\literalImmediateSize}{19}
 
-Each {\tt shift} instruction carries an immediate of \shiftImmediateSize\ 
-bits.  When a {\tt shift} instruction is executed, this immediate is copied
-into the least significant \shiftImmediateSize\  bits of the data latch,
-and the remaining most significant bits of the data latch are loaded
-with the value formerly in the least significant bits of the data latch.
-In this manner, large literals can be built up by ``shifting'' them
-into the data latch \shiftImmediateSize\ bits at a time.
+Each {\tt literal} instruction carries an immediate of
+\literalImmediateSize\ bits.  When a {\tt literal} instruction is
+executed, this immediate is copied into the least significant
+\literalImmediateSize\ bits of the data latch, and the remaining most
+significant bits of the data latch are loaded with the value formerly
+in the least significant bits of the data latch.  In this manner,
+large literals can be built up by ``shifting'' them into the data
+latch \literalImmediateSize\ bits at a time.
 
-\newcommand{\bitsShift}{
+\newcommand{\bitsLiteral}{
 \setlength{\bitwidth}{5mm}
 {\tt
 \begin{bytefield}{25}
@@ -569,17 +556,13 @@ into the data latch \shiftImmediateSize\ bits at a time.
   \bitbox{1}{0} 
   \bitbox{1}{0} 
 
-  \bitbox{\shiftImmediateSize}{Immediate} 
+  \bitbox{\literalImmediateSize}{Immediate} 
 \end{bytefield}}
 }
-\bitsShift
-
-The FleetTwo implementation is likely to have an unarchitected
-``literal latch'' at the on deck ({\tt OD}) stage, which is loaded
-with the literal {\it at the time that the {\tt shift} instruction
-  comes on deck}.  This latch is then copied into the data latch when
-the instruction executes.
+\bitsLiteral
 
+Need two forms: one of them loads the bottom half and sign-extends it
+into the top half.  The other form loads just the top half.
 
 
 \subsection{{\tt abort}}
@@ -663,7 +646,7 @@ the Requeue Stage for further details.
 \bitsFlush
 
 \vspace{3mm}\hspace{-1cm}{\tt shift}\hspace{1cm}\vspace{-6mm}\\
-\bitsShift
+\bitsLiteral
 
 \vspace{3mm}\hspace{-1cm}{\tt set}\hspace{1cm}\vspace{-6mm}\\
 \bitsSet