migrate jelib->delib

[fleet.git] / chips / marina / electric / jtagController.delib / BR.ic

diff --git a/chips/marina/electric/jtagController.delib/BR.ic b/chips/marina/electric/jtagController.delib/BR.ic
new file mode 100644 (file)
index 0000000..c5f3991
--- /dev/null
+++ b/chips/marina/electric/jtagController.delib/BR.ic
@@ -0,0 +1,33 @@
+HjtagController|8.10k
+
+# Cell BR;1{ic}
+CBR;1{ic}||artwork|1029443500000|1185367908213|EI|prototype_center()I[0,0]
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOpened-Thicker-Polygon|art@1||1|15|12|4|||trace()V[-6/-2,6/-2,6/2,-6/2,-6/-2]
+Ngeneric:Invisible-Pin|pin@0||5|13.75|||||ART_message(D5G1;)S[rd]
+Ngeneric:Invisible-Pin|pin@1||1|13.75|||||ART_message(D5G1;)S[p2]
+Ngeneric:Invisible-Pin|pin@2||-3|13.75|||||ART_message(D5G1;)S[p1]
+Ngeneric:Invisible-Pin|pin@3||6.25|15|||||ART_message(D5G1;)S[So]
+Ngeneric:Invisible-Pin|pin@4||-4.25|15|||||ART_message(D5G1;)S[Si]
+Ngeneric:Invisible-Pin|pin@5||1|15.5|||||ART_message(D5G1;)S[Bypass Register]
+Nschematic:Wire_Pin|pin@6||5|13||||
+Nschematic:Wire_Pin|pin@7||5|11||||
+Nschematic:Wire_Pin|pin@8||1|13||||
+Nschematic:Wire_Pin|pin@9||1|11||||
+Nschematic:Wire_Pin|pin@10||-3|13||||
+Nschematic:Wire_Pin|pin@11||-3|11||||
+Nschematic:Wire_Pin|pin@12||7|15||||
+Ngeneric:Invisible-Pin|pin@13||9|15||||
+Nschematic:Wire_Pin|pin@14||-5|15||||
+Ngeneric:Invisible-Pin|pin@15||-7|15||||
+Aschematic:wire|net@0|||900|pin@6||5|13|pin@7||5|11
+Aschematic:wire|net@1|||900|pin@8||1|13|pin@9||1|11
+Aschematic:wire|net@2|||900|pin@10||-3|13|pin@11||-3|11
+Aschematic:wire|net@3|||1800|pin@12||7|15|pin@13||9|15
+Aschematic:wire|net@4|||0|pin@14||-5|15|pin@15||-7|15
+ESDI||D5G2;|pin@15||I
+ESDO||D5G2;|pin@13||O
+Ephi1||D5G2;|pin@11||I
+Ephi2||D5G2;|pin@9||I
+Eread||D5G2;|pin@7||I
+X