migrate jelib->delib

[fleet.git] / chips / marina / electric / oneHotM.delib / sucDri10Pair.sch

diff --git a/chips/marina/electric/oneHotM.delib/sucDri10Pair.sch b/chips/marina/electric/oneHotM.delib/sucDri10Pair.sch
new file mode 100644 (file)
index 0000000..80f24d6
--- /dev/null
+++ b/chips/marina/electric/oneHotM.delib/sucDri10Pair.sch
@@ -0,0 +1,105 @@
+HoneHotM|8.10k
+
+# External Libraries:
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+LredFive|redFive
+
+# Cell sucDri10Pair;1{sch}
+CsucDri10Pair;1{sch}||schematic|1227976012682|1240934037485|
+IorangeTSMC090nm:NMOSx;1{ic}|NMOSx@2||-12|-35|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)S4
+IorangeTSMC090nm:NMOSx;1{ic}|NMOSx@3||-21|-35|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)S4
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||6|-23|||XRR|
+NOff-Page|conn@1||-47.75|-26||||
+NOff-Page|conn@2||-47.75|1||||
+IredFive:inv;1{ic}|inv@2||-29|-22|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S4|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+IredFive:inv;1{ic}|inv@5||4|-42|X||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S4|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+IredFive:inv;1{ic}|inv@6||3|-12|X||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S4|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+IredFive:nand2;1{ic}|nand2@1||-30|0|Y||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)S2|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+IredFive:nms1;2{ic}|nms1@2||-12|-42|X||D0G4;|ATTR_Delay(D5G1;NPX3;Y-0.5;)I100|ATTR_X(D5FLeave alone;G1.5;NPX-2.25;Y1.5;)S4
+IredFive:nms2b;1{ic}|nms2b@0||-12|-12|X||D0G4;|ATTR_Delay(D5G1;NPX3;Y-0.5;)I100|ATTR_X(D5G1.5;NOJPX-2.25;Y1.5;)S2
+Ngeneric:Invisible-Pin|pin@0||-21.5|22|||||ART_message(D5G5;)SsucDri10Pair
+Ngeneric:Invisible-Pin|pin@1||-21|18|||||ART_message(D5G3;)Sies 27 December 2008
+NWire_Pin|pin@3||-18|5.5||||
+NWire_Pin|pin@4||-18|-8||||
+NWire_Pin|pin@16||-12|0||||
+NWire_Pin|pin@36||-12|-30||||
+NWire_Pin|pin@37||12|-30||||
+NWire_Pin|pin@39||-18|0||||
+NWire_Pin|pin@40||-39|1||||
+NWire_Pin|pin@42||-39|-22||||
+NWire_Pin|pin@44||-42|-1||||
+NWire_Pin|pin@45||-42|-26||||
+NWire_Pin|pin@46||12|-12||||
+NWire_Pin|pin@47||12|0||||
+NWire_Pin|pin@50||12|-42||||
+NWire_Pin|pin@57||-18|-22||||
+NWire_Pin|pin@64||-30|-26||||
+NWire_Pin|pin@67||-18|-35||||
+NWire_Pin|pin@68||-12|-38||||
+NWire_Pin|pin@69||-21|-38||||
+NWire_Pin|pin@70||-21|-30||||
+NWire_Pin|pin@71||-30|-35||||
+NWire_Pin|pin@75||-7|-22||||
+NWire_Pin|pin@76||-7|-17.5||||
+NWire_Pin|pin@78||-18|-17.5||||
+IredFive:pms1;2{ic}|pms1@0||-12|5.5|||D0G4;|ATTR_Delay(D5G1;NPX-2;Y0.25;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.25;Y2.75;)S10
+IredFive:pms2_sy;1{ic}|pms2_sy@0||-12|-22|X||D0G4;|ATTR_Delay(D5G1;NPX-5;Y-1.5;)I100|ATTR_X(D5G1.5;NOLPX4;Y2;)S10
+IsucDri10Pair;1{ic}|sucDri10@0||4.5|12|||D5G4;
+IorangeTSMC090nm:wire90;1{ic}|wire90@0||-23|0|||D0G4;|ATTR_L(D5G1;PUD)D288.29999999999995|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@1||-22|-22|||D0G4;|ATTR_L(D5G1;PUD)D255.40000000000003|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@3||-4|-12|||D0G4;|ATTR_L(D5G1;PUD)D120.2|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@4||-4|-42|||D0G4;|ATTR_L(D5G1;PUD)D112.1|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@5||-17|-38|||D0G4;|ATTR_L(D5G1;PUD)D66.6|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+Awire|net@2|||900|pms1@0|d|-12|3.5|pin@16||-12|0
+Awire|net@4|||0|pms1@0|g|-15|5.5|pin@3||-18|5.5
+Awire|net@6|||1800|pin@4||-18|-8|nms2b@0|g2|-15|-8
+Awire|net@58|||1800|pin@36||-12|-30|pin@37||12|-30
+Awire|net@61|||2700|pin@4||-18|-8|pin@39||-18|0
+Awire|net@62|||2700|pin@39||-18|0|pin@3||-18|5.5
+Awire|net@63|||1800|wire90@0|b|-20.5|0|pin@39||-18|0
+Awire|net@64|||0|wire90@0|a|-25.5|0|nand2@1|out|-27.5|0
+Awire|net@66|||0|wire90@1|a|-24.5|-22|inv@2|out|-26.5|-22
+Awire|net@70|||1800|pin@42||-39|-22|inv@2|in|-31.5|-22
+Awire|net@73|||900|pin@44||-42|-1|pin@45||-42|-26
+Awire|net@77|||1800|inv@6|in|5.5|-12|pin@46||12|-12
+Awire|net@83|||1800|pin@16||-12|0|pin@47||12|0
+Awire|net@86|||900|pin@40||-39|1|pin@42||-39|-22
+Awire|net@90|||0|pin@50||12|-42|inv@5|in|6.5|-42
+Awire|net@92|||1800|wire90@4|b|-1.5|-42|inv@5|out|1.5|-42
+Awire|net@105|||0|pin@57||-18|-22|wire90@1|b|-19.5|-22
+Awire|net@112|||0|inv@6|out|0.5|-12|wire90@3|b|-1.5|-12
+Awire|net@113|||0|wire90@3|a|-6.5|-12|nms2b@0|g|-9|-12
+Awire|net@114|||1800|conn@1|y|-45.75|-26|pin@45||-42|-26
+Awire|net@116|||900|pin@16||-12|0|nms2b@0|d|-12|-6
+Awire|net@117|||0|pin@40||-39|1|conn@2|y|-45.75|1
+Awire|net@125|||0|pin@36||-12|-30|pin@70||-21|-30
+Awire|net@130|||900|pin@64||-30|-26|pin@71||-30|-35
+Awire|net@133|||1800|pin@45||-42|-26|pin@64||-30|-26
+Awire|net@138|||900|pin@36||-12|-30|NMOSx@2|d|-12|-33
+Awire|net@139|||900|pin@68||-12|-38|nms1@2|d|-12|-40
+Awire|net@141|||1800|pin@67||-18|-35|NMOSx@2|g|-15|-35
+Awire|net@142|||900|NMOSx@2|s|-12|-37|pin@68||-12|-38
+Awire|net@143|||1800|wire90@5|b|-14.5|-38|pin@68||-12|-38
+Awire|net@144|||900|NMOSx@3|s|-21|-37|pin@69||-21|-38
+Awire|net@145|||1800|pin@69||-21|-38|wire90@5|a|-19.5|-38
+Awire|net@147|||2700|NMOSx@3|d|-21|-33|pin@70||-21|-30
+Awire|net@149|||0|NMOSx@3|g|-24|-35|pin@71||-30|-35
+Awire|net@150|||900|pms2_sy@0|d|-12|-28|pin@36||-12|-30
+Awire|net@154|||1800|nms1@2|g|-9|-42|wire90@4|a|-6.5|-42
+Awire|net@156|||2700|pin@67||-18|-35|pin@57||-18|-22
+Awire|net@159|||0|pms2_sy@0|g2|-15|-26|pin@64||-30|-26
+Awire|net@160|||1800|pms2_sy@0|g|-9|-22|pin@75||-7|-22
+Awire|net@161|||2700|pin@75||-7|-22|pin@76||-7|-17.5
+Awire|net@162|||0|pin@76||-7|-17.5|pin@78||-18|-17.5
+Awire|net@164|||2700|pin@57||-18|-22|pin@78||-18|-17.5
+Awire|net@166|||0|nand2@1|ina|-32.5|1|pin@40||-39|1
+Awire|net@167|||1800|pin@44||-42|-1|nand2@1|inb|-32.5|-1
+Awire|out[1][F]|D5G2;||900|pin@37||12|-30|pin@50||12|-42
+Awire|out[1][T]|D5G2;||2700|pin@46||12|-12|pin@47||12|0
+Eflag[A,B][on,off]|bit[1]|D4G2;|conn@1|a|I
+EdoIT|out[1][T,F]|D6G2;|conn@0|y|O
+EdataIn_1|when|D4G2;|conn@2|a|I
+X