migrate jelib->delib

[fleet.git] / chips / marina / electric / orangeTSMC090nm.delib / NMOS4f_native.sch

diff --git a/chips/marina/electric/orangeTSMC090nm.delib/NMOS4f_native.sch b/chips/marina/electric/orangeTSMC090nm.delib/NMOS4f_native.sch
new file mode 100644 (file)
index 0000000..2e2c105
--- /dev/null
+++ b/chips/marina/electric/orangeTSMC090nm.delib/NMOS4f_native.sch
@@ -0,0 +1,27 @@
+HorangeTSMC090nm|8.10k
+
+# Cell NMOS4f_native;1{sch}
+CNMOS4f_native;1{sch}||schematic|1021415734000|1158099366852||ATTR_Delay(D5G1;HNPX-18.25;Y-12.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-18;Y-11.5;)S4|ATTR_W(D5FLeave alone;G1;HNOLPX-18;Y-10.5;)S10|ATTR_CDL_template(D5G1;NTX-6;Y-25.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-5;Y-23.5;)StransistorType  NT-N-Transistor|ATTR_SPICE_template(D5G1;NTX-3.5;Y-19.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-5.5;Y-27.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-17.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-6;Y-21.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
+INMOS4f_native;1{ic}|NMOS4f@0||18.5|1|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.25;Y-0.25;)S4|ATTR_W(D6FLeave alone;G1;NOLPX1.75;Y0.75;)S10
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||4.5|-7.5||||
+NOff-Page|conn@1||4.5|-12.5||||
+NOff-Page|conn@2||4.5|0||||
+NOff-Page|conn@3||-12.5|-6.5||||
+N4-Port-Transistor|nmos4p@0||-2|-6.5|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X2;Y-4;)Snch_na
+Ngeneric:Invisible-Pin|pin@0||-2|15.5|||||ART_message(D5G2;)S4-terminal native-threshold NMOS device
+NWire_Pin|pin@1||0|-12.5||||
+NWire_Pin|pin@2||0|0||||
+Ngeneric:Invisible-Pin|pin@3||-1.5|22|||||ART_message(D5G6;)SNMOS4f_native
+Ngeneric:Invisible-Pin|pin@4||-2.5|9|||||ART_message(D5G2;)S[note that the minimum allowed native,"device dimensions are W=10, L=4"]
+Awire|net@0|||0|nmos4p@0|g|-3|-6.5|conn@3|y|-10.5|-6.5
+Awire|net@1|||1800|nmos4p@0|b|0|-7.5|conn@0|a|2.5|-7.5
+Awire|net@2|||900|nmos4p@0|s|0|-8.5|pin@1||0|-12.5
+Awire|net@3|||1800|pin@1||0|-12.5|conn@1|a|2.5|-12.5
+Awire|net@4|||1800|pin@2||0|0|conn@2|a|2.5|0
+Awire|net@5|||900|pin@2||0|0|nmos4p@0|d|0|-4.5
+Eb||D5G2;|conn@0|y|B
+Ed||D5G2;|conn@2|y|B
+Eg||D5G2;|conn@3|a|I
+Es||D5G2;|conn@1|y|B
+X