migrate jelib->delib

[fleet.git] / chips / marina / electric / redFive.delib / invVp.sch

diff --git a/chips/marina/electric/redFive.delib/invVp.sch b/chips/marina/electric/redFive.delib/invVp.sch
new file mode 100644 (file)
index 0000000..77963e5
--- /dev/null
+++ b/chips/marina/electric/redFive.delib/invVp.sch
@@ -0,0 +1,37 @@
+HredFive|8.10k
+
+# External Libraries:
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+# Cell invVp;1{sch}
+CinvVp;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-12;Y-7;)I100|ATTR_PNdrvR(D5FLeave alone;G1;HNOLPX-12;Y-6;)S1|ATTR_X(D5FLeave alone;G1;HNOLPX-12.5;Y-5;)S1|ATTR_drive0(D5G1;HNPTX-12;Y-8;)Sstrong0|ATTR_drive1(D5G1;HNPTX-12;Y-9;)Sstrong1|ATTR_verilog_template(D5G1;NTX22;Y-15.5;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0]
+IorangeTSMC090nm:NMOSx;1{ic}|NMOS@0||0.5|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
+IorangeTSMC090nm:PMOSx;1{ic}|PMOS@0||0.5|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3;)S@X*@PNdrvR
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||-12|0||||
+NOff-Page|conn@1||7|0||||
+NGround|gnd@0||0.5|-12||||
+IinvVp;1{ic}|invVp@0||26.5|6.5|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-3;)I100|ATTR_PNdrvR(D5G1;NPX2;Y-2;)I1|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+NWire_Pin|pin@0||-4.5|6||||
+NWire_Pin|pin@1||-4.5|-6||||
+NWire_Pin|pin@2||-4.5|0||||
+NWire_Pin|pin@3||0.5|0||||
+Ngeneric:Invisible-Pin|pin@4||0.5|14.5|||||ART_message(D5G2;)S["NMOS sized normally, PMOS sized by ratio value"]
+Ngeneric:Invisible-Pin|pin@5||25.5|-11.5|||||ART_message(D5G2;)S[X is drive strength,"N drive strength is X, P drive strength is X*PNdrvR"]
+Ngeneric:Invisible-Pin|pin@6||-0.5|21|||||ART_message(D5G6;)S[invVp]
+Ngeneric:Invisible-Pin|pin@7||0.5|16.5|||||ART_message(D5G2;)S[variable ratio inverter]
+NPower|pwr@0||0.5|11||||
+Awire|net@0|||1800|conn@0|y|-10|0|pin@2||-4.5|0
+Awire|net@1|||0|conn@1|a|5|0|pin@3||0.5|0
+Awire|net@2|||2700|pin@2||-4.5|0|pin@0||-4.5|6
+Awire|net@3|||2700|pin@1||-4.5|-6|pin@2||-4.5|0
+Awire|net@4|||1800|pin@0||-4.5|6|PMOS@0|g|-2.5|6
+Awire|net@5|||2700|pin@3||0.5|0|PMOS@0|d|0.5|4
+Awire|net@6|||2700|PMOS@0|s|0.5|8|pwr@0||0.5|11
+Awire|net@7|||2700|NMOS@0|d|0.5|-4|pin@3||0.5|0
+Awire|net@8|||1800|pin@1||-4.5|-6|NMOS@0|g|-2.5|-6
+Awire|net@9|||900|NMOS@0|s|0.5|-8|gnd@0||0.5|-10
+Ein||D5G2;|conn@0|a|I
+Eout||D5G2;|conn@1|y|O
+X