migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / redFive.delib / nand2_sy.sch

diff --git a/chips/omegaCounter/40nm/electric/redFive.delib/nand2_sy.sch b/chips/omegaCounter/40nm/electric/redFive.delib/nand2_sy.sch
new file mode 100644 (file)
index 0000000..20b3a23
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/redFive.delib/nand2_sy.sch
@@ -0,0 +1,48 @@
+HredFive|8.10k
+
+# Cell nand2_sy;1{sch}
+Cnand2_sy;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-17.5;Y-16;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-17.5;Y-15;)S1|ATTR_drive0(D5G1;HNPTX-17.5;Y-17;)Sstrong0|ATTR_drive1(D5G1;HNPTX-17.5;Y-18;)Sstrong1|ATTR_verilog_template(D5G1;NTX25;Y-17.5;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
+IPMOS;1{ic}|PMOS@2||5.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
+IPMOS;1{ic}|PMOS@3||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||-23.5|-9||||
+NOff-Page|conn@1||19.5|-5|||RR|
+NOff-Page|conn@2||19.5|0||||
+Inand2_sy;1{ic}|nand2_sy@0||29|14.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+Inms2_sy;1{ic}|nms2_sy@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX5.5;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S@X
+NWire_Pin|pin@4||13.5|-5||||
+NWire_Pin|pin@5||0|0||||
+Ngeneric:Invisible-Pin|pin@6||35|-11|||||ART_message(D5G2;)S[X is drive strength,One pull-up has the same strength,as the pull-down]
+Ngeneric:Invisible-Pin|pin@7||3.5|17.5|||||ART_message(D5G2;)S[P to N width ratio is 2 to 2]
+NWire_Pin|pin@8||-9.5|4||||
+NWire_Pin|pin@9||-5|0||||
+Ngeneric:Invisible-Pin|pin@10||3.5|20|||||ART_message(D5G2;)S[one-parameter symmetric NAND]
+NWire_Pin|pin@11||-9.5|-9||||
+NWire_Pin|pin@12||5.5|0||||
+NWire_Pin|pin@13||13.5|4||||
+Ngeneric:Invisible-Pin|pin@14||3.5|25|||||ART_message(D5G6;)S[nand2_sy]
+NWire_Pin|pin@15||-5|7.5||||
+NWire_Pin|pin@16||5.5|7.5||||
+NPower|pwr@0||-5|10.5||||
+Awire|net@8|||1800|pin@12||5.5|0|conn@2|a|17.5|0
+Awire|net@9|||2700|pin@4||13.5|-5|pin@13||13.5|4
+Awire|net@10|||0|conn@1|y|17.5|-5|pin@4||13.5|-5
+Awire|net@11|||0|nms2_sy@0|g|-3|-9|pin@11||-9.5|-9
+Awire|net@12|||900|pin@5||0|0|nms2_sy@0|d|0|-3
+Awire|net@13|||1800|pin@9||-5|0|pin@5||0|0
+Awire|net@14|||1800|pin@5||0|0|pin@12||5.5|0
+Awire|net@15|||2700|PMOS@2|s|5.5|6|pin@16||5.5|7.5
+Awire|net@16|||1800|PMOS@2|g|8.5|4|pin@13||13.5|4
+Awire|net@17|||2700|pin@12||5.5|0|PMOS@2|d|5.5|2
+Awire|net@18|||900|pin@15||-5|7.5|PMOS@3|s|-5|6
+Awire|net@19|||1800|pin@8||-9.5|4|PMOS@3|g|-8|4
+Awire|net@20|||2700|pin@9||-5|0|PMOS@3|d|-5|2
+Awire|net@21|||2700|pin@11||-9.5|-9|pin@8||-9.5|4
+Awire|net@22|||0|pin@16||5.5|7.5|pin@15||-5|7.5
+Awire|net@23|||2700|pin@15||-5|7.5|pwr@0||-5|10.5
+Awire|net@30|||1800|nms2_sy@0|g2|3|-5|pin@4||13.5|-5
+Awire|net@31|||1800|conn@0|y|-21.5|-9|pin@11||-9.5|-9
+Eina||D5G2;|conn@0|a|I
+Einb||D5G2;|conn@1|a|I
+Eout||D5G2;|conn@2|y|O
+X