migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / redFive.delib / nms2b.ic

diff --git a/chips/omegaCounter/40nm/electric/redFive.delib/nms2b.ic b/chips/omegaCounter/40nm/electric/redFive.delib/nms2b.ic
new file mode 100644 (file)
index 0000000..43459ac
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/redFive.delib/nms2b.ic
@@ -0,0 +1,54 @@
+HredFive|8.10k
+
+# Cell nms2b;1{ic}
+Cnms2b;1{ic}|nms2|artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3;Y-0.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNPX-2.25;Y1.5;)I1|prototype_center()I[0,0]
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NPin|pin@0||-1|-2|1|1||
+NPin|pin@1||0|-3||||
+NPin|pin@2||1|-2|1|1||
+NPin|pin@3||0|-2|1|1||
+NPin|pin@4||0|-2|1|1||
+Nschematic:Bus_Pin|pin@5||0|6|-2|-2||
+Nschematic:Bus_Pin|pin@6||-3|0|-2|-2||
+Nschematic:Bus_Pin|pin@7||3|4|-2|-2||
+NPin|pin@8||-1.5|0|1|1|RR|
+NPin|pin@9||-3|0|||RR|
+NPin|pin@10||-1.5|1|1|1||
+NPin|pin@11||-1.5|-1|1|1||
+NPin|pin@12||0|-1|1|1||
+NPin|pin@13||-0.75|-1|1|1||
+NPin|pin@14||-0.75|1|1|1||
+NPin|pin@15||0|1|1|1||
+NPin|pin@16||0|2|1|1||
+NPin|pin@17||0|6|||RR|
+NPin|pin@18||0|5|1|1|YRR|
+NPin|pin@19||0.75|5|1|1|YRR|
+NPin|pin@20||0.75|3|1|1|YRR|
+NPin|pin@21||0|3|1|1|YRR|
+NPin|pin@22||1.5|3|1|1|YRR|
+NPin|pin@23||1.5|5|1|1|YRR|
+NPin|pin@24||0|2|1|1|YRR|
+NPin|pin@25||3|4||||
+NPin|pin@26||1.5|4|1|1|Y|
+AThicker|net@0|||FS0|pin@3||0|-2|pin@0||-1|-2|ART_color()I10
+AThicker|net@1|||FS0|pin@2||1|-2|pin@3||0|-2|ART_color()I10
+AThicker|net@2|||FS1350|pin@0||-1|-2|pin@1||0|-3|ART_color()I10
+AThicker|net@3|||FS2250|pin@1||0|-3|pin@2||1|-2|ART_color()I10
+AThicker|net@4|||FS900|pin@12||0|-1|pin@4||0|-2|ART_color()I10
+AThicker|net@5|||FS900|pin@10||-1.5|1|pin@11||-1.5|-1|ART_color()I10
+AThicker|net@6|||FS1800|pin@13||-0.75|-1|pin@12||0|-1|ART_color()I10
+AThicker|net@7|||FS900|pin@16||0|2|pin@15||0|1|ART_color()I10
+AThicker|net@8|||FS900|pin@14||-0.75|1|pin@13||-0.75|-1|ART_color()I10
+AThicker|net@9|||FS0|pin@15||0|1|pin@14||-0.75|1|ART_color()I10
+AThicker|net@10|||FS1800|pin@9||-3|0|pin@8||-1.5|0|ART_color()I10
+AThicker|net@11|||FS900|pin@21||0|3|pin@24||0|2|ART_color()I10
+AThicker|net@12|||FS0|pin@20||0.75|3|pin@21||0|3|ART_color()I10
+AThicker|net@13|||FS900|pin@17||0|6|pin@18||0|5|ART_color()I10
+AThicker|net@14|||FS1800|pin@18||0|5|pin@19||0.75|5|ART_color()I10
+AThicker|net@15|||FS900|pin@23||1.5|5|pin@22||1.5|3|ART_color()I10
+AThicker|net@16|||FS900|pin@19||0.75|5|pin@20||0.75|3|ART_color()I10
+AThicker|net@17|||FS0|pin@25||3|4|pin@26||1.5|4|ART_color()I10
+Ed||D5G1;|pin@5||O
+Eg||D5G1;|pin@6||I
+Eg2||D5G1;|pin@7||I
+X