// ships required in order to run this code
#ship debug : Debug
-#ship dcache : Dcache
+#ship dscratch : Dscratch
#ship fifo : Fifo
// dumb configurations
debug.data: [*] take, deliver;
-dcache.write_addr: [*] take, deliver;
-dcache.write_data: [*] take, deliver;
-dcache.read_addr: [*] take, deliver;
+dscratch.write_addr: [*] take, deliver;
+dscratch.write_data: [*] take, deliver;
+dscratch.read_addr: [*] take, deliver;
fifo.in: [*] take, deliver;
-// addresses and values to initialize the dcache with
-1: sendto dcache.write_addr;
-2: sendto dcache.write_addr;
-3: sendto dcache.write_addr;
-4: sendto dcache.write_addr;
-11: sendto dcache.write_data;
-12: sendto dcache.write_data;
-13: sendto dcache.write_data;
-14: sendto dcache.write_data;
+// addresses and values to initialize the dscratch with
+1: sendto dscratch.write_addr;
+2: sendto dscratch.write_addr;
+3: sendto dscratch.write_addr;
+4: sendto dscratch.write_addr;
+11: sendto dscratch.write_data;
+12: sendto dscratch.write_data;
+13: sendto dscratch.write_data;
+14: sendto dscratch.write_data;
// send write-completion tokens to the fifo output
-dcache.write_done:
+dscratch.write_done:
[*] take, sendto fifo.out;
// when the write-completion tokens accumulate, unleash
// the read addresses
fifo.out:
[4] wait;
- [4] take, sendto dcache.read_addr;
+ [4] take, sendto dscratch.read_addr;
// read addresses
4: sendto fifo.in;
2: sendto fifo.in;
1: sendto fifo.in;
-// data read from dcache goes to the debug ship
-dcache.read_data:
+// data read from dscratch goes to the debug ship
+dscratch.read_data:
[*] take, sendto debug.data;