((SimulationModel)model).setOptimizedDirectReadsWrites(true);
CYCLE_TIME_NS = cmdArgs.useVerilog ? (100*20) : 0.250;
- int khz = model instanceof VerilogModel ? 100000 : 1000000;
+ int khz = model instanceof VerilogModel ? 100000 : cmdArgs.jtagShift ? 20000 : 1000000;
+ prln("constructing jtag controller");
JtagTester tester = ((SimulationModel)model).createJtagTester("TCK", "TMS", "TRSTb", "TDI", "TDO");
tester.printInfo = false;
+
ChainControls ccs = new ChainControls();
PowerChannel pc = new ManualPowerChannel("pc", false);
/*