Module.SinkPort ship_in = inbox ? createOutputPort("ship", fpga.getWordWidth()+1) : null;
Module.Latch ilc = new Latch("ilc", fpga.SET_ILC_FROM_IMMEDIATE.valmaskwidth+1, 1);
- Module.Latch olc = new Latch("olc", fpga.SET_OLC_FROM_IMMEDIATE.valmaskwidth, 1);
+ Module.Latch olc = new Latch("olc", fpga.getWordWidth(), 1);
Module.Latch flag_a = new Latch("flag_a", 1);
Module.Latch flag_b = new Latch("flag_b", 1);
Module.Latch flag_c = new Latch("flag_c", 1);
WireValue decremented = new WireValue("decremented", Math.max(ilc.width,olc.width),
new SimpleValue("("+ondeck.testMask(fpga.SET_OLC_FROM_OLC_MINUS_ONE).getVerilogTrigger()+
- " ? {1'b0, olc} : ilc)-1"));
+ " ? olc : ilc)-1"));
WireValue data_latch_output_p = new WireValue("data_latch_output",
inbox ? fpga.getWordWidth()+1 : fpga.getWordWidth(),
(inbox
new ConditionalAction(done_executing.invert(),
new AssignAction(ilc, new MuxValue(new TestValue(ilc, TestValue.TestType.EQ, magic_standing_value),
magic_standing_value,
- decremented))),
+ decremented.getBits(ilc.width-1,0)))),
new ConditionalAction(ondeck.testMask(fpga.SET_OLC_FROM_DATA_LATCH),
new AssignAction(olc, new SimpleValue("data_latch_output"))),
new ConditionalAction(ondeck.testMask(fpga.SET_OLC_FROM_IMMEDIATE),