remove `flush macro, fold it into `cleanup

diff --git a/ships/Alu.ship b/ships/Alu.ship
index 42003c6..29293e4 100644 (file)
--- a/ships/Alu.ship
+++ b/ships/Alu.ship
@@ -182,7 +182,6 @@ public void service() {
       `reset
       out_draining <= 0;
     end else begin
-      `flush
       `cleanup
       if (out_draining && `out_empty) begin
         `drain_inOp

diff --git a/ships/CarrySaveAdder.ship b/ships/CarrySaveAdder.ship
index e6cddd6..db0312d 100644 (file)
--- a/ships/CarrySaveAdder.ship
+++ b/ships/CarrySaveAdder.ship
@@ -75,7 +75,6 @@ public void service() {
       `reset
       state <= 0;
     end else begin
-      `flush
       `cleanup
       if (`out_empty && state==3) begin
         out_d <= { 1'b0, temp };

diff --git a/ships/Counter.ship b/ships/Counter.ship
index 0acc5b7..b8155f5 100644 (file)
--- a/ships/Counter.ship
+++ b/ships/Counter.ship
@@ -115,7 +115,6 @@ public void service() {
       full <= 0;
       out_draining <= 0;
     end else begin
-      `flush
       `cleanup
       if (`inOp_empty)         full   <= 0;
       if (out_draining && `out_empty) begin

diff --git a/ships/DDR2.ship b/ships/DDR2.ship
index 4febc7b..25b81b1 100644 (file)
--- a/ships/DDR2.ship
+++ b/ships/DDR2.ship
@@ -230,7 +230,6 @@ DDR2SDRAM DDR2SDRAM(
       CommandValid <= 0;
       DataOutReady <= 0;
     end else begin
-      `flush
       `cleanup
 
       CommandValid <= 0;

diff --git a/ships/DRAM.ship b/ships/DRAM.ship
index 619185f..cc665fc 100644 (file)
--- a/ships/DRAM.ship
+++ b/ships/DRAM.ship
@@ -86,7 +86,6 @@ percolate inout:         ddr1_DQ            32
       dram_addr_r <= 0;
 
     end else begin
-      `flush
       `cleanup
 
       if (dram_addr_r && !dram_addr_a) begin

diff --git a/ships/Debug.ship b/ships/Debug.ship
index a34679b..aa17399 100644 (file)
--- a/ships/Debug.ship
+++ b/ships/Debug.ship
@@ -98,7 +98,6 @@ public void service() {
        `reset
      end else begin
 
-       `flush
        `cleanup
 
        // fpga -> host

diff --git a/ships/Lut3.ship b/ships/Lut3.ship
index 3993ed7..17063d8 100644 (file)
--- a/ships/Lut3.ship
+++ b/ships/Lut3.ship
@@ -79,7 +79,6 @@ is considered ``bit zero'').
       `reset
       out_draining <= 0;
     end else begin
-      `flush
       `cleanup
       if (out_draining && `out_empty) begin
          `drain_in1

diff --git a/ships/Memory.ship b/ships/Memory.ship
index dabd06b..f9e5269 100644 (file)
--- a/ships/Memory.ship
+++ b/ships/Memory.ship
@@ -159,7 +159,6 @@ sequence guarantee problem mentioned in the previous paragraph.
       cursor      = 0;
       counter     = 0;
     end else begin
-      `flush
       `cleanup
 
       if (counter!=0) begin

diff --git a/ships/Rotator.ship b/ships/Rotator.ship
index 9009458..8291e6a 100644 (file)
--- a/ships/Rotator.ship
+++ b/ships/Rotator.ship
@@ -51,7 +51,6 @@ public void service() {
       `reset
       full <= 0;
     end else begin
-      `flush
       `cleanup
       if (`in_full && `inAmount_full && `out_empty) begin
         if (!full) begin

diff --git a/ships/Video.ship b/ships/Video.ship
index ddf1af0..f9777fb 100644 (file)
--- a/ships/Video.ship
+++ b/ships/Video.ship
@@ -120,7 +120,6 @@ percolate up:         vga_clkout  1
     if (!rst) begin
       `reset
     end else begin
-      `flush
       `cleanup
       vga_pixel_a <= vga_pixel_r;
 

diff --git a/src/edu/berkeley/fleet/fpga/Fpga.java b/src/edu/berkeley/fleet/fpga/Fpga.java
index 76016db..6f23308 100644 (file)
--- a/src/edu/berkeley/fleet/fpga/Fpga.java
+++ b/src/edu/berkeley/fleet/fpga/Fpga.java
@@ -97,12 +97,12 @@ public class Fpga extends FleetTwoFleet {
             for(int i=0; i<14; i++) createShip("Counter");
 
             // "really big" configuration: 138 docks
-            for(int i=0; i<10; i++)  createShip("Alu");
-            createShip("CarrySaveAdder");
-            createShip("Rotator");
-            createShip("Lut3");
+            for(int i=0; i<4; i++)  createShip("Alu");
+            //createShip("CarrySaveAdder");
+            //createShip("Rotator");
+            //createShip("Lut3");
 
-            //createShip("DRAM");
+            createShip("DDR2");
             //createShip("Video");
         }
 
@@ -197,18 +197,6 @@ public class Fpga extends FleetTwoFleet {
                 if (bb.isInputDock()) pw.print("if (!"+bb_name+"_r && "+bb_name+"_a) "+bb_name+"_a <= 0; ");
                 else                  pw.print("if ( "+bb_name+"_r && "+bb_name+"_a) "+bb_name+"_r <= 0; ");
             }
-            pw.println();
-
-            // FIXME: this corresponds to something
-            /*
-            pw.print("`define flush_happening (1");
-            for(DockDescription bb : sd.ports())
-                if (bb.isInputDock())
-                    pw.print(" && "+bb.getName()+"_r_ && !"+bb.getName()+"_a && "+bb.getName()+"_d["+WIDTH_WORD+"]");
-            pw.println(")");
-            */
-
-            pw.print("`define flush ");
             for(DockDescription bb : sd.ports())
                 if (bb.isInputDock())
                     pw.print(" if (!"+bb.getName()+"_r_) "+bb.getName()+"_f <= 0; ");
@@ -315,7 +303,7 @@ public class Fpga extends FleetTwoFleet {
                 pw.println("    if (!rst) begin");
                 pw.println("      `reset");
                 pw.println("    end else begin");
-                pw.println("      `flush");
+                pw.println("      `cleanup");
                 pw.println("      out_r <= out_r__;");
                 pw.println("      in_a  <= in_a__;");
                 pw.println("    end");