move multiplier out of Alu3.ship, add correct test
authoradam <adam@megacz.com>
Mon, 4 Feb 2008 03:26:51 +0000 (04:26 +0100)
committeradam <adam@megacz.com>
Mon, 4 Feb 2008 03:26:51 +0000 (04:26 +0100)
ships/Alu3.ship
tests/multiply.test [new file with mode: 0644]

index 81f2a05..be22147 100644 (file)
@@ -72,67 +72,43 @@ public void service() {
 
 == FPGA ==============================================================
 
-  reg                    mode;         initial mode = 0;
-  reg                    have_in1;     initial have_in1 = 0;
-  reg                    have_in2;     initial have_in2 = 0;
-  reg                    have_in3;     initial have_in3 = 0;
-  reg [(`DATAWIDTH-1):0] keep_in1;     initial keep_in1 = 0;
-  reg [(`DATAWIDTH-1):0] keep_in2;     initial keep_in2 = 0;
-  reg [(`DATAWIDTH-1):0] keep_in3;     initial keep_in3 = 0;
-  reg                    have_out1;    initial have_out1 = 0;
-  reg                    have_out2;    initial have_out2 = 0;
-  reg [73:0] bitstorage; initial bitstorage = 0;
+  reg [73:0] bitstorage;               initial bitstorage = 0;
   reg [7:0] bitstorage_count;          initial bitstorage_count = 0;
-  reg wrote;                           initial wrote = 0;
 
   always @(posedge clk) begin
     if (!rst) begin
       `reset
-      mode = 0;
-      have_in1 <= 0;
-      have_in2 <= 0;
-      have_in3 <= 0;
-      keep_in1 <= 0;
-      keep_in2 <= 0;
-      keep_in3 <= 0;
-      have_out1 <= 0;
-      have_out2 <= 0;
-      bitstorage = 0;
+      bitstorage       <= 0;
       bitstorage_count <= 0;
-      wrote = 0;
     end else begin
-    wrote = 0;
-    if (bitstorage_count >= `DATAWIDTH) begin
-      outBits_d  = bitstorage[(`DATAWIDTH-1):0];
-      `onwrite(outBits_r, outBits_a)
-        bitstorage_count <= 0;
-        bitstorage        = bitstorage >> `DATAWIDTH;
-      end
-    end else if (have_out1) begin
-      `onwrite(out1_r, out1_a) have_out1 <= 0; end
-    end else if (have_out2) begin
-      `onwrite(out2_r, out2_a) have_out2 <= 0; end
-    end else if (!have_in1) begin
-      `onread(in1_r, in1_a) have_in1 <= 1; keep_in1 <= in1_d; end
-    end else if (!have_in2) begin
-      `onread(in2_r, in2_a) have_in2 <= 1; keep_in2 <= in2_d; end
-    end else if (!have_in3) begin
-      `onread(in3_r, in3_a) have_in3 <= 1; keep_in3 <= in3_d; end
-    end else begin
-          out1_d           <= { ((keep_in1 & keep_in2) | (keep_in2 & keep_in3) | (keep_in1 & keep_in3)) };
-          out2_d                       <= { 1'b0, (keep_in1[(`DATAWIDTH-1):1] ^
-                                                   keep_in2[(`DATAWIDTH-1):1] ^
-                                                   keep_in3[(`DATAWIDTH-1):1]) };
-        bitstorage[bitstorage_count]  = (keep_in1[0] ^ keep_in2[0] ^ keep_in3[0]);
+      if (out1_r    && out1_a)    out1_r    <= 0;
+      if (out2_r    && out2_a)    out2_r    <= 0;
+      if (outBits_r && outBits_a) outBits_r <= 0;
+      if (!in1_r    && in1_a)     in1_a     <= 0;
+      if (!in2_r    && in2_a)     in2_a     <= 0;
+      if (!in3_r    && in3_a)     in3_a     <= 0;
+      if (!out1_r && !out2_r && !outBits_r && in1_r && in2_r && in3_r) begin
+          out1_d  <= { ((in1_d & in2_d)
+                      | (in2_d & in3_d)
+                      | (in1_d & in3_d)) };
+          out2_d  <= { 1'b0, (in1_d[(`DATAWIDTH-1):1] ^
+                              in2_d[(`DATAWIDTH-1):1] ^
+                              in3_d[(`DATAWIDTH-1):1]) };
+        if (bitstorage_count >= `DATAWIDTH-1) begin
+          outBits_d <= bitstorage[(`DATAWIDTH-1):0];
+          outBits_r <= 1;
+          bitstorage_count <= 0;
+          bitstorage       <= bitstorage >> `DATAWIDTH;
+        end
+        bitstorage[bitstorage_count] <= (in1_d[0] ^ in2_d[0] ^ in3_d[0]);
         bitstorage_count             <= bitstorage_count+1;
-        have_out1 <= 1;
-        have_out2 <= 1;
-        have_in1  <= 0;
-        have_in2  <= 0;
-        have_in3  <= 0;
-    end
+        out1_r <= 1;
+        out2_r <= 1;
+        in1_a  <= 1;
+        in2_a  <= 1;
+        in3_a  <= 1;
+      end
     end
-
   end
 
 
@@ -143,64 +119,31 @@ public void service() {
 #ship bitfifo : BitFifo
 #ship debug   : Debug
 #ship fifo    : Fifo
+#ship rotator : Rotator
 
-#expect -66848683
-#expect 18682
+#expect 0
+#expect 2
+#expect 1
 
 // 0:  100100100111110000000
 // sel 011110100001001000000
 // 1:  111000101000011000011
 // r:  111000100110111000000
 
-bitfifo.in:
-  literal 10000;
-  deliver;      // deliver a junk word
-  load repeat counter with 37; deliver; // deliver it 37 times (once per bit)
-  literal 0;
-  load repeat counter with 38; deliver; // deliver it 37 times
-
-// insert bits in lsb order
-bitfifo.inOp:
-  literal BitFifo.inOp[lsbFirst,take=37];
-  [*] deliver;
-
-// toss out 37 bits, take one, repeat.  sign extend the result
-bitfifo.outOp:
-  literal BitFifo.outOp[drop=37,take=1,signExtend];
-  [*] deliver;
-
-bitfifo.out:        [*] wait, take, sendto lut3.in2;
-lut3.in2:           load repeat counter with 4; notify bitfifo.out;
-                    load repeat counter with 63;
-                    take, deliver, notify bitfifo.out;
-                    load repeat counter with 11;
-                    take, deliver, notify bitfifo.out;
-
-// mux on second input
-lut3.inLut:         literal 226;
-                    [*] deliver;
-
-lut3.in1:           literal 18683;
-                    load repeat counter with 37; deliver;
-                    literal 0;
-                    load repeat counter with 37; deliver;
-
-lut3.in3:           literal 12000;
-                    load repeat counter with 37; deliver;
-                    literal 0;
-                    load repeat counter with 37; deliver;
-
-lut3.out:           [*] wait, take, sendto alu3.in2;
-
-alu3.in1:      literal 0; deliver; [*] take, deliver;
-alu3.in2:      notify lut3.out; [*] take, deliver, notify lut3.out;
-alu3.in3:      literal 0; deliver; [*] take, deliver;
-alu3.outBits:  [*] take, sendto debug.in;
-
-alu3.out1:     [*] take, sendto alu3.in1;
-alu3.out2:     [*] take, sendto alu3.in3;
-
-debug.in:      [*] take, deliver;
+alu3.in1:      literal 1; deliver;            load repeat counter with 36; deliver;
+alu3.in2:      literal 0; deliver; literal 1; load repeat counter with 36; deliver;
+alu3.in3:      literal 4; deliver;            load repeat counter with 36; deliver;
+
+alu3.out1:    take;       sendto debug.in; [*] take;
+alu3.out2:    take; wait; sendto debug.in; [*] take;
+alu3.outBits: take; wait; sendto debug.in;
+
+debug.in:
+  take, deliver;
+  notify alu3.out2;
+  take, deliver;
+  notify alu3.outBits;
+  take, deliver;
 
 
 == Contributors =========================================================
diff --git a/tests/multiply.test b/tests/multiply.test
new file mode 100644 (file)
index 0000000..8d08607
--- /dev/null
@@ -0,0 +1,65 @@
+#ship alu3    : Alu3
+#ship lut3    : Lut3
+#ship bitfifo : BitFifo
+#ship debug   : Debug
+#ship fifo    : Fifo
+#ship rotator : Rotator
+
+#expect -66848683
+#expect 18682
+
+// 0:  100100100111110000000
+// sel 011110100001001000000
+// 1:  111000101000011000011
+// r:  111000100110111000000
+
+bitfifo.in:
+  literal 10000;
+  deliver;      // deliver a junk word
+  load repeat counter with 37; deliver; // deliver it 37 times (once per bit)
+  literal 0;
+  load repeat counter with 38; deliver; // deliver it 37 times
+
+// insert bits in lsb order
+bitfifo.inOp:
+  literal BitFifo.inOp[lsbFirst,take=37];
+  [*] deliver;
+
+// toss out 37 bits, take one, repeat.  sign extend the result
+bitfifo.outOp:
+  literal BitFifo.outOp[drop=37,take=1,signExtend];
+  [*] deliver;
+
+bitfifo.out:        [*] wait, take, sendto lut3.in2;
+lut3.in2:           load repeat counter with 4; notify bitfifo.out;
+                    load repeat counter with 63;
+                    take, deliver, notify bitfifo.out;
+                    load repeat counter with 11;
+                    take, deliver, notify bitfifo.out;
+
+// mux on second input
+lut3.inLut:         literal 226;
+                    [*] deliver;
+
+lut3.in1:           literal 18683;
+                    load repeat counter with 37; deliver;
+                    literal 0;
+                    load repeat counter with 37; deliver;
+
+lut3.in3:           literal 12000;
+                    load repeat counter with 37; deliver;
+                    literal 0;
+                    load repeat counter with 37; deliver;
+
+lut3.out:           [*] wait, take, sendto alu3.in2;
+
+alu3.in1:      literal 0; deliver; [*] take, deliver;
+alu3.in2:      notify lut3.out; [*] take, deliver, notify lut3.out;
+alu3.in3:      literal 0; deliver; [*] take, deliver;
+alu3.outBits:  [*] take, sendto debug.in;
+
+alu3.out1:     [*] take, sendto alu3.in1;
+alu3.out2:     [*] take, sendto alu3.in3;
+
+debug.in:      [*] take, deliver;
+