+++ /dev/null
-ship: ZBT
-
-== Ports ===========================================================
-data in: inAddrRead
-data in: inAddrWrite
-data in: inDataWrite
-
-data out: out
-
-percolate up: gpio_led_0 1
-percolate up: gpio_led_1 1
-percolate up: gpio_led_2 1
-percolate up: gpio_led_3 1
-
-percolate up: sram_adv_ld_b 1
-percolate up: sram_bw0 1
-percolate up: sram_bw1 1
-percolate up: sram_bw2 1
-percolate up: sram_bw3 1
-percolate up: sram_clk 1
-percolate up: sram_cs_b 1
-percolate up: sram_flash_a0 1
-percolate up: sram_flash_a1 1
-percolate up: sram_flash_a2 1
-percolate up: sram_flash_a3 1
-percolate up: sram_flash_a4 1
-percolate up: sram_flash_a5 1
-percolate up: sram_flash_a6 1
-percolate up: sram_flash_a7 1
-percolate up: sram_flash_a8 1
-percolate up: sram_flash_a9 1
-percolate up: sram_flash_a10 1
-percolate up: sram_flash_a11 1
-percolate up: sram_flash_a12 1
-percolate up: sram_flash_a13 1
-percolate up: sram_flash_a14 1
-percolate up: sram_flash_a15 1
-percolate up: sram_flash_a16 1
-percolate up: sram_flash_a17 1
-percolate up: sram_flash_a18 1
-percolate up: sram_flash_a19 1
-percolate up: sram_flash_a20 1
-percolate up: sram_flash_a21 1
-percolate up: sram_flash_we_b 1
-percolate up: sram_mode 1
-percolate up: sram_oe_b 1
-
-percolate inout: sram_d16 1
-percolate inout: sram_d17 1
-percolate inout: sram_d18 1
-percolate inout: sram_d19 1
-percolate inout: sram_d20 1
-percolate inout: sram_d21 1
-percolate inout: sram_d22 1
-percolate inout: sram_d23 1
-percolate inout: sram_d24 1
-percolate inout: sram_d25 1
-percolate inout: sram_d26 1
-percolate inout: sram_d27 1
-percolate inout: sram_d28 1
-percolate inout: sram_d29 1
-percolate inout: sram_d30 1
-percolate inout: sram_d31 1
-
-percolate inout: sram_dqp0 1
-percolate inout: sram_dqp1 1
-percolate inout: sram_dqp2 1
-percolate inout: sram_dqp3 1
-
-percolate inout: sram_flash_d0 1
-percolate inout: sram_flash_d1 1
-percolate inout: sram_flash_d2 1
-percolate inout: sram_flash_d3 1
-percolate inout: sram_flash_d4 1
-percolate inout: sram_flash_d5 1
-percolate inout: sram_flash_d6 1
-percolate inout: sram_flash_d7 1
-percolate inout: sram_flash_d8 1
-percolate inout: sram_flash_d9 1
-percolate inout: sram_flash_d10 1
-percolate inout: sram_flash_d11 1
-percolate inout: sram_flash_d12 1
-percolate inout: sram_flash_d13 1
-percolate inout: sram_flash_d14 1
-percolate inout: sram_flash_d15 1
-
-== TeX ==============================================================
-
-== Fleeterpreter ====================================================
- public void service() { }
-== FleetSim ==============================================================
-
-== FPGA ==============================================================
-
-wire [17:0] wb_adr_i; // : in std_logic_vector(17 downto 0);
-wire wb_we_i; // : in std_logic;
-wire [35:0] wb_dat_i; // : in std_logic_vector(35 downto 0);
-wire [3:0] wb_sel_i; // : in std_logic_vector(3 downto 0);
-wire [35:0] wb_dat_o; // : out std_logic_vector(35 downto 0);
-
-wire wb_err_o; // : out std_logic;
-
-wire wb_cyc_i; // : in std_logic;
-wire wb_stb_i; // : in std_logic;
-wire [2:0] wb_cti_i; // : in std_logic_vector(2 downto 0);
-wire [1:0] wb_bte_i; // : in std_logic_vector(1 downto 0);
-
-wire wb_ack_o; // : out std_logic;
-
-wire wb_tga_i; // : in std_logic := '0' --'0' to mean last (or single) 4 words burst
-
-zbt_top my_zbt_top(
- .clk(clk),
- .reset(rst),
- .sram_clk(clk),
- .sram_mode(sram_mode),
- .sram_cs_b(sram_cs_b),
- .sram_oe_b(sram_oe_b),
- .sram_flash_we_b(sram_flash_we_b),
- .sram_adv_ld_b(sram_adv_ld_b),
- .SRAM_BW0(sram_bw0),
- .SRAM_BW1(sram_bw1),
- .SRAM_BW2(sram_bw2),
- .SRAM_BW3(sram_bw3),
-
- // SRAM_FLASH_A0 : out STD_LOGIC; --not connected to SRAM!
- .SRAM_FLASH_A1(sram_flash_a1),
- .SRAM_FLASH_A2(sram_flash_a2),
- .SRAM_FLASH_A3(sram_flash_a3),
- .SRAM_FLASH_A4(sram_flash_a4),
- .SRAM_FLASH_A5(sram_flash_a5),
- .SRAM_FLASH_A6(sram_flash_a6),
- .SRAM_FLASH_A7(sram_flash_a7),
- .SRAM_FLASH_A8(sram_flash_a8),
- .SRAM_FLASH_A9(sram_flash_a9),
- .SRAM_FLASH_A10(sram_flash_a10),
- .SRAM_FLASH_A11(sram_flash_a11),
- .SRAM_FLASH_A12(sram_flash_a12),
- .SRAM_FLASH_A13(sram_flash_a13),
- .SRAM_FLASH_A14(sram_flash_a14),
- .SRAM_FLASH_A15(sram_flash_a15),
- .SRAM_FLASH_A16(sram_flash_a16),
- .SRAM_FLASH_A17(sram_flash_a17),
- .SRAM_FLASH_A18(sram_flash_a18),
-
- .SRAM_FLASH_D0(sram_flash_d0),
- .SRAM_FLASH_D1(sram_flash_d1),
- .SRAM_FLASH_D2(sram_flash_d2),
- .SRAM_FLASH_D3(sram_flash_d3),
- .SRAM_FLASH_D4(sram_flash_d4),
- .SRAM_FLASH_D5(sram_flash_d5),
- .SRAM_FLASH_D6(sram_flash_d6),
- .SRAM_FLASH_D7(sram_flash_d7),
- .SRAM_FLASH_D8(sram_flash_d8),
- .SRAM_FLASH_D9(sram_flash_d9),
- .SRAM_FLASH_D10(sram_flash_d10),
- .SRAM_FLASH_D11(sram_flash_d11),
- .SRAM_FLASH_D12(sram_flash_d12),
- .SRAM_FLASH_D13(sram_flash_d13),
- .SRAM_FLASH_D14(sram_flash_d14),
- .SRAM_FLASH_D15(sram_flash_d15),
- .SRAM_D16(sram_d16),
- .SRAM_D17(sram_d17),
- .SRAM_D18(sram_d18),
- .SRAM_D19(sram_d19),
- .SRAM_D20(sram_d20),
- .SRAM_D21(sram_d21),
- .SRAM_D22(sram_d22),
- .SRAM_D23(sram_d23),
- .SRAM_D24(sram_d24),
- .SRAM_D25(sram_d25),
- .SRAM_D26(sram_d26),
- .SRAM_D27(sram_d27),
- .SRAM_D28(sram_d28),
- .SRAM_D29(sram_d29),
- .SRAM_D30(sram_d30),
- .SRAM_D31(sram_d31),
-
- .SRAM_DQP0(sram_dqp0),
- .SRAM_DQP1(sram_dqp1),
- .SRAM_DQP2(sram_dqp2),
- .SRAM_DQP3(sram_dqp3),
-
- .wb_adr_i(wb_adr_i),
- .wb_we_i(wb_we_i),
- .wb_dat_i(wb_dat_i),
- .wb_sel_i(wb_sel_i),
- .wb_dat_o(wb_dat_o),
- .wb_cyc_i(wb_cyc_i),
- .wb_stb_i(wb_stb_i),
- .wb_cti_i(wb_cti_i),
- .wb_bte_i(wb_bte_i),
- .wb_ack_o(wb_ack_o),
- .wb_err_o(wb_err_o),
- .wb_tga_i(wb_tga_i)
- );
-
-assign wb_sel_i = 4'b0000;
-
-assign gpio_led_0 = wb_err_o_r;
-always @(posedge clk) begin
- if (rst) begin
- wb_err_o_r <= 0;
- end else begin
- wb_err_o_r <= wb_err_o_r | wb_err_o;
- end
-end
-
-// custom code //////////////////////////////////////////////////////////////////////////////
-
-reg [37:0] out_d;
-assign out_d_ = out_d;
-
-// grossly inefficient -- always uses only the first word of a burst!
-always @(posedge clk) begin
- if (rst) begin
- `reset
-
- end else begin
- `cleanup
-
- mask <= 8'b11111111;
- if (burst_count == 0 || burst_count == 1) begin
- app_wdf_wren <= 0;
- app_af_wren <= 0;
- end else if ((burst_count > 1) && (app_af_cmd == 3'b000)) begin
- app_af_wren <= ~burst_count[0];
- end
-
- if (burst_count > 0) begin
- burst_count <= burst_count - 1;
- end else if ((~read_waiting) && rd_data_valid) begin
- // wait
- end else if (read_waiting) begin
- if (rd_data_valid) begin
- read_waiting <= 0;
- out_d <= { 1'b0, rd_data_fifo_out[36:0] };
- `fill_out
- end
- end else if (app_wdf_afull || app_af_afull) begin
- // wait
- end else if (`inAddrWrite_full && `inDataWrite_full) begin
- `drain_inDataWrite
- `drain_inAddrWrite
- app_wdf_data <= inDataWrite_d;
- app_af_addr <= { inAddrWrite_d, 2'b00 };
- app_af_cmd <= 3'b000;
- app_af_wren <= 1;
- app_wdf_wren <= 1;
- burst_count <= 7;
- out_d <= { phy_init_done //1'b1
- , 37'b0 };
- mask <= 8'b00000000;
- `fill_out
- end else if (`inAddrRead_full) begin
- `drain_inAddrRead
- app_af_addr <= { inAddrRead_d, 2'b00 };
- app_af_cmd <= 3'b001;
- app_af_wren <= 1;
- burst_count <= 3;
- read_waiting <= 1;
- end
- end
-end
-*/
-
-
-== UCF ==============================================================
-
-NET sram_adv_ld_b LOC="H8"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_bw0 LOC="D10"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_bw1 LOC="D11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_bw2 LOC="J11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_bw3 LOC="K11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_clk LOC="AG21"; # Bank 4, Vcco=3.3V, No DCI
-NET sram_clk LOC="G8"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_cs_b LOC="J10"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d16 LOC="N10"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d17 LOC="E13"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d18 LOC="E12"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d19 LOC="L9"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d20 LOC="M10"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d21 LOC="E11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d22 LOC="F11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d23 LOC="L8"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d24 LOC="M8"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d25 LOC="G12"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d26 LOC="G11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d27 LOC="C13"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d28 LOC="B13"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d29 LOC="K9"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d30 LOC="K8"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_d31 LOC="J9"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_dqp0 LOC="D12"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_dqp1 LOC="C12"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_dqp2 LOC="H10"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_dqp3 LOC="H9"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_flash_a0 LOC="K12"; # Bank 1, Vcco=3.3V
-NET sram_flash_a1 LOC="K13"; # Bank 1, Vcco=3.3V
-NET sram_flash_a2 LOC="H23"; # Bank 1, Vcco=3.3V
-NET sram_flash_a3 LOC="G23"; # Bank 1, Vcco=3.3V
-NET sram_flash_a4 LOC="H12"; # Bank 1, Vcco=3.3V
-NET sram_flash_a5 LOC="J12"; # Bank 1, Vcco=3.3V
-NET sram_flash_a6 LOC="K22"; # Bank 1, Vcco=3.3V
-NET sram_flash_a7 LOC="K23"; # Bank 1, Vcco=3.3V
-NET sram_flash_a8 LOC="K14"; # Bank 1, Vcco=3.3V
-NET sram_flash_a9 LOC="L14"; # Bank 1, Vcco=3.3V
-NET sram_flash_a10 LOC="H22"; # Bank 1, Vcco=3.3V
-NET sram_flash_a11 LOC="G22"; # Bank 1, Vcco=3.3V
-NET sram_flash_a12 LOC="J15"; # Bank 1, Vcco=3.3V
-NET sram_flash_a13 LOC="K16"; # Bank 1, Vcco=3.3V
-NET sram_flash_a14 LOC="K21"; # Bank 1, Vcco=3.3V
-NET sram_flash_a15 LOC="J22"; # Bank 1, Vcco=3.3V
-NET sram_flash_a16 LOC="L16"; # Bank 1, Vcco=3.3V
-NET sram_flash_a17 LOC="L15"; # Bank 1, Vcco=3.3V
-NET sram_flash_a18 LOC="L20"; # Bank 1, Vcco=3.3V
-NET sram_flash_a19 LOC="L21"; # Bank 1, Vcco=3.3V
-NET sram_flash_a20 LOC="AE23"; # Bank 2, Vcco=3.3V
-NET sram_flash_a21 LOC="AE22"; # Bank 2, Vcco=3.3V
-NET sram_flash_d0 LOC="AD19"; # Bank 2, Vcco=3.3V
-NET sram_flash_d1 LOC="AE19"; # Bank 2, Vcco=3.3V
-NET sram_flash_d2 LOC="AE17"; # Bank 2, Vcco=3.3V
-NET sram_flash_d3 LOC="AF16"; # Bank 2, Vcco=3.3V
-NET sram_flash_d4 LOC="AD20"; # Bank 2, Vcco=3.3V
-NET sram_flash_d5 LOC="AE21"; # Bank 2, Vcco=3.3V
-NET sram_flash_d6 LOC="AE16"; # Bank 2, Vcco=3.3V
-NET sram_flash_d7 LOC="AF15"; # Bank 2, Vcco=3.3V
-NET sram_flash_d8 LOC="AH13"; # Bank 4, Vcco=3.3V, No DCI
-NET sram_flash_d9 LOC="AH14"; # Bank 4, Vcco=3.3V, No DCI
-NET sram_flash_d10 LOC="AH19"; # Bank 4, Vcco=3.3V, No DCI
-NET sram_flash_d11 LOC="AH20"; # Bank 4, Vcco=3.3V, No DCI
-NET sram_flash_d12 LOC="AG13"; # Bank 4, Vcco=3.3V, No DCI
-NET sram_flash_d13 LOC="AH12"; # Bank 4, Vcco=3.3V, No DCI
-NET sram_flash_d14 LOC="AH22"; # Bank 4, Vcco=3.3V, No DCI
-NET sram_flash_d15 LOC="AG22"; # Bank 4, Vcco=3.3V, No DCI
-NET sram_flash_we_b LOC="AF20"; # Bank 2, Vcco=3.3V
-NET sram_mode LOC="A13"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-NET sram_oe_b LOC="B12"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
-
-
-== Test ==============================================================
-#expect 20
-#expect 16
-#expect 12
-
-#ship debug : Debug
-#ship ddr : DDR2
-
-debug.in:
- set ilc=*; recv, deliver;
-
-ddr.out:
- set ilc=3; collect;
- send token to ddr.inAddrRead;
- set ilc=3; collect, send to debug.in;
-
-ddr.inAddrWrite:
- set word= 0x1; deliver;
- set word= 0x10; deliver;
- set word=0x100; deliver;
-
-ddr.inDataWrite:
- set word=20; deliver;
- set word=16; deliver;
- set word=12; deliver;
-
-ddr.inAddrRead:
- recv token;
- set word= 0x1; deliver;
- set word= 0x10; deliver;
- set word=0x100; deliver;
-
-
-== Constants ========================================================
-
-== Contributors =========================================================
-Adam Megacz <megacz@cs.berkeley.edu>
projects / fleet.git / commitdiff