-Hmarina_padframe|8.09a
+Hmarina_padframe|8.10a
# Cell PRS0816CDG_18;1{sch}
-CPRS0816CDG_18;1{sch}||schematic|1185175551078|1241276158487|I|ATTR_CDL_template(D5G2;NTX24.5;Y-51.5;)SX$(node_name) $(C) $(DS) $(I) $(IE) $(OEN) $(PAD) $(PE) $(POC18) $(PS) $(VDDPST18) $(VSS) $(VSSPST18) $(VDD) /PRS0816CDG_18|ATTR_NCC(D5G2;NTX-5.5;Y-42.5;)S[blackBox Artisan pad layout does not exist properly in electric,joinGroup tpdn90g18:PRS0816CDG_18{lay}]|ATTR_SPICE_netlist_file(D5G2;NTX-5.5;Y-47.5;)Stpdn90g18_3.spi
+CPRS0816CDG_18;1{sch}||schematic|1185175551078|1247545671385|I|ATTR_CDL_template(D5G2;NTX24.5;Y-51.5;)SX$(node_name) $(C) $(DS) $(I) $(IE) $(OEN) $(PAD) $(PE) $(POC18) $(PS) $(VDDPST18) $(VSS) $(VSSPST18) $(VDD) /PRS0816CDG_18|ATTR_NCC(D5G2;NTX-5.5;Y-42.5;)S[blackBox Artisan pad layout does not exist properly in electric,joinGroup tpdn90g18:PRS0816CDG_18{lay}]|ATTR_SPICE_netlist_file(D5G2;NTX-5.5;Y-47.5;)Stpdn90g18_3.spi
IPRS0816CDG_18;1{ic}|PVDD2CDG@0||51|23|||D5G4;
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@1||-30|5||||
NWire_Pin|pin@19||40|-42.5||||
NWire_Pin|pin@20||40|-4||||
Ngeneric:Invisible-Pin|pin@21||57.5|-47|||||ART_message(C18;D5G2;)S[in order for the XML generator to work correctly,"at the top level, you need to short I, C, and PAD together"]
+NWire_Pin|pin@22||36|-4||||
Awire|PAD|D5G2;||2700|pin@19||40|-42.5|pin@20||40|-4
Awire|net@3|||0|conn@4|a|8|-4|conn@3|y|-28|-4
Awire|net@4|||0|conn@6|a|8|-15|conn@5|y|-28|-15
Awire|net@8|||1800|conn@1|y|-28|5|conn@2|a|8|5
Awire|net@17|||1800|conn@7|y|-28|-26|conn@8|a|8|-26
Awire|net@22|||0|conn@20|a|70|-42.5|pin@19||40|-42.5
+Awire|net@23|||900|conn@11|y|36|-1|pin@22||36|-4
+Awire|net@24|||0|pin@20||40|-4|pin@22||36|-4
+Awire|net@25|||2250|pin@20||40|-4|conn@17|a|43|-1
EC||D5G2;|conn@17|y|O
EOEN_1|DS|D5G2;|conn@13|a|I
EI||D5G2;|conn@11|a|I