move main.xst into Makefile

diff --git a/Makefile b/Makefile
index d52a2f7..440b295 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -84,6 +84,66 @@ synth:
        cd build/fpga; mkdir -p xst
        rm -rf build/fpga/_ngo
        skill xst_original
+
+       rm -f build/fpga/main.xst
+       echo "set -tmpdir ./tmp" >> build/fpga/main.xst
+       echo "set -xsthdpdir ./xst" >> build/fpga/main.xst
+       echo "set -xsthdpini main.ini" >> build/fpga/main.xst
+       echo -n "run" >> build/fpga/main.xst
+       echo -n " -ifn main.prj" >> build/fpga/main.xst
+       echo -n " -ifmt mixed" >> build/fpga/main.xst
+       echo -n " -ofn main" >> build/fpga/main.xst
+       echo -n " -ofmt NGC" >> build/fpga/main.xst
+       echo -n " -p xc4vfx60-11ff1152" >> build/fpga/main.xst
+       echo -n " -top main" >> build/fpga/main.xst
+       echo -n " -opt_mode area" >> build/fpga/main.xst
+       echo -n " -opt_level 2" >> build/fpga/main.xst
+       echo -n " -iuc NO" >> build/fpga/main.xst
+       echo -n " -lso main.lso" >> build/fpga/main.xst
+       echo -n " -keep_hierarchy NO" >> build/fpga/main.xst
+       echo -n " -rtlview Yes" >> build/fpga/main.xst
+       echo -n " -glob_opt AllClockNets" >> build/fpga/main.xst
+       echo -n " -read_cores YES" >> build/fpga/main.xst
+       echo -n " -write_timing_constraints NO" >> build/fpga/main.xst
+       echo -n " -cross_clock_analysis YES" >> build/fpga/main.xst
+       echo -n " -hierarchy_separator /" >> build/fpga/main.xst
+       echo -n " -bus_delimiter <>" >> build/fpga/main.xst
+       echo -n " -case maintain" >> build/fpga/main.xst
+       echo -n " -slice_utilization_ratio 100" >> build/fpga/main.xst
+       echo -n " -verilog2001 YES" >> build/fpga/main.xst
+       echo -n " -fsm_extract Yes" >> build/fpga/main.xst
+       echo -n " -fsm_encoding Auto" >> build/fpga/main.xst
+       echo -n " -safe_implementation No" >> build/fpga/main.xst
+       echo -n " -fsm_style lut" >> build/fpga/main.xst
+       echo -n " -ram_extract Yes" >> build/fpga/main.xst
+       echo -n " -ram_style Auto" >> build/fpga/main.xst
+       echo -n " -rom_extract Yes" >> build/fpga/main.xst
+       echo -n " -mux_style Auto" >> build/fpga/main.xst
+       echo -n " -decoder_extract YES" >> build/fpga/main.xst
+       echo -n " -priority_extract YES" >> build/fpga/main.xst
+       echo -n " -shreg_extract YES" >> build/fpga/main.xst
+       echo -n " -shift_extract YES" >> build/fpga/main.xst
+       echo -n " -xor_collapse YES" >> build/fpga/main.xst
+       echo -n " -rom_style Auto" >> build/fpga/main.xst
+       echo -n " -mux_extract YES" >> build/fpga/main.xst
+       echo -n " -resource_sharing YES" >> build/fpga/main.xst
+       echo -n " -mult_style auto" >> build/fpga/main.xst
+       echo -n " -iobuf YES" >> build/fpga/main.xst
+       echo -n " -max_fanout 10000" >> build/fpga/main.xst
+       echo -n " -bufg 1" >> build/fpga/main.xst
+       echo -n " -register_duplication YES" >> build/fpga/main.xst
+       echo -n " -register_balancing Yes" >> build/fpga/main.xst
+       echo -n " -slice_packing Yes" >> build/fpga/main.xst
+       echo -n " -optimize_primitives Yes" >> build/fpga/main.xst
+       echo -n " -tristate2logic Yes" >> build/fpga/main.xst
+       echo -n " -use_clock_enable Yes" >> build/fpga/main.xst
+       echo -n " -use_sync_set Yes" >> build/fpga/main.xst
+       echo -n " -use_sync_reset Yes" >> build/fpga/main.xst
+       echo -n " -iob auto" >> build/fpga/main.xst
+       echo -n " -equivalent_register_removal YES" >> build/fpga/main.xst
+       echo -n " -slice_utilization_ratio_maxmargin 5" >> build/fpga/main.xst
+       echo >> build/fpga/main.xst
+
        $(xilinx_ise)xst -intstyle xflow -ifn main.xst -ofn main.syr < main.xst
        $(xilinx_ise)ngdbuild -aul -intstyle xflow -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd
        $(xilinx_ise)map -cm area -intstyle xflow -p $(device) -pr b -ol high -o main_map.ncd main.ngd main.pcf

diff --git a/src/edu/berkeley/fleet/fpga/main.xst b/src/edu/berkeley/fleet/fpga/main.xst
deleted file mode 100644 (file)
index 0d8afda..0000000
--- a/src/edu/berkeley/fleet/fpga/main.xst
+++ /dev/null
@@ -1,5 +0,0 @@
-set -tmpdir ./tmp
-set -xsthdpdir ./xst
-set -xsthdpini main.ini
-run
--ifn main.prj -ifmt mixed -ofn main -ofmt NGC -p xc4vfx60-11ff1152 -top main -opt_mode area -opt_level 2 -iuc NO -lso main.lso -keep_hierarchy NO -rtlview Yes -glob_opt AllClockNets -read_cores YES -write_timing_constraints NO -cross_clock_analysis YES -hierarchy_separator / -bus_delimiter <> -case maintain -slice_utilization_ratio 100 -verilog2001 YES -fsm_extract Yes -fsm_encoding Auto -safe_implementation No -fsm_style lut -ram_extract Yes -ram_style Auto -rom_extract Yes -mux_style Auto -decoder_extract YES -priority_extract YES -shreg_extract YES -shift_extract YES -xor_collapse YES -rom_style Auto -mux_extract YES -resource_sharing YES -mult_style auto -iobuf YES -max_fanout 10000 -bufg 1 -register_duplication YES -register_balancing Yes -slice_packing Yes -optimize_primitives Yes -tristate2logic Yes -use_clock_enable Yes -use_sync_set Yes -use_sync_reset Yes -iob auto -equivalent_register_removal YES -slice_utilization_ratio_maxmargin 5