add a Fifo to the Fpga large configuration so the test suite will pass
authorAdam Megacz <adam@megacz.com>
Sat, 1 Aug 2009 06:08:02 +0000 (23:08 -0700)
committerAdam Megacz <adam@megacz.com>
Sat, 1 Aug 2009 06:08:02 +0000 (23:08 -0700)
src/edu/berkeley/fleet/fpga/Fpga.java
tests/requeue/test-for-common-requeue-timing-error.fleet

index 20567ed..42cd3a7 100644 (file)
@@ -94,9 +94,8 @@ public class Fpga extends FleetTwoFleet {
 
             for(int i=0; i<2; i++)  createShip("Memory");
             for(int i=0; i<6; i++)  createShip("Alu");
-            //for(int i=0; i<2; i++)  createShip("Fifo");
+            for(int i=0; i<1; i++)  createShip("Fifo");
             for(int i=0; i<12; i++) createShip("Counter");
-            //for(int i=0; i<2; i++)  createShip("Null");
 
             //createShip("CarrySaveAdder");
             //createShip("Rotator");
index 4a9e007..44a1fba 100644 (file)
@@ -7,7 +7,6 @@
 
 #ship debug0       : Debug
 #ship fifo0        : Fifo
-#ship fifo1        : Fifo
 #ship alu20        : Alu
 #ship alu21        : Alu