19-Dec

darcs-hash:20090103005352-5007d-d52db673b50242adb28e589379c949de9fd7d293.gz

diff --git a/am33.tex b/am33.tex
index 45373b1..632aefe 100644 (file)
--- a/am33.tex
+++ b/am33.tex
@@ -67,9 +67,14 @@ Changes:
 
 \begin{tabular}{rl}
 \color{red}
+19-Dec
+& \color{red} Updated diagram in section 3 to put dispatch path near MSB\\
+& \color{red} Changed DP[37:25] to DP[37:27]\\
+& \color{red} Added note on page 4 regarding previous\\
 14-Nov
-& \color{red} Roll back ``Distinguish {\tt Z}-flag from OLC=0'' \\
-& \color{red} Clarify what ``{\tt X-Extended}'' means \\
+& Roll back ``Distinguish {\tt Z}-flag from OLC=0'' \\
+& Clarify what ``{\tt X-Extended}'' means \\
+& Change C-bit source selector from {\tt Di} to {\tt Dc} \\
 07-Nov
 & Distinguish {\tt Z}-flag from OLC=0\\
 & Add {\tt flush} instruction\\
@@ -252,15 +257,33 @@ instruction and an 11-bit path to fit in a single word of memory.
 This path is the path from the {\it dispatching} dock to the {\it
   executing} dock.
 
+\vspace{0.5cm}
+
+\color{red}
 \setlength{\bitwidth}{3.5mm}
 {\tt \footnotesize
 \begin{bytefield}{37}
-  \bitheader[b]{0,10,11,36}\\
-  \bitbox{26}{instruction} 
+  \bitheader[b]{0,25,26,36}\\
   \bitbox{11}{dispatch path} 
+  \bitbox{26}{instruction} 
 \end{bytefield}}
+\color{black}
 
-
+\color{red}
+Note that the 11 bit {\tt dispatch path} field is not the same width
+as the 13 bit {\tt Immediate} path field in the {\tt move} instruction,
+which in turn may not be the same width as the actual path latches in
+the switch fabric.
+
+The algorithm for expanding a path to a wider width is specific to the
+switch fabric implementation, and is not specified by this
+document.\footnote{\color{red}for the Marina experiment, the correct
+  algorithm is to sign-extend the path; the most significant bit of
+  the given path is used to fill all vacant bits of the latch} In
+particular, because the {\tt dispatch path} field is always used to
+specify a path which terminates at an instruction destination (never a
+data destination), and because instruction destinations ignore the
+signal bit, certain optimizations may be possible.  \color{black}
 
 
 \subsection{Life Cycle of an Instruction}
@@ -381,8 +404,6 @@ The pump has four flags: {\tt A}, {\tt B},
       ship or from an inbound packet.  See the {\tt move} instruction
       for further details.
 
-\color{red}
-
 \item The {\tt Z} flag is known as the {\it zero} flag; it is set
   whenever the {\tt OLC} is zero, and is cleared whenever the {\tt
   OLC} is nonzero.
@@ -484,7 +505,7 @@ started:
       \item
       {\it Otherwise} if the instruction is interruptible ({\tt I=0})
       and a torpedo is present in the waiting area: consume the
-      torpedo, set the {\tt Z} flag and
+      torpedo, set {\tt OLC=0}, {\tt Z=1} and
       set the inner loop counter to one ({\tt ILC=1}).
 
       \item
@@ -500,12 +521,12 @@ started:
 \pagebreak
 \section{Instructions}
 
-The dock supports four instructions:
-{\tt move} (variants: {\tt moveto}, {\tt dispatch}),
-{\tt shift},
-{\tt set}, and
-{\tt tail}.
-\color{black}
+%The dock supports four instructions:
+%{\tt move} (variants: {\tt moveto}, {\tt dispatch}),
+%{\tt shift},
+%{\tt set}, and
+%{\tt tail}.
+%\color{black}
 
 
 \subsection{{\tt move}}
@@ -537,7 +558,7 @@ The dock supports four instructions:
 
 \begin{bytefield}{26}
   \bitheader[b]{11,12,13}\\
-  \bitbox[1]{11}{\raggedleft {\tt dispatch} ({\footnotesize {\tt DataPredecessor[37:25]\to Path}})\ \ }
+  \bitbox[1]{11}{\raggedleft {\tt dispatch} ({\footnotesize {\tt DataPredecessor[37:\color{red}27\color{black}]\to Path}})\ \ }
   \bitbox[r]{1}{}
   \bitbox{1}{\tt 0}
   \bitbox{1}{\tt 1}
@@ -574,12 +595,17 @@ be set:
 
 \begin{itemize}
 \item At an {\it input} dock the {\tt C} flag is set to the signal bit
-      of the incoming packet if {\tt Di} or {\tt Ti} is set.
+      of the incoming packet if {\tt Di} or {\tt Ti} is
+      set otherwise it takes on an unknown
+      value.
 
 \item At an {\it output} dock the {\tt C} flag is set to a value
-      provided by the ship if the {\tt Di} bit is set, and to the
-      signal bit of the incoming packet if {\tt Di} is clear and {\tt
-      Ti} is set.
+      provided by the ship if the {\tt Dc} bit is set.  If
+      the {\tt Dc} bit is not set and the {\tt Ti} bit is set, it is
+      set to the signal bit of the incoming packet.  If the {\tt Dc}
+      bit and {\tt Ti} bits are both cleared, it takes on an unknown
+      value.\color{black}
+
 \end{itemize}
 
 The {\tt flush} instruction is a variant of {\tt move} which is valid
@@ -591,7 +617,7 @@ being delivered.
 {\tt
 \begin{bytefield}{26}
   \bitheader[b]{14-18}\\
-  \bitbox[r]{7}{\raggedleft{\tt flush}}
+  \bitbox[r]{7}{\raggedleft{\tt flush\ \ }}
   \bitbox{1}{\tt 0}
 \color{black}
   \bitbox{1}{\tt 0}
@@ -732,7 +758,6 @@ with the possibly-extended literal {\it at the time that the {\tt set}
 latch when a {\tt set Data Latch} instruction
 executes.
 
-\color{red}
 The {\tt Sign-Extended Immediate} instruction copies the {\tt
 Immediate} field into the least significant bits of the data latch.
 All other bits of the data latch are filled with a copy of the