set_sim_tres 10ps
-set_sim_eou sim=6 model=6 net=6
set_elem_acc *XhalfBit* *xcontRx* *xclockedrx* *xclk_regen* *xsimpleRx* *xrxc_offs* *xdutyrestore*
-print_node_v *
+print_node_v * except=*:*
free_ckt_db 99999999
search_ckt_analog el=*xtx2rxcap*
set_fcap_param report=1
set_analogrelfcap_param 0.0000001 0.000001
set_tv_window start=5ns
set_mesg_opt limit_per_mesg=100
+
+#set_sim_eou sim=6 model=6 net=6
+set_sim_eou sim=2 model=2 net=2
+#set_powernet_default mode=5 level=0 acc_dc=0
public static final String CONTROL_CHAIN = "marina.marina_control";
public static final String REPORT_CHAIN = "marina.marina_report";
+ private static String prefix = "marinaGu@0.outDockW@3.marinaOu@1.";
+
private static final String OLC_PATH_EVEN =
- "outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.scanEx3h@1"; // bits 2,4,6
+ prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.scanEx3h@1"; // bits 2,4,6
private static final String OLC_PATH_ODD =
- "outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.scanEx3h@2"; // bits 1,3,5
+ prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.scanEx3h@2"; // bits 1,3,5
+ private static final String OLC_PATH_KESSEL =
+ prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.counte@0.adamScan@1.scanEx6h@";
private static final String ILC_PATH_ODD =
- "outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.scanEx4h@0"; // bits 1,3,5,7
+ prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.scanEx4h@0"; // bits 1,3,5,7
private static final String ILC_PATH_EVEN =
- "outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.scanEx4h@1"; // bits 2,4,6,8
+ prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.scanEx4h@1"; // bits 2,4,6,8
private static final String FLAGS_PATH =
- "outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.scanEx3h@0";
+ prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.scanEx3h@0";
private static final String INSTR_RING_CONTROL_PATH =
- "southFif@1.tapPropS@1.tapStage@2";
+ prefix+"southFif@1.tapPropS@1.tapStage@2";
private static final String TOK_FIFO_PATH =
- "tokenFIF@1";
+ prefix+"tokenFIF@1";
private static final String INSTRUCTION_COUNTER_PATH =
- "southFif@1.tapPropS@1.instruct@0";
+ prefix+"southFif@1.tapPropS@1.instruct@0";
private static final String DATA_COUNTER_PATH =
- "northFif@1.fillDrai@1.instruct@0";
+ prefix+"northFif@1.fillDrai@1.instruct@0";
private static final String TOK_PRED_PATH =
- "outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.scanEx2h@0.scanCell@10";
+ prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.scanEx2h@0.scanCell@10";
private static final int COUNTER_LENGTH = 34;
private static final int INSTRUCTION_SEND_NDX = 1;
this.model = model;
this.indenter = indenter;
data = new ProperStopper("north fifo",
- "northFif@1.fillDrai@1.properSt@1",
+ prefix+"northFif@1.fillDrai@1.properSt@1",
CONTROL_CHAIN,
DATA_CHAIN,
REPORT_CHAIN,
cc, model, clockHack, indenter);
instrIn = new InstructionStopper("south fifo",
- "southFif@1.tapPropS@1.properSt@1",
+ prefix+"southFif@1.tapPropS@1.properSt@1",
CONTROL_CHAIN,
DATA_CHAIN,
REPORT_CHAIN,
// value. In verilog we need to prevent the X'es from
// propagating, so we force the flags to a known value
//
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__set_", 0);
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__clr_", 1);
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__set_", 0);
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__clr_", 1);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__set_", 0);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__clr_", 1);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__set_", 0);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__clr_", 1);
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__set_", 1);
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__clr_", 0);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__set_", 1);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__clr_", 0);
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@0.net_50", 0); // A
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@1.net_50", 0); // B
- vm.setNodeState("outputDo@0.outM1Pre@0.litDandP@0.latch2in@0.hi2inLat@0.latchKee@0.out_B_", 0); // C
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@0.net_50", 0); // A
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@1.net_50", 0); // B
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.litDandP@0.latch2in@0.hi2inLat@0.latchKee@0.out_B_", 0); // C
// possible C-flag inputs
- vm.setNodeState("northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE+1)+"]", 0);
- vm.setNodeState("northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ZERO+1)+"]", 0);
+ vm.setNodeState(prefix+"northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE+1)+"]", 0);
+ vm.setNodeState(prefix+"northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ZERO+1)+"]", 0);
// force the OLC to zero
if (!kesselsCounter)
for(int i=1; i<=6; i++)
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.inLO["+i+"]", (i==1)?0:1);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.inLO["+i+"]", (i==1)?0:1);
// set the ILC input to 1
for(int i=1; i<=8; i++) {
if (i!=7)
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.\\inLO["+i+"]", (i==1)?0:1);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.\\inLO["+i+"]", (i==1)?0:1);
}
- vm.setNodeState("northFif@1.upDown8w@2.weakStag@22.addr1in2@0.fire", 1);
+ vm.setNodeState(prefix+"northFif@1.upDown8w@2.weakStag@22.addr1in2@0.fire", 1);
model.waitNS(1000);
- vm.setNodeState("northFif@1.upDown8w@2.weakStag@22.addr1in2@0.fire", 0);
+ vm.setNodeState(prefix+"northFif@1.upDown8w@2.weakStag@22.addr1in2@0.fire", 0);
model.waitNS(1000);
vm.setNodeState("sid[9]", 1);
model.waitNS(1000);
// pulse ilc[load] and olc[load]
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_load_", 1);
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_decLO_", 1);
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_torpLO_", 1);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_load_", 1);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_decLO_", 1);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_torpLO_", 1);
if (!kesselsCounter)
- vm.setNodeState("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.olc_load_", 1);
+ vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.olc_load_", 1);
model.waitNS(100);
model.waitNS(1);
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_load_");
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_decLO_");
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_torpLO_");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_load_");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_decLO_");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_torpLO_");
if (!kesselsCounter)
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.olc_load_");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.olc_load_");
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__set_");
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__clr_");
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__set_");
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__clr_");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__set_");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__clr_");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__set_");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__clr_");
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__set_");
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__clr_");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__set_");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__clr_");
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@0.net_50");
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@1.net_50");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@0.net_50");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@1.net_50");
// Every move instruction, even those with Ti=0,Di=0,
// loads the C-flag. It will get loaded with an "X",
// which will then leak into the flags and from there the
// predicate.
- vm.releaseNode("outputDo@0.outM1Pre@0.litDandP@0.latch2in@0.hi2inLat@0.latchKee@0.out_B_");
- vm.releaseNode("northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE+1)+"]");
- vm.releaseNode("northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ZERO+1)+"]");
- vm.releaseNode("northFif@1.upDown8w@2.weakStag@22.addr1in2@0.fire");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.litDandP@0.latch2in@0.hi2inLat@0.latchKee@0.out_B_");
+ vm.releaseNode(prefix+"northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE+1)+"]");
+ vm.releaseNode(prefix+"northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ZERO+1)+"]");
+ vm.releaseNode(prefix+"northFif@1.upDown8w@2.weakStag@22.addr1in2@0.fire");
for(int i=1; i<=8; i++) {
if (i!=7)
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.\\inLO["+i+"] ");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.\\inLO["+i+"] ");
}
model.waitNS(1000);
if (!kesselsCounter)
for(int i=1; i<=6; i++)
- vm.releaseNode("outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.inLO["+i+"]");
+ vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.inLO["+i+"]");
// the proper stopper states come up in an undefined ("X")
// state, so under Verilog we need to force them to a
} else {
NanosimModel nModel = (NanosimModel) model;
- nModel.setNodeVoltage("sid[9]",1.0);
- nModel.setNodeVoltage("sic[9]",1.0);
- nModel.setNodeVoltage("sir[9]",1.0);
+ /*
+ nModel.setNodeVoltage(prefix+"sid[9]",1.0);
+ nModel.setNodeVoltage(prefix+"sic[9]",1.0);
+ nModel.setNodeVoltage(prefix+"sir[9]",1.0);
+ nModel.waitNS(WIDTH);
+ nModel.setNodeVoltage(prefix+"sid[9]",0.0);
+ nModel.setNodeVoltage(prefix+"sic[9]",0.0);
+ nModel.setNodeVoltage(prefix+"sir[9]",0.0);
+ nModel.waitNS(1);
+ */
+ nModel.setNodeVoltage("mc",1.0);
nModel.waitNS(WIDTH);
- nModel.setNodeVoltage("sid[9]",0.0);
- nModel.setNodeVoltage("sic[9]",0.0);
- nModel.setNodeVoltage("sir[9]",0.0);
+ nModel.setNodeVoltage("mc",0.0);
nModel.waitNS(1);
}
resetAfterMasterClear();
/** Get the 6 bit outer loop counter. */
public int getOLC() {
shiftReport(true, false);
- BitVector odd = cc.getOutBits(REPORT_CHAIN+"."+OLC_PATH_ODD).bitReverse();
- BitVector even = cc.getOutBits(REPORT_CHAIN+"."+OLC_PATH_EVEN).bitReverse();
- odd = odd.not();
- even = even.not();
- BitVector bv = new BitVector(6, "olc");
- for(int i=0; i<3; i++) {
- bv.set(i*2, odd.get(i));
- bv.set(i*2+1, even.get(i));
+ if (kesselsCounter) {
+ BitVector bits = null;
+ for(int i=0; i<4; i++) {
+ BitVector x = cc.getOutBits(REPORT_CHAIN+"."+OLC_PATH_KESSEL+i);
+ //System.out.println("bits are: " + x);
+ bits = bits==null ? x : bits.cat(x);
+ }
+ //System.out.println("kesselsCounter = " + bits);
+ int first = 0;
+ int second = 0;
+ for(int i=0; i<6; i++) first |= bits.get(4+i*3) ? (1<<i) : 0;
+ for(int i=0; i<6; i++) second |= bits.get(4+i*3+2) ? (1<<i) : 0;
+ return (first+second);
+ } else {
+ BitVector odd = cc.getOutBits(REPORT_CHAIN+"."+OLC_PATH_ODD).bitReverse();
+ BitVector even = cc.getOutBits(REPORT_CHAIN+"."+OLC_PATH_EVEN).bitReverse();
+ odd = odd.not();
+ even = even.not();
+ BitVector bv = new BitVector(6, "olc");
+ for(int i=0; i<3; i++) {
+ bv.set(i*2, odd.get(i));
+ bv.set(i*2+1, even.get(i));
+ }
+ return (int)bv.toLong();
}
- return (int)bv.toLong();
}
/** Get the 7 bit inner loop counter. The MSB is the zero bit.
* The low order 6 bits are the count */
private PowerChannel corePowerSupply, padsPowerSupply;
private VoltageReadable coreVoltmeter, voltmeterForCurrent;
- private ChainTest ctD, ctR, ctC;
- private ChainControl ccD, ccR, ccC;
+ private ChainTest ctD, ctR, ctC, ct;
+ private ChainControl ccD, ccR, ccC, cc;
//-------------------------- private methods -----------------------------
/** @return true if simulation. Return false if we're testing silicon. */
((SimulationModel)model).setOptimizedDirectReadsWrites(true);
CYCLE_TIME_NS = cmdArgs.useVerilog ? (100*20) : 0.250;
+ int khz = model instanceof VerilogModel ? 100000 : 1000000;
- //tester = ((SimulationModel)model).createJtagTester("TCK", "TMS", "TRSTb", "TDI", "TDO");
+ JtagTester tester = ((SimulationModel)model).createJtagTester("TCK", "TMS", "TRSTb", "TDI", "TDO");
+ tester.printInfo = false;
ChainControls ccs = new ChainControls();
+ PowerChannel pc = new ManualPowerChannel("pc", false);
+ /*
JtagTester testerD, testerR, testerC;
testerD = ((SimulationModel)model).createJtagSubchainTester("sid[1:9]", null);
testerR = ((SimulationModel)model).createJtagSubchainTester("sir[1:9]", null);
testerC = ((SimulationModel)model).createJtagSubchainTester("sic[1:9]", null);
testerD.printInfo = testerR.printInfo = testerC.printInfo = false;
- int khz = model instanceof VerilogModel ? 100000 : 1000000;
-
ccD = new ChainControl(SCAN_CHAIN_XML, testerD, 1.8f, khz);
ccR = new ChainControl(SCAN_CHAIN_XML, testerR, 1.8f, khz);
ccC = new ChainControl(SCAN_CHAIN_XML, testerC, 1.8f, khz);
ccD.noTestSeverity = ccR.noTestSeverity = ccC.noTestSeverity = Infrastructure.SEVERITY_NOMESSAGE;
-
- PowerChannel pc = new ManualPowerChannel("pc", false);
+
ctD = new ChainTest(ccD, pc);
ctR = new ChainTest(ccR, pc);
ctC = new ChainTest(ccC, pc);
-
+ */
+ /*
ccs.addChain(Marina.DATA_CHAIN, ccD);
ccs.addChain(Marina.REPORT_CHAIN, ccR);
ccs.addChain(Marina.CONTROL_CHAIN, ccC);
-
+ */
+
+ cc = new ChainControl(SCAN_CHAIN_XML, tester, 1.8f, khz);
+ ct = new ChainTest(cc, pc);
+ ccs.addChain(Marina.DATA_CHAIN, cc);
+ ccs.addChain(Marina.REPORT_CHAIN, cc);
+ ccs.addChain(Marina.CONTROL_CHAIN, cc);
+
marina = new Marina(ccs, model, !cmdArgs.jtagShift, indenter);
if (model instanceof VerilogModel)
else
((SimulationModel)model).start("nanosim -c cfg", netListName, 0, !cmdArgs.jtagShift);
+ /*
ccC.resetInBits();
ccC.shift(Marina.CONTROL_CHAIN, false, true);
+ */
+
+ cc.resetInBits();
+ cc.shift(Marina.CONTROL_CHAIN, false, true);
doOneTest(cmdArgs.testNum);
// Put top level tests here
private void testChains(Marina marina) {
- prln("Testing control chain...");
- ctC.testOneChain(Marina.CONTROL_CHAIN, Infrastructure.SEVERITY_WARNING);
- ccC.resetInBits();
- ccC.shift(Marina.CONTROL_CHAIN, false, true);
+ if (ctC!=null) {
+ prln("Testing control chain...");
+ ctC.testOneChain(Marina.CONTROL_CHAIN, Infrastructure.SEVERITY_WARNING);
+ ccC.resetInBits();
+ ccC.shift(Marina.CONTROL_CHAIN, false, true);
+ }
- prln("Testing data chain...");
- ctD.testOneChain(Marina.DATA_CHAIN, Infrastructure.SEVERITY_WARNING);
- //ccD.resetInBits();
- //ccD.shift(Marina.DATA_CHAIN, false, true);
+ if (ctD!=null) {
+ prln("Testing data chain...");
+ ctD.testOneChain(Marina.DATA_CHAIN, Infrastructure.SEVERITY_WARNING);
+ //ccD.resetInBits();
+ //ccD.shift(Marina.DATA_CHAIN, false, true);
+ }
- prln("Testing report chain...");
- ctR.testOneChain(Marina.REPORT_CHAIN, Infrastructure.SEVERITY_WARNING);
- //ccR.resetInBits();
- //ccR.shift(Marina.REPORT_CHAIN, false, true);
+ if (ctR!=null) {
+ prln("Testing report chain...");
+ ctR.testOneChain(Marina.REPORT_CHAIN, Infrastructure.SEVERITY_WARNING);
+ //ccR.resetInBits();
+ //ccR.shift(Marina.REPORT_CHAIN, false, true);
+ }
+
+ if (ct!=null) {
+ prln("Testing control chain...");
+ ct.testOneChain(Marina.CONTROL_CHAIN, Infrastructure.SEVERITY_WARNING);
+ cc.resetInBits();
+ cc.shift(Marina.CONTROL_CHAIN, false, true);
+ prln("Testing data chain...");
+ ct.testOneChain(Marina.DATA_CHAIN, Infrastructure.SEVERITY_WARNING);
+ prln("Testing report chain...");
+ ct.testOneChain(Marina.REPORT_CHAIN, Infrastructure.SEVERITY_WARNING);
+ }
}
private void testProperStoppers(Marina marina) {
}
+ private void showOlc() {
+ prln("OLC=="+marina.getOLC());
+ }
+ private void expectOlc(int x) {
+ int olc = marina.getOLC();
+ fatal(x!=olc, "expected OLC=="+x+", but scanned out OLC=="+olc);
+ }
private void getCtrsFlags(Marina marina) {
prln("begin getCtrsFlags");
adjustIndent(2);
- int olc = marina.getOLC();
- prln("OLC=="+olc);
-
+ showOlc();
Ilc ilc = marina.getILC();
prln("ILC.done=="+ilc.getDone()+
" ILC.infinity=="+ilc.getInfinity()+
private void walkOneOLC(Marina marina) {
prln("Begin walkOneOLC");
adjustIndent(2);
- for (int i=-1; i<=5; i++) {
+ for (int i=0; i<6; i++) {
if (marina.kesselsCounter) {
+ System.out.println("master-clearing...");
// master clear on each iteration; otherwise we'd need to "run down" the olc
marina.masterClear();
marina.enableInstructionSend(true);
model.waitNS(128 * CYCLE_TIME_NS);
- int outOlc = marina.getOLC();
-
- fatal(outOlc!=inOlc, "walkOneOLC: got="+outOlc+" expected="+inOlc);
+ expectOlc(inOlc);
prln("walkOneOLC: "+inOlc+" checks out");
}
adjustIndent(-2);
for (int i=maxOlc; i>=0; i--) {
model.waitNS(128 * CYCLE_TIME_NS);
prln("OLC should be: "+i);
- int olc = marina.getOLC();
- fatal(olc!=i, "bad OLC: "+olc+" expected: "+i);
+ expectOlc(i);
marina.instrIn.fill(new
Instruction.Set(dock,Predicate.IgnoreFlagD,SetDest.OuterLoopCounter, SetSource.Decrement));
}
model.waitNS(CYCLE_TIME_NS * 64);
- int olc = marina.getOLC();
- fatal(olc != (1<<bit), "expected olc to be " + (1<<bit) + ", but got " + olc);
+ expectOlc(1<<bit);
if (marina.kesselsCounter) {
// master clear on each iteration; otherwise we'd need to "run down" the olc
marina.instrIn.fill(setIlc(1));
marina.instrIn.fill(setOlc(63));
- int olc;
model.waitNS(128 * CYCLE_TIME_NS);
- olc = marina.getOLC();
- fatal(olc!=63, "bad OLC: "+olc+" expected: 63");
+ expectOlc(63);
marina.instrIn.fill(new
Instruction.Set(dock,Predicate.IgnoreFlagD, CLEAR_FLAG, CLEAR_FLAG));
prln("Set A=A, B=1 This instruction should execute because D-flag is set");
model.waitNS(128 * CYCLE_TIME_NS);
- prln("infoz: olc="+marina.getOLC());
marina.fillSouthProperStopper(new Instruction[] {
new Instruction.Set(dock,Predicate.IgnoreFlagD,SetDest.InnerLoopCounter, SetSource.Infinity),
});
model.waitNS(128 * CYCLE_TIME_NS);
- prln("infoz: olc="+marina.getOLC());
prln("send torpedo. This should clear the OLC");
marina.instrIn.fillTorpedo();
model.waitNS(128 * CYCLE_TIME_NS);
model.waitNS(128 * CYCLE_TIME_NS);
- prln("infoz: olc="+marina.getOLC());
prln("A should remain false, B should be true");
fatal(marina.getFlagA(), "bad A flag: true");
fatal(!marina.getFlagB(), "bad B flag: false");
model.waitNS(128 * CYCLE_TIME_NS);
- prln("infoz: olc="+marina.getOLC());
prln("Reload OLC after torpedo, clears D-flag");
marina.instrIn.fill(new Instruction.Set(dock,Predicate.IgnoreFlagD,SetDest.OuterLoopCounter, 63));
// FIXME: find another way to test this
model.waitNS(128 * CYCLE_TIME_NS);
- olc = marina.getOLC();
- fatal(olc!=63, "bad OLC: "+olc+" expected: 63");
+ expectOlc(63);
prln("Set A=1, B=1 This instruction should execute because OLC!=0");
marina.instrIn.fill(new
true, // dataOut
false // tokenOut
);
+
marina.fillSouthProperStopper(instructions);
model.waitNS(64 * CYCLE_TIME_NS);
model.waitNS(64 * CYCLE_TIME_NS);
prln("Verify OLC count using scan chain");
- outOlc = marina.getOLC();
- fatal(outOlc!=notZero, "bad OLC count: "+outOlc+" expected: "+notZero);
+ expectOlc(notZero);
if (!marina.kesselsCounter) {
prln("Set OLC="+notZero);
model.waitNS(64 * CYCLE_TIME_NS);
prln("Verify OLC count using scan chain");
- outOlc = marina.getOLC();
- fatal(outOlc!=0, "bad OLC count: "+outOlc+" expected: 0");
+ expectOlc(0);
}
}
prln("============================================================");
prln("MarinaTest: performing test: "+testNum);
- marina.masterClear();
- marina.enableInstructionSend(true);
-
+ if (testNum!=0) {
+ marina.masterClear();
+ marina.enableInstructionSend(true);
+ }
try {
switch (testNum) {
// these tests run fairly quickly
+
doOneTest(1); // passes extracted parasitics
doOneTest(2); // passes extracted parasitics
doOneTest(3); // passes extracted parasitics
doOneTest(4); // passes extracted parasitics
-
+ doOneTest(5); // passes extracted parasitics
doOneTest(6);
doOneTest(1002);
doOneTest(1005);
doOneTest(3019);
doOneTest(3025);
- doOneTest(5); // passes extracted parasitics
- doOneTest(6); // passes extracted parasitics
doOneTest(1000); // passes extracted parasitics
doOneTest(1001); // passes extracted parasitics
doOneTest(1003); // passes extracted parasitics
import java.net.URL;
import com.sun.electric.database.variable.EvalJavaBsh;
-//FileMenu.openLibraryCommand(new URL("file:../electric/aMarinaM.jelib"));
-
-URL file = new URL("file:../electric/aMarinaM.jelib");
+URL file = new URL("file:../electric/marina_padframe.delib");
String fileName = file.getFile();
ReadLibrary job =
new ReadLibrary(file,
TextUtils.getFilePath(file),
null, null, null);
-
-EvalJavaBsh.runScriptJob("marina.bsh").startJob();
+EvalJavaBsh.runScriptJob("marina-netlist2.bsh").startJob();
--- /dev/null
+/* marina.bsh */
+
+import com.sun.electric.plugins.menus.ScanChainXML;
+
+/*
+ * Create a ScanChainXML object
+ */
+
+import com.sun.electric.tool.user.menus.FileMenu;
+import com.sun.electric.tool.user.menus.FileMenu.ReadLibrary;
+import com.sun.electric.tool.simulation.Simulation;
+import com.sun.electric.tool.io.output.Output;
+import com.sun.electric.tool.io.FileType;
+import com.sun.electric.database.hierarchy.EDatabase;
+import com.sun.electric.database.text.TextUtils;
+import com.sun.electric.tool.Job;
+import java.lang.Thread;
+import java.net.URL;
+import com.sun.electric.database.variable.EvalJavaBsh;
+import com.sun.electric.database.hierarchy.View;
+
+Simulation.setVerilogStopAtStandardCells(false);
+for (Library lib : EDatabase.clientDatabase().getLibraries()) {
+ for (Cell c : lib.getCells()) {
+ if (c.getName().equals("marinaPadframe") && c.getView()==View.SCHEMATIC) {
+ Output.exportCellCommand(c, null, "marina.v", FileType.VERILOG, null);
+ Output.exportCellCommand(c, null, "marina.schematic-parasitics.spi", FileType.SPICE, null);
+ }
+ }
+}
+
--- /dev/null
+import com.sun.electric.tool.user.menus.FileMenu;
+import com.sun.electric.tool.user.menus.FileMenu.ReadLibrary;
+import com.sun.electric.tool.simulation.Simulation;
+import com.sun.electric.tool.io.output.Output;
+import com.sun.electric.tool.io.FileType;
+import com.sun.electric.database.hierarchy.EDatabase;
+import com.sun.electric.database.text.TextUtils;
+import com.sun.electric.tool.Job;
+import java.lang.Thread;
+import java.net.URL;
+import com.sun.electric.database.variable.EvalJavaBsh;
+
+URL file = new URL("file:../electric/marina_padframe.delib");
+String fileName = file.getFile();
+ReadLibrary job =
+ new ReadLibrary(file,
+ FileMenu.getLibraryFormat(fileName, null),
+ TextUtils.getFilePath(file),
+ null, null, null);
+
+EvalJavaBsh.runScriptJob("marina-xml1.bsh").startJob();
+
-/* marina.bsh */
-
import com.sun.electric.plugins.menus.ScanChainXML;
/*
import com.sun.electric.database.hierarchy.View;
Simulation.setVerilogStopAtStandardCells(false);
-for (Library lib : EDatabase.clientDatabase().getLibraries()) {
- for (Cell c : lib.getCells()) {
- if (c.getName().equals("marinaOutDock") && c.getView()==View.SCHEMATIC) {
- Output.exportCellCommand(c, null, "marina.v", FileType.VERILOG, null);
- Output.exportCellCommand(c, null, "marina.schematic-parasitics.spi", FileType.SPICE, null);
- }
- }
-}
ScanChainXML gen = new ScanChainXML();
// data out bar port name (may be "" or null).
// Both data out and data out bar must be specified or left out.
- gen.addScanChainElement("scanK", "scanCellKh", "R", "-", "sin", "sout", "din[1](R)", "");
+ //gen.addScanChainElement("scanK", "scanCellKh", "R", "-", "sin", "sout", "din[1](R)", "");
gen.addScanChainElement("countersL", "cntScnOne", "RW", "-", "sin", "out", "out(R)", "latch2in@0.dataBar(WI)");
gen.addScanChainElement("scanM", "scanCellE", "RW", "-", "sin", "sout", "dIn[1](R)", "latch2in@0.dataBar(WI)");
gen.setChipName("marina");
- // gen.addJtagPort(1, "leaf0[1]", "leaf0[8]", "jtag_lvds");
- // gen.addJtagPort(1, "leaf1[1]", "leaf1[8]", "jtag_noise");
- // gen.addJtagPort(2, "leaf2[1]", "leaf2[8]", "jtag_exp");
-
// Generate xml for isolatedInDock only. This is for simulations that include only
// one input dock.
gen.setOutput("marina.xml");
+ gen.addJtagPort(0, "leaf0[1]", "leaf0[8]", "compare_report");
+ gen.addJtagPort(1, "leaf1[1]", "leaf1[8]", "compare_control");
+ gen.addJtagPort(2, "leaf2[1]", "leaf2[8]", "compare_data");
+ gen.addJtagPort(3, "leaf3[1]", "leaf3[8]", "ivan_report");
+ gen.addJtagPort(4, "leaf4[1]", "leaf4[8]", "ivan_data");
+ gen.addJtagPort(5, "leaf5[1]", "leaf5[8]", "ivan_control");
+ gen.addJtagPort(6, "leaf6[1]", "leaf6[8]", "marina_report");
+ gen.addJtagPort(7, "leaf7[1]", "leaf7[8]", "marina_control");
+ gen.addJtagPort(8, "leaf8[1]", "leaf8[8]", "marina_data");
+ gen.addJtagPort(12, "leaf12[1]", "leaf12[8]", "duke");
+/*
gen.startFromExport("sir[1]", "marina_report");
gen.startFromExport("sic[1]", "marina_control");
gen.startFromExport("sid[1]", "marina_data");
- gen.start("aMarinaM","marinaOutDock{sch}");
+*/
+ gen.start("marina_padframe","marinaPadframe{sch}");
projects / fleet.git / commitdiff