misc improvements to Makefile

diff --git a/Makefile b/Makefile
index 32f652c..c077d22 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -29,21 +29,28 @@ fleet.jar: $(java_files) $(ship_files) src/edu/berkeley/fleet/assembler/fleet.g
 
 ## Fpga ####################################################################################
 
-host = intel2950-3.eecs.berkeley.edu
-remote_xilinx = /scratch/megacz/xilinx/
+host = intel2950-5.eecs.berkeley.edu
+remote_ise = /tools/xilinx/ISE9.1i_lin
+remote_edk = /tools/xilinx/EDK9.1i_lin
 remote_dir = /scratch/megacz/fleet/
 
 #host = mm2.millennium.berkeley.edu
-#remote_xilinx = /scratch/megacz/xilinx/
+#remote_ise = /scratch/megacz/xilinx/ise/
+#remote_edk = /scratch/megacz/xilinx/edk/
 #remote_dir = /scratch/megacz/fleet/
 
+
 xilinx =  cd build/fpga;
-xilinx += LD_LIBRARY_PATH=$$LD_LIBRARY_PATH:$(XILINX)/bin/lin
-xilinx += XILINX=$(XILINX)
-xilinx += PATH=$$PATH:$(XILINX)/bin/lin
-xilinx += $(XILINX)/bin/lin/
+xilinx += LD_LIBRARY_PATH=$$LD_LIBRARY_PATH:$(remote_ise)/bin/lin:$(remote_edk)/bin/lin
+xilinx += PATH=$$PATH:$(remote_ise)/bin/lin:$(remote_edk)/bin/lin
+xilinx += XST_VERSION=9.2i
+xilinx += XILINX=$(remote_ise)
+xilinx += XILINX_EDK=$(remote_edk)
+xilinx += $(remote_ise)/bin/lin/
 
-device = xc4vfx60-11ff1152
+speed_grade = 11
+device = xc4vfx60ff1152-${speed_grade}
+#device = xc2vp70-7ff1704
 
 upload: fleet.jar build/fpga/main.bit
        mkdir -p build
@@ -53,14 +60,15 @@ build/fpga/main.bit: $(java_files) $(ship_files)
        make fleet.jar
        mkdir -p build/fpga
        $(java) $(cp) edu.berkeley.fleet.fpga.Fpga build/fpga/
-       cp src/edu/berkeley/fleet/fpga/* build/fpga
+       cp src/edu/berkeley/fleet/fpga/* build/fpga || true
        for A in `find ships -name \*.ship`;\
          do java -cp build/class edu.berkeley.fleet.Main target=fpga expand $$A;\
          done
        rsync -zare ssh --progress --delete --verbose ./ ${host}:${remote_dir}
-       time ssh ${host} 'make -C ${remote_dir} synth XILINX=${remote_xilinx}'
+       time ssh ${host} 'make -C ${remote_dir} synth XILINX=${remote_ise} remote_ise=${remote_ise} remote_edk=${remote_edk}'
        scp ${host}:${remote_dir}/build/fpga/main.bit build/fpga/
 
+pcore = ${remote_edk}/hw/XilinxProcessorIPLib/pcores
 synth:
        cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/* .
        cd build/fpga; echo work > main.lso