-\color{black}
-%\pagebreak
-%\subsection{{\tt takeOuterLoopCounter}}
-%
-%\setlength{\bitwidth}{5mm}
-%{\tt
-%\begin{bytefield}{25}
-% \bitheader[b]{16-19,21}\\
-%\color{light}
-% \bitbox{1}{A}
-% \bitbox{1}{OS}
-% \bitbox{2}{P}
-%\color{black}
-% \bitbox{3}{000}
-% \bitbox{1}{0}
-% \bitbox{2}{11}
-%\color{light}
-% \bitbox[tbr]{16}{}
-%\color{black}
-%\end{bytefield}}
-%
-%This instruction copies the value in the outer loop counter {\tt OLC}
-%into the least significant bits of the data latch and leaves all other
-%bits of the data latch unchanged.
-%
-%\subsection{{\tt takeInnerLoopCounter}}
-%
-%\setlength{\bitwidth}{5mm}
-%{\tt
-%\begin{bytefield}{25}
-% \bitheader[b]{16-19,21}\\
-%\color{light}
-% \bitbox{1}{A}
-% \bitbox{1}{OS}
-% \bitbox{2}{P}
-%\color{black}
-% \bitbox{3}{???}
-% \bitbox{1}{?}
-% \bitbox{2}{??}
-%\color{light}
-% \bitbox[tbr]{16}{}
-%\color{black}
-%\end{bytefield}}
-%
-%This instruction copies the value in the inner loop counter {\tt ILC}
-%into the least significant bits of the data latch and leaves all other
-%bits of the data latch unchanged.
-%
-%
-%
-%%\pagebreak
-%%\subsection{{\tt interrupt}}
-%%
-%%\setlength{\bitwidth}{5mm}
-%{\tt
-%\begin{bytefield}{25}
-% \bitheader[b]{0,5,16-19,21}\\
-%\color{light}
-% \bitbox{4}{}
-%\color{black}
-% \bitbox{3}{000}
-% \bitbox{1}{1}
-% \bitbox{2}{00}
-%\color{light}
-% \bitbox[tbr]{16}{}
-%\end{bytefield}}
-%
-%When an {\tt interrupt} instruction reaches {\tt IH}, it will wait
-%there for the {\tt OD} stage to be full with an instruction that has
-%the {\tt IM} bit set. When this occurs, the instruction at {\tt OD}
-%{\it will not execute}, but {\it may reloop} if the conditions for
-%relooping are met.
-%\footnote{The ability to interrupt an instruction yet have it reloop is very
-%useful for processing chunks of data with a fixed size header and/or
-%footer and a variable length body.}
-%
-%
-%\subsection{{\tt massacre}}
-%
-%\setlength{\bitwidth}{5mm}
-%{\tt
-%\begin{bytefield}{25}
-% \bitheader[b]{16-19,21}\\
-%\color{light}
-% \bitbox{4}{}
-%\color{black}
-% \bitbox{3}{000}
-% \bitbox{1}{1}
-% \bitbox{2}{01}
-%\color{light}
-% \bitbox[tbr]{16}{}
-%\color{black}
-%\end{bytefield}}
-%
-%When a {\tt massacre} instruction reaches {\tt IH}, it will wait there
-%for the {\tt OD} stage to be full with an instruction that has the
-%{\tt IM} bit set. When this occurs, all instructions in the
-%instruction fifo (including {\tt OD}) are retired.
-%
-%\subsection{{\tt clog}}
-%
-%\setlength{\bitwidth}{5mm}
-%{\tt
-%\begin{bytefield}{25}
-% \bitheader[b]{16-19,21}\\
-%\color{light}
-% \bitbox{4}{}
-%\color{black}
-% \bitbox{3}{000}
-% \bitbox{1}{1}
-% \bitbox{2}{10}
-%\color{light}
-% \bitbox[tbr]{16}{}
-%\color{black}
-%\end{bytefield}}
-%
-%When a {\tt clog} instruction reaches {\tt OD}, it remains there and
-%no more instructions will be executed until an {\tt unclog} is
-%performed.
-%
-%\subsection{{\tt unclog}}
-%
-%\setlength{\bitwidth}{5mm}
-%{\tt
-%\begin{bytefield}{25}
-% \bitheader[b]{16-19,21}\\
-%\color{light}
-% \bitbox{4}{}
-%\color{black}
-% \bitbox{3}{000}
-% \bitbox{1}{1}
-% \bitbox[lrtb]{2}{11}
-%\color{light}
-% \bitbox[tbr]{16}{}
-%\color{black}
-%\end{bytefield}}
-%
-%When an {\tt unclog} instruction reaches {\tt IH}, it will wait there
-%until a {\tt clog} instruction is at {\tt OD}. When this occurs, both
-%instructions retire.
-%
-%Note that issuing an {\tt unclog} instruction to a dock which is not
-%clogged and whose instruction fifo contains no {\tt clog} instructions
-%will cause the dock to deadlock.
-
-\pagebreak
-\section*{Marina Errata}
-
-The following additional restrictions have been imposed on the dock in
-the Marina test chip:
-
-\subsection*{All Versions}
-
-\begin{enumerate}
-
-\item
-A Marina dock initializes with the {\tt ILC}, {\tt OLC}, and flags in
-an indeterminate state.
-
-\item
-The instruction immediately after a {\tt move} instruction must not be
-a {\tt set flags} instruction which utilizes the {\tt C}-flag (the
-value of the {\tt C}-flag is not stable for a brief time after a {\tt
- move}).
-
-\color{red}
-
-\item
-If a {\tt move} instruction is torpedoable (ie it has the {\tt I} bit
-set to {\tt 0}), it {\it must} have either the {\tt Ti} bit or {\tt
- Di} bit set (or both). It is not permitted for a torpedoable {\tt
- move} to have both bits cleared.
-
-\color{black}
-
-\end{enumerate}
-
-
-\subsection*{Marina with Ivan's Counter}
-
-\begin{enumerate}
-
-\item
-
-A torpedoable {\tt move} instruction must not be followed immediately
-by a {\tt set olc} instruction or another torpedoable {\tt move}.
-
-\item
-
-This document specifies that when a torpedoable {\tt move} instruction
-executes successfully, the \color{red}{\tt Z}\color{black} flag is unchanged. In Marina, when
-a torpedoable {\tt move} instruction executes successfully, it causes
-the \color{red}{\tt Z}\color{black} flag to be set if the {\tt OLC} was zero and causes it to
-be cleared if the {\tt OLC} was nonzero. Thus, in the following
-instruction sequence:
-
- \begin{verbatim}
- head;
- [*] set olc=1;
- send token to self:i;
- [T] recv token;
- [*] send token to self;
- [T] recv token;
- [*] abort;
- tail;
- \end{verbatim}
-
-Will leave the \color{red}{\tt Z}\color{black} flag {\it set} on Marina, whereas a strict
-implementation of this document would leave it cleared.
-
-In practice, this distinction rarely matters.
-
-\end{enumerate}
-
-\subsection*{Marina with Kessels Counter}
-
-With the Kessels counter, the \color{red}{\tt Z}\color{black}-flag {\it is exactly equal to}
-the zeroness of the {\tt OLC}; it cannot be ``out of sync'' with it.
-
-\begin{enumerate}
-
-\item
-Every ``load OLC'' instruction must be predicated on the \color{red}{\tt Z}\color{black}-flag
-being {\it set}. This is a sneaky way of forcing the programmer to
-``run down'' the counter before loading it, because Kessels' counter
-does not support ``unloading.''
-
-\item
-Every ``decrement OLC'' instruction must be predicated on the {\tt
- D}-flag being {\it cleared}. This way we never have to check if the
-counter is already empty before decrementing.
-
-\item
-The instruction after a torpedoable {\tt move} must not be predicated
-on the \color{red}{\tt Z}\color{black}-flag being {\it set} (it may be predicated on the {\tt
- D}-flag being {\it cleared}. This is because, while the move
-instruction is waiting to execute, the \color{red}{\tt Z}\color{black}-flag will be cleared,
-and the predicate stage believes that it can skip the instruction even
-though {\tt do[ins]} is still high (I think this is dumb).
-
-
-\end{enumerate}
-
-\color{black}
-
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