1 -- | Graph coloring register allocator.
4 -- Live range splitting:
5 -- At the moment regs that are spilled are spilled for all time, even though
6 -- we might be able to allocate them a hardreg in different parts of the code.
8 -- As we're aggressively coalescing before register allocation proper we're not currently
9 -- using the coalescence information present in the graph.
11 -- The function that choosing the potential spills could be a bit cleverer.
13 -- Colors in graphviz graphs could be nicer.
15 {-# OPTIONS -fno-warn-missing-signatures #-}
17 module RegAllocColor (
24 import qualified GraphColor as Color
43 -- | The maximum number of build/spill cycles we'll allow.
44 -- We should only need 3 or 4 cycles tops.
45 -- If we run for any longer than this we're probably in an infinite loop,
46 -- It's probably better just to bail out and report a bug at this stage.
51 -- | The top level of the graph coloring register allocator.
54 :: Bool -- ^ whether to generate RegAllocStats, or not.
55 -> UniqFM (UniqSet Reg) -- ^ the registers we can use for allocation
56 -> UniqSet Int -- ^ the set of available spill slots.
57 -> [LiveCmmTop] -- ^ code annotated with liveness information.
59 ( [NatCmmTop] -- ^ code with registers allocated.
60 , [RegAllocStats] ) -- ^ stats for each stage of allocation
62 regAlloc dump regsFree slotsFree code
64 (code_final, debug_codeGraphs, _)
65 <- regAlloc_spin dump 0 trivColorable regsFree slotsFree [] code
68 , reverse debug_codeGraphs )
70 regAlloc_spin dump (spinCount :: Int) triv regsFree slotsFree debug_codeGraphs code
72 -- check that we're not running off down the garden path.
73 when (spinCount > maxSpinCount)
74 $ pprPanic "regAlloc_spin: max build/spill cycle count exceeded."
75 ( text "It looks like the register allocator is stuck in an infinite loop."
76 $$ text "max cycles = " <> int maxSpinCount
77 $$ text "regsFree = " <> (hcat $ punctuate space $ map (docToSDoc . pprUserReg)
78 $ uniqSetToList $ unionManyUniqSets $ eltsUFM regsFree)
79 $$ text "slotsFree = " <> ppr (sizeUniqSet slotsFree))
81 -- build a conflict graph from the code.
82 graph <- {-# SCC "BuildGraph" #-} buildGraph code
84 -- build a map of how many instructions each reg lives for.
85 -- this is lazy, it won't be computed unless we need to spill
87 let fmLife = {-# SCC "LifetimeCount" #-} plusUFMs_C (\(r1, l1) (_, l2) -> (r1, l1 + l2))
88 $ map lifetimeCount code
90 -- record startup state
93 then Just $ RegAllocStatsStart
96 , raLifetimes = fmLife }
100 -- the function to choose regs to leave uncolored
101 let spill = chooseSpill_maxLife fmLife
103 -- try and color the graph
104 let (graph_colored, rsSpill, rmCoalesce)
105 = {-# SCC "ColorGraph" #-} Color.colorGraph regsFree triv spill graph
107 -- rewrite regs in the code that have been coalesced
108 let patchF reg = case lookupUFM rmCoalesce reg of
112 = map (patchEraseLive patchF) code
115 -- see if we've found a coloring
116 if isEmptyUniqSet rsSpill
118 -- patch the registers using the info in the graph
119 let code_patched = map (patchRegsFromGraph graph_colored) code_coalesced
121 -- clean out unneeded SPILL/RELOADs
122 let code_spillclean = map cleanSpills code_patched
124 -- strip off liveness information
125 let code_nat = map stripLive code_patched
127 -- rewrite SPILL/REALOAD pseudos into real instructions
128 let spillNatTop = mapGenBlockTop spillNatBlock
129 let code_final = map spillNatTop code_nat
131 -- record what happened in this stage for debugging
134 { raGraph = graph_colored
135 , raCoalesced = rmCoalesce
136 , raPatched = code_patched
137 , raSpillClean = code_spillclean
138 , raFinal = code_final
139 , raSRMs = foldl addSRM (0, 0, 0) $ map countSRMs code_spillclean }
143 then [stat] ++ maybeToList stat1 ++ debug_codeGraphs
148 -- spill the uncolored regs
149 (code_spilled, slotsFree', spillStats)
150 <- regSpill code_coalesced slotsFree rsSpill
152 -- recalculate liveness
153 let code_nat = map stripLive code_spilled
154 code_relive <- mapM regLiveness code_nat
156 -- record what happened in this stage for debugging
159 { raGraph = graph_colored
160 , raCoalesced = rmCoalesce
161 , raSpillStats = spillStats
162 , raLifetimes = fmLife
163 , raSpilled = code_spilled }
166 regAlloc_spin dump (spinCount + 1) triv regsFree slotsFree'
168 then [stat] ++ maybeToList stat1 ++ debug_codeGraphs
174 -- Simple maxconflicts isn't always good, because we
175 -- can naievely end up spilling vregs that only live for one or two instrs.
178 chooseSpill_maxConflicts
179 :: Color.Graph Reg RegClass Reg
182 chooseSpill_maxConflicts graph
183 = let node = maximumBy
185 (sizeUniqSet $ Color.nodeConflicts n1)
186 (sizeUniqSet $ Color.nodeConflicts n2))
187 $ eltsUFM $ Color.graphMap graph
195 -> Color.Graph Reg RegClass Reg
198 chooseSpill_maxLife life graph
199 = let node = maximumBy (\n1 n2 -> compare (getLife n1) (getLife n2))
200 $ eltsUFM $ Color.graphMap graph
202 -- Orphan vregs die in the same instruction they are born in.
203 -- They will be in the graph, but not in the liveness map.
204 -- Their liveness is 0.
206 = case lookupUFM life (Color.nodeId n) of
213 -- | Build a graph from the liveness and coalesce information in this code.
217 -> UniqSM (Color.Graph Reg RegClass Reg)
221 -- Slurp out the conflicts and reg->reg moves from this code
222 let (conflictList, moveList) =
223 unzip $ map slurpConflicts code
225 let conflictBag = unionManyBags conflictList
226 let moveBag = unionManyBags moveList
228 -- Add the reg-reg conflicts to the graph
229 let graph_conflict = foldrBag graphAddConflictSet Color.initGraph conflictBag
231 -- Add the coalescences edges to the graph.
232 let graph_coalesce = foldrBag graphAddCoalesce graph_conflict moveBag
234 return graph_coalesce
237 -- | Add some conflict edges to the graph.
238 -- Conflicts between virtual and real regs are recorded as exclusions.
242 -> Color.Graph Reg RegClass Reg
243 -> Color.Graph Reg RegClass Reg
245 graphAddConflictSet set graph
246 = let reals = filterUFM isRealReg set
247 virtuals = filterUFM (not . isRealReg) set
249 graph1 = Color.addConflicts virtuals regClass graph
250 graph2 = foldr (\(r1, r2) -> Color.addExclusion r1 regClass r2)
253 | a <- uniqSetToList virtuals
254 , b <- uniqSetToList reals]
259 -- | Add some coalesence edges to the graph
260 -- Coalesences between virtual and real regs are recorded as preferences.
264 -> Color.Graph Reg RegClass Reg
265 -> Color.Graph Reg RegClass Reg
267 graphAddCoalesce (r1, r2) graph
269 = Color.addPreference (regWithClass r2) r1 graph
272 = Color.addPreference (regWithClass r1) r2 graph
275 = Color.addCoalesce (regWithClass r1) (regWithClass r2) graph
277 where regWithClass r = (r, regClass r)
280 -- | Patch registers in code using the reg -> reg mapping in this graph.
282 :: Color.Graph Reg RegClass Reg
283 -> LiveCmmTop -> LiveCmmTop
285 patchRegsFromGraph graph code
287 -- a function to lookup the hardreg for a virtual reg from the graph.
289 -- leave real regs alone.
293 -- this virtual has a regular node in the graph.
294 | Just node <- Color.lookupNode graph reg
295 = case Color.nodeColor node of
299 -- no node in the graph for this virtual, bad news.
301 = pprPanic "patchRegsFromGraph: register mapping failed."
302 ( text "There is no node in the graph for register " <> ppr reg
304 $$ Color.dotGraph (\_ -> text "white") trivColorable graph)
306 in patchEraseLive patchF code
309 plusUFMs_C :: (elt -> elt -> elt) -> [UniqFM elt] -> UniqFM elt
311 = foldl (plusUFM_C f) emptyUFM maps