2 -- squeese functions for the graph allocator
25 EABase(..), EAIndex(..), addrModeRegs,
27 eax, ebx, ecx, edx, esi, edi, ebp, esp,
28 fake0, fake1, fake2, fake3, fake4, fake5,
30 rax, rbx, rcx, rdx, rsi, rdi, rbp, rsp,
31 r8, r9, r10, r11, r12, r13, r14, r15,
32 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
33 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
43 get_GlobalReg_reg_or_addr,
49 #include "nativeGen/NCG.h"
50 #include "HsVersions.h"
53 # define STOLEN_X86_REGS 4
54 -- HACK: go for the max
57 #include "../includes/MachRegs.h"
62 import CgUtils ( get_GlobalReg_addr )
65 import CLabel ( CLabel )
67 import Outputable ( panic )
68 import qualified Outputable
73 #if defined(i386_TARGET_ARCH) || defined(x86_64_TARGET_ARCH)
78 -- | regSqueeze_class reg
79 -- Calculuate the maximum number of register colors that could be
80 -- denied to a node of this class due to having this reg
83 {-# INLINE virtualRegSqueeze #-}
84 virtualRegSqueeze :: RegClass -> VirtualReg -> FastInt
86 virtualRegSqueeze cls vr
90 VirtualRegI{} -> _ILIT(1)
91 VirtualRegHi{} -> _ILIT(1)
92 VirtualRegD{} -> _ILIT(0)
93 VirtualRegF{} -> _ILIT(0)
95 -- We don't use floats on this arch, but we can't
96 -- return error because the return type is unboxed...
99 VirtualRegI{} -> _ILIT(0)
100 VirtualRegHi{} -> _ILIT(0)
101 VirtualRegD{} -> _ILIT(0)
102 VirtualRegF{} -> _ILIT(0)
106 VirtualRegI{} -> _ILIT(0)
107 VirtualRegHi{} -> _ILIT(0)
108 VirtualRegD{} -> _ILIT(1)
109 VirtualRegF{} -> _ILIT(0)
113 #if defined(i386_TARGET_ARCH)
114 {-# INLINE realRegSqueeze #-}
115 realRegSqueeze :: RegClass -> RealReg -> FastInt
117 realRegSqueeze cls rr
122 | regNo < 8 -> _ILIT(1) -- first fp reg is 8
123 | otherwise -> _ILIT(0)
125 RealRegPair{} -> _ILIT(0)
127 -- We don't use floats on this arch, but we can't
128 -- return error because the return type is unboxed...
132 | regNo < 8 -> _ILIT(0)
133 | otherwise -> _ILIT(0)
135 RealRegPair{} -> _ILIT(0)
140 | regNo < 8 -> _ILIT(0)
141 | otherwise -> _ILIT(1)
143 RealRegPair{} -> _ILIT(0)
145 #elif defined(x86_64_TARGET_ARCH)
146 realRegSqueeze cls rr
151 | regNo < 16 -> _ILIT(1) -- first xmm reg is 16
152 | otherwise -> _ILIT(0)
154 RealRegPair{} -> _ILIT(0)
156 -- We don't use floats on this arch, but we can't
157 -- return error because the return type is unboxed...
161 | regNo < 16 -> _ILIT(0)
162 | otherwise -> _ILIT(0)
164 RealRegPair{} -> _ILIT(0)
169 | regNo < 16 -> _ILIT(0)
170 | otherwise -> _ILIT(1)
172 RealRegPair{} -> _ILIT(0)
175 realRegSqueeze = _ILIT(0)
180 -- -----------------------------------------------------------------------------
185 | ImmInteger Integer -- Sigh.
186 | ImmCLbl CLabel -- AbstractC Label (with baggage)
187 | ImmLit Doc -- Simple string
188 | ImmIndex CLabel Int
191 | ImmConstantSum Imm Imm
192 | ImmConstantDiff Imm Imm
195 strImmLit :: String -> Imm
196 strImmLit s = ImmLit (text s)
199 litToImm :: CmmLit -> Imm
200 litToImm (CmmInt i w) = ImmInteger (narrowS w i)
201 -- narrow to the width: a CmmInt might be out of
202 -- range, but we assume that ImmInteger only contains
203 -- in-range values. A signed value should be fine here.
204 litToImm (CmmFloat f W32) = ImmFloat f
205 litToImm (CmmFloat f W64) = ImmDouble f
206 litToImm (CmmLabel l) = ImmCLbl l
207 litToImm (CmmLabelOff l off) = ImmIndex l off
208 litToImm (CmmLabelDiffOff l1 l2 off)
210 (ImmConstantDiff (ImmCLbl l1) (ImmCLbl l2))
212 litToImm (CmmBlock id) = ImmCLbl (infoTblLbl id)
213 litToImm _ = panic "X86.Regs.litToImm: no match"
215 -- addressing modes ------------------------------------------------------------
218 = AddrBaseIndex EABase EAIndex Displacement
221 data EABase = EABaseNone | EABaseReg Reg | EABaseRip
222 data EAIndex = EAIndexNone | EAIndex Reg Int
223 type Displacement = Imm
226 addrOffset :: AddrMode -> Int -> Maybe AddrMode
229 ImmAddr i off0 -> Just (ImmAddr i (off0 + off))
231 AddrBaseIndex r i (ImmInt n) -> Just (AddrBaseIndex r i (ImmInt (n + off)))
232 AddrBaseIndex r i (ImmInteger n)
233 -> Just (AddrBaseIndex r i (ImmInt (fromInteger (n + toInteger off))))
235 AddrBaseIndex r i (ImmCLbl lbl)
236 -> Just (AddrBaseIndex r i (ImmIndex lbl off))
238 AddrBaseIndex r i (ImmIndex lbl ix)
239 -> Just (AddrBaseIndex r i (ImmIndex lbl (ix+off)))
241 _ -> Nothing -- in theory, shouldn't happen
244 addrModeRegs :: AddrMode -> [Reg]
245 addrModeRegs (AddrBaseIndex b i _) = b_regs ++ i_regs
247 b_regs = case b of { EABaseReg r -> [r]; _ -> [] }
248 i_regs = case i of { EAIndex r _ -> [r]; _ -> [] }
252 -- registers -------------------------------------------------------------------
254 -- @spRel@ gives us a stack relative addressing mode for volatile
255 -- temporaries and for excess call arguments. @fpRel@, where
256 -- applicable, is the same but for the frame pointer.
259 spRel :: Int -- ^ desired stack offset in words, positive or negative
263 spRel n = AddrBaseIndex (EABaseReg esp) EAIndexNone (ImmInt (n * wORD_SIZE))
265 #elif x86_64_TARGET_ARCH
266 spRel n = AddrBaseIndex (EABaseReg rsp) EAIndexNone (ImmInt (n * wORD_SIZE))
269 spRel _ = panic "X86.Regs.spRel: not defined for this architecture"
274 -- argRegs is the set of regs which are read for an n-argument call to C.
275 -- For archs which pass all args on the stack (x86), is empty.
276 -- Sparc passes up to the first 6 args in regs.
277 -- Dunno about Alpha.
278 argRegs :: RegNo -> [Reg]
279 argRegs _ = panic "MachRegs.argRegs(x86): should not be used!"
285 -- | The complete set of machine registers.
286 allMachRegNos :: [RegNo]
289 allMachRegNos = [0..13]
291 #elif x86_64_TARGET_ARCH
292 allMachRegNos = [0..31]
295 allMachRegNos = panic "X86.Regs.callClobberedRegs: not defined for this architecture"
300 -- | Take the class of a register.
301 {-# INLINE classOfRealReg #-}
302 classOfRealReg :: RealReg -> RegClass
305 -- On x86, we might want to have an 8-bit RegClass, which would
306 -- contain just regs 1-4 (the others don't have 8-bit versions).
307 -- However, we can get away without this at the moment because the
308 -- only allocatable integer regs are also 8-bit compatible (1, 3, 4).
311 RealRegSingle i -> if i < 8 then RcInteger else RcDouble
312 RealRegPair{} -> panic "X86.Regs.classOfRealReg: RegPairs on this arch"
314 #elif x86_64_TARGET_ARCH
315 -- On x86, we might want to have an 8-bit RegClass, which would
316 -- contain just regs 1-4 (the others don't have 8-bit versions).
317 -- However, we can get away without this at the moment because the
318 -- only allocatable integer regs are also 8-bit compatible (1, 3, 4).
321 RealRegSingle i -> if i < 16 then RcInteger else RcDouble
322 RealRegPair{} -> panic "X86.Regs.classOfRealReg: RegPairs on this arch"
325 classOfRealReg _ = panic "X86.Regs.regClass: not defined for this architecture"
330 -- | Get the name of the register with this number.
331 showReg :: RegNo -> String
335 = if n >= 0 && n < 14
337 else "%unknown_x86_real_reg_" ++ show n
341 = ["%eax", "%ebx", "%ecx", "%edx", "%esi", "%edi", "%ebp", "%esp",
342 "%fake0", "%fake1", "%fake2", "%fake3", "%fake4", "%fake5", "%fake6"]
344 #elif x86_64_TARGET_ARCH
346 | n >= 16 = "%xmm" ++ show (n-16)
347 | n >= 8 = "%r" ++ show n
348 | otherwise = regNames !! n
352 = ["%rax", "%rbx", "%rcx", "%rdx", "%rsi", "%rdi", "%rbp", "%rsp" ]
355 showReg _ = panic "X86.Regs.showReg: not defined for this architecture"
362 -- machine specific ------------------------------------------------------------
366 Intel x86 architecture:
367 - All registers except 7 (esp) are available for use.
368 - Only ebx, esi, edi and esp are available across a C call (they are callee-saves).
369 - Registers 0-7 have 16-bit counterparts (ax, bx etc.)
370 - Registers 0-3 have 8 bit counterparts (ah, bh etc.)
371 - Registers 8-13 are fakes; we pretend x86 has 6 conventionally-addressable
372 fp registers, and 3-operand insns for them, and we translate this into
373 real stack-based x86 fp code after register allocation.
375 The fp registers are all Double registers; we don't have any RcFloat class
376 regs. @regClass@ barfs if you give it a VirtualRegF, and mkVReg above should
380 fake0, fake1, fake2, fake3, fake4, fake5,
381 eax, ebx, ecx, edx, esp, ebp, esi, edi :: Reg
401 AMD x86_64 architecture:
402 - Registers 0-16 have 32-bit counterparts (eax, ebx etc.)
403 - Registers 0-7 have 16-bit counterparts (ax, bx etc.)
404 - Registers 0-3 have 8 bit counterparts (ah, bh etc.)
408 rax, rbx, rcx, rdx, rsp, rbp, rsi, rdi,
409 r8, r9, r10, r11, r12, r13, r14, r15,
410 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
411 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15 :: Reg
446 allFPArgRegs :: [Reg]
447 allFPArgRegs = map regSingle [16 .. 23]
449 ripRel :: Displacement -> AddrMode
450 ripRel imm = AddrBaseIndex EABaseRip EAIndexNone imm
453 -- so we can re-use some x86 code:
466 xmm n = regSingle (16+n)
471 -- horror show -----------------------------------------------------------------
472 freeReg :: RegNo -> FastBool
473 globalRegMaybe :: GlobalReg -> Maybe RealReg
475 callClobberedRegs :: [Reg]
477 #if defined(i386_TARGET_ARCH) || defined(x86_64_TARGET_ARCH)
496 #if x86_64_TARGET_ARCH
534 freeReg esp = fastBool False -- %esp is the C stack pointer
537 #if x86_64_TARGET_ARCH
538 freeReg rsp = fastBool False -- %rsp is the C stack pointer
542 freeReg REG_Base = fastBool False
545 freeReg REG_R1 = fastBool False
548 freeReg REG_R2 = fastBool False
551 freeReg REG_R3 = fastBool False
554 freeReg REG_R4 = fastBool False
557 freeReg REG_R5 = fastBool False
560 freeReg REG_R6 = fastBool False
563 freeReg REG_R7 = fastBool False
566 freeReg REG_R8 = fastBool False
569 freeReg REG_F1 = fastBool False
572 freeReg REG_F2 = fastBool False
575 freeReg REG_F3 = fastBool False
578 freeReg REG_F4 = fastBool False
581 freeReg REG_D1 = fastBool False
584 freeReg REG_D2 = fastBool False
587 freeReg REG_Sp = fastBool False
590 freeReg REG_Su = fastBool False
593 freeReg REG_SpLim = fastBool False
596 freeReg REG_Hp = fastBool False
599 freeReg REG_HpLim = fastBool False
601 freeReg _ = fastBool True
604 -- | Returns 'Nothing' if this global register is not stored
605 -- in a real machine register, otherwise returns @'Just' reg@, where
606 -- reg is the machine register it is stored in.
609 globalRegMaybe BaseReg = Just (RealRegSingle REG_Base)
612 globalRegMaybe (VanillaReg 1 _) = Just (RealRegSingle REG_R1)
615 globalRegMaybe (VanillaReg 2 _) = Just (RealRegSingle REG_R2)
618 globalRegMaybe (VanillaReg 3 _) = Just (RealRegSingle REG_R3)
621 globalRegMaybe (VanillaReg 4 _) = Just (RealRegSingle REG_R4)
624 globalRegMaybe (VanillaReg 5 _) = Just (RealRegSingle REG_R5)
627 globalRegMaybe (VanillaReg 6 _) = Just (RealRegSingle REG_R6)
630 globalRegMaybe (VanillaReg 7 _) = Just (RealRegSingle REG_R7)
633 globalRegMaybe (VanillaReg 8 _) = Just (RealRegSingle REG_R8)
636 globalRegMaybe (VanillaReg 9 _) = Just (RealRegSingle REG_R9)
639 globalRegMaybe (VanillaReg 10 _) = Just (RealRegSingle REG_R10)
642 globalRegMaybe (FloatReg 1) = Just (RealRegSingle REG_F1)
645 globalRegMaybe (FloatReg 2) = Just (RealRegSingle REG_F2)
648 globalRegMaybe (FloatReg 3) = Just (RealRegSingle REG_F3)
651 globalRegMaybe (FloatReg 4) = Just (RealRegSingle REG_F4)
654 globalRegMaybe (DoubleReg 1) = Just (RealRegSingle REG_D1)
657 globalRegMaybe (DoubleReg 2) = Just (RealRegSingle REG_D2)
660 globalRegMaybe Sp = Just (RealRegSingle REG_Sp)
663 globalRegMaybe (LongReg 1) = Just (RealRegSingle REG_Lng1)
666 globalRegMaybe (LongReg 2) = Just (RealRegSingle REG_Lng2)
669 globalRegMaybe SpLim = Just (RealRegSingle REG_SpLim)
672 globalRegMaybe Hp = Just (RealRegSingle REG_Hp)
675 globalRegMaybe HpLim = Just (RealRegSingle REG_HpLim)
677 #ifdef REG_CurrentTSO
678 globalRegMaybe CurrentTSO = Just (RealRegSingle REG_CurrentTSO)
680 #ifdef REG_CurrentNursery
681 globalRegMaybe CurrentNursery = Just (RealRegSingle REG_CurrentNursery)
683 globalRegMaybe _ = Nothing
688 allArgRegs = panic "X86.Regs.allArgRegs: should not be used!"
690 #elif x86_64_TARGET_ARCH
691 allArgRegs = map regSingle [rdi,rsi,rdx,rcx,r8,r9]
694 allArgRegs = panic "X86.Regs.allArgRegs: not defined for this architecture"
698 -- | these are the regs which we cannot assume stay alive over a C call.
701 -- caller-saves registers
703 = map regSingle [eax,ecx,edx,fake0,fake1,fake2,fake3,fake4,fake5]
705 #elif x86_64_TARGET_ARCH
706 -- all xmm regs are caller-saves
707 -- caller-saves registers
709 = map regSingle ([rax,rcx,rdx,rsi,rdi,r8,r9,r10,r11] ++ [16..31])
713 = panic "X86.Regs.callClobberedRegs: not defined for this architecture"
716 #else /* i386_TARGET_ARCH || x86_64_TARGET_ARCH */
721 globalRegMaybe _ = panic "X86.Regs.globalRegMaybe: not defined"
723 allArgRegs = panic "X86.Regs.globalRegMaybe: not defined"
724 callClobberedRegs = panic "X86.Regs.globalRegMaybe: not defined"
729 -- We map STG registers onto appropriate CmmExprs. Either they map
730 -- to real machine registers or stored as offsets from BaseReg. Given
731 -- a GlobalReg, get_GlobalReg_reg_or_addr produces either the real
732 -- register it is in, on this platform, or a CmmExpr denoting the
733 -- address in the register table holding it.
734 -- (See also get_GlobalReg_addr in CgUtils.)
736 get_GlobalReg_reg_or_addr :: GlobalReg -> Either RealReg CmmExpr
737 get_GlobalReg_reg_or_addr mid
738 = case globalRegMaybe mid of
740 Nothing -> Right (get_GlobalReg_addr mid)
743 -- allocatableRegs is allMachRegNos with the fixed-use regs removed.
744 -- i.e., these are the regs for which we are prepared to allow the
745 -- register allocator to attempt to map VRegs to.
746 allocatableRegs :: [RealReg]
748 = let isFree i = isFastTrue (freeReg i)
749 in map RealRegSingle $ filter isFree allMachRegNos