ghc/misc/spat-analysers/stgregs.c

   1 #include <stdio.h>
   2 #include <sparc.h>
   3
   4 #include "StgRegAddrs.h"
   5
   6 #define CHECKPOINT 1000000      /* reporting frequency */
   7 static int countdown = CHECKPOINT;
   8
   9 struct regcount {
  10     char *str;
  11     int load;
  12     int store;
  13 } info[] = {
  14   {"SpA", 0, 0},
  15   {"SpB", 0, 0},
  16   {"Hp", 0, 0},
  17   {"HpLim", 0, 0},
  18   {"SuA", 0, 0},
  19   {"SuB", 0, 0},
  20   {"UpdReg", 0, 0},
  21   {"RetVecReg", 0, 0},
  22   {"TagReg", 0, 0},
  23   {"Ret1", 0, 0},
  24   {"Ret2", 0, 0},
  25   {"Ret3", 0, 0},
  26   {"Ret4", 0, 0},
  27   {"Ret5", 0, 0},
  28   {"Ret6", 0, 0},
  29   {"Ret7", 0, 0},
  30   {"Ret8", 0, 0},
  31   {0, 0, 0}
  32 };
  33
  34 void
  35 printregs(msg)
  36 char *msg;
  37 {
  38     FILE *output;
  39     int i;
  40     if ((output = fopen("REGSTATS", "w")) == 0)
  41         syserr("cannot open statistics file REGSTATS\n");
  42
  43     fprintf(output, "%s\n", msg);
  44     for (i = 0; info[i].str; i++) {
  45         fprintf(output, "%-16.16s %8d %8d\n",
  46                 info[i].str, info[i].load, info[i].store);
  47     }
  48     fclose(output);
  49 }
  50
  51 #define RECORD(i)               \
  52     if ( (OP3(t->iw)&014) == 004) { \
  53         info[i].store++;        \
  54     } else {                    \
  55         info[i].load++;         \
  56     }                           \
  57     /* fprintf(stderr, "%s\n", info[i].str); */ \
  58     break
  59
  60 void
  61 analyze (t, tend)
  62         TRACE   *t, *tend;
  63 {
  64     countdown -= tend-t;
  65
  66     for (; t < tend; t++) {
  67         if (OP(t->iw) == 3 &&   /* Load/store; (OP3(t->iw)&014)==004) => store */
  68             !(t->flags & ANNULLED)) {
  69             unsigned a = (unsigned)t->ea;
  70             switch (a) {
  71               case SpA:
  72                 RECORD(0);
  73               case SpB:
  74                 RECORD(1);
  75               case Hp:
  76                 RECORD(2);
  77               case HpLim:
  78                 RECORD(3);
  79               case SuA:
  80                 RECORD(4);
  81               case SuB:
  82                 RECORD(5);
  83               case UpdReg:
  84                 RECORD(6);
  85               case RetVecReg:
  86                 RECORD(7);
  87               case TagReg:
  88                 RECORD(8);
  89               case Ret1:
  90                 RECORD(9);
  91               case Ret2:
  92                 RECORD(10);
  93               case Ret3:
  94                 RECORD(11);
  95               case Ret4:
  96                 RECORD(12);
  97               case Ret5:
  98                 RECORD(13);
  99               case Ret6:
 100                 RECORD(14);
 101               case Ret7:
 102                 RECORD(15);
 103               case Ret8:
 104                 RECORD(16);
 105               deafualt:
 106                 break;
 107             }
 108         }
 109     }
 110
 111     if (countdown <= 0) {
 112         printregs("Intermediate:");
 113         countdown = CHECKPOINT;
 114     }
 115 }
 116
 117 void
 118 terminate()
 119 {
 120     printregs("Final:");
 121 }