Fix some holes in the SPARC native code generator.

[ghc-hetmet.git] / compiler / nativeGen / MachRegs.lhs

diff --git a/compiler/nativeGen/MachRegs.lhs b/compiler/nativeGen/MachRegs.lhs
index 9699a11..9c80423 100644 (file)
--- a/compiler/nativeGen/MachRegs.lhs
+++ b/compiler/nativeGen/MachRegs.lhs
@@ -74,7 +74,7 @@ module MachRegs (
        addrModeRegs, allFPArgRegs,
 #endif
 #if sparc_TARGET_ARCH
-       fits13Bits,
+       fits13Bits, 
        fpRel, gReg, iReg, lReg, oReg, largeOffsetError,
        fp, sp, g0, g1, g2, o0, o1, f0, f6, f8, f26, f27,
 #endif
@@ -194,14 +194,54 @@ data Size
 
 #if sparc_TARGET_ARCH /* || powerpc_TARGET_ARCH */
 data Size
-    = B     -- byte (signed)
-    | Bu    -- byte (unsigned)
-    | H     -- halfword (signed, 2 bytes)
-    | Hu    -- halfword (unsigned, 2 bytes)
-    | W            -- word (4 bytes)
-    | F            -- IEEE single-precision floating pt
-    | DF    -- IEEE single-precision floating pt
+    = II8     -- byte (signed)
+--    | II8u    -- byte (unsigned)
+    | II16    -- halfword (signed, 2 bytes)
+--   | II16u   -- halfword (unsigned, 2 bytes)
+    | II32    -- word (4 bytes)
+    | II64    -- word (8 bytes)
+    | FF32    -- IEEE single-precision floating pt
+    | FF64    -- IEEE single-precision floating pt
   deriving Eq
+
+
+intSize, floatSize :: Width -> Size
+intSize W8  = II8
+--intSize W16 = II16u
+intSize W16 = II16
+intSize W32 = II32
+intSize W64 = II64
+intSize other = pprPanic "MachInstrs.intSize" (ppr other)
+
+floatSize W32 = FF32
+floatSize W64 = FF64
+floatSize other = pprPanic "MachInstrs.intSize" (ppr other)
+
+wordSize :: Size
+wordSize = intSize wordWidth
+
+isFloatSize :: Size -> Bool
+isFloatSize FF32       = True
+isFloatSize FF64       = True
+isFloatSize _          = False
+
+cmmTypeSize :: CmmType -> Size
+cmmTypeSize ty | isFloatType ty = floatSize (typeWidth ty)
+              | otherwise      = intSize (typeWidth ty)
+
+sizeToWidth :: Size -> Width
+sizeToWidth size
+ = case size of
+       II8             -> W8
+--     II8u            -> W8
+       II16            -> W16
+--     II16u           -> W16
+       II32            -> W32
+       II64            -> W64
+       FF32            -> W32
+       FF64            -> W64
+
+
 #endif
 
 -- -----------------------------------------------------------------------------
@@ -229,7 +269,10 @@ data Imm
 strImmLit s = ImmLit (text s)
 
 litToImm :: CmmLit -> Imm
-litToImm (CmmInt i _)        = ImmInteger i
+litToImm (CmmInt i w)        = ImmInteger (narrowS w i)
+                -- narrow to the width: a CmmInt might be out of
+                -- range, but we assume that ImmInteger only contains
+                -- in-range values.  A signed value should be fine here.
 litToImm (CmmFloat f W32)    = ImmFloat f
 litToImm (CmmFloat f W64)    = ImmDouble f
 litToImm (CmmLabel l)        = ImmCLbl l
@@ -491,10 +534,11 @@ mkVReg u size
    = case size of
 #if sparc_TARGET_ARCH
         FF32    -> VirtualRegF u
+       FF64    -> VirtualRegD u
 #else
         FF32    -> VirtualRegD u
-#endif
         FF64    -> VirtualRegD u
+#endif
        _other -> panic "mkVReg"
 
 isVirtualReg :: Reg -> Bool
@@ -607,6 +651,10 @@ worst n classN classC
 #define ALLOCATABLE_REGS_INTEGER (_ILIT(16))
 #define ALLOCATABLE_REGS_DOUBLE  (_ILIT(26))
 
+#elif sparc_TARGET_ARCH
+#define ALLOCATABLE_REGS_INTEGER (_ILIT(3))
+#define ALLOCATABLE_REGS_DOUBLE  (_ILIT(6))
+
 #else
 #error ToDo: define ALLOCATABLE_REGS_INTEGER and ALLOCATABLE_REGS_DOUBLE
 #endif
@@ -1358,6 +1406,7 @@ freeReg rsp = fastBool False  --  %rsp is the C stack pointer
 
 #if sparc_TARGET_ARCH
 freeReg g0 = fastBool False  --        %g0 is always 0.
+
 freeReg g5 = fastBool False  --        %g5 is reserved (ABI).
 freeReg g6 = fastBool False  --        %g6 is reserved (ABI).
 freeReg g7 = fastBool False  --        %g7 is reserved (ABI).
@@ -1367,6 +1416,19 @@ freeReg o6 = fastBool False  --  %o6 is our stack pointer.
 freeReg o7 = fastBool False  --        %o7 holds ret addrs (???)
 freeReg f0 = fastBool False  --  %f0/%f1 are the C fp return registers.
 freeReg f1 = fastBool False
+
+-- TODO: Not sure about these BL 2009/01/10
+--     Used for NCG spill tmps? what is this?
+
+{-
+freeReg g1  = fastBool False  -- %g1 is used for NCG spill tmp
+freeReg g2  = fastBool False 
+freeReg f6  = fastBool False
+freeReg f8  = fastBool False
+freeReg f26 = fastBool False
+freeReg f27 = fastBool False
+-}
+
 #endif
 
 #if powerpc_TARGET_ARCH