%
% (c) The GRASP Project, Glasgow University, 1992-1998
%
-% $Id: CgRetConv.lhs,v 1.16 1998/12/18 17:40:52 simonpj Exp $
+% $Id: CgRetConv.lhs,v 1.17 1999/01/18 14:31:51 sof Exp $
%
\section[CgRetConv]{Return conventions for the code generator}
import AbsCSyn -- quite a few things
import Constants ( mAX_FAMILY_SIZE_FOR_VEC_RETURNS,
mAX_Vanilla_REG, mAX_Float_REG,
- mAX_Double_REG,
+ mAX_Double_REG, mAX_Real_Double_REG,
mAX_Real_Vanilla_REG, mAX_Real_Float_REG,
- mAX_Real_Double_REG,
- mAX_Long_REG
+ mAX_Long_REG, mAX_Real_Long_REG
)
import Maybes ( catMaybes )
import DataCon ( dataConRawArgTys, DataCon )
that are guaranteed to map to machine registers.
\begin{code}
-vanillaRegNos, floatRegNos, doubleRegNos :: [Int]
+vanillaRegNos, floatRegNos, doubleRegNos, longRegNos :: [Int]
vanillaRegNos = [1 .. mAX_Real_Vanilla_REG]
floatRegNos = [1 .. mAX_Real_Float_REG]
doubleRegNos = [1 .. mAX_Real_Double_REG]
-longRegNos = [1 .. mAX_Long_REG]
+longRegNos = [1 .. mAX_Real_Long_REG]
allVanillaRegNos, allFloatRegNos, allDoubleRegNos, allLongRegNos :: [Int]
allVanillaRegNos = [1 .. mAX_Vanilla_REG]
allFloatRegNos = [1 .. mAX_Float_REG]
allDoubleRegNos = [1 .. mAX_Double_REG]
-allLongRegNos = [1 .. mAX_Double_REG]
+allLongRegNos = [1 .. mAX_Long_REG]
type AvailRegs = ( [Int] -- available vanilla regs.
, [Int] -- floats
mAX_Real_Vanilla_REG,
mAX_Real_Float_REG,
mAX_Real_Double_REG,
+ mAX_Real_Long_REG,
oTHER_TAG,
mAX_Vanilla_REG = (MAX_VANILLA_REG :: Int)
mAX_Float_REG = (MAX_FLOAT_REG :: Int)
mAX_Double_REG = (MAX_DOUBLE_REG :: Int)
+mAX_Long_REG = (MAX_LONG_REG :: Int)
mAX_Real_Vanilla_REG = (MAX_REAL_VANILLA_REG :: Int)
mAX_Real_Float_REG = (MAX_REAL_FLOAT_REG :: Int)
mAX_Real_Double_REG = (MAX_REAL_DOUBLE_REG :: Int)
+mAX_Real_Long_REG = (MAX_REAL_LONG_REG :: Int)
\end{code}
Closure header sizes.
\begin{code}
dOUBLE_SIZE = (DOUBLE_SIZE :: Int)
-mAX_Long_REG = (MAX_LONG_REG :: Int)
wORD64_SIZE = (WORD64_SIZE :: Int)
iNT64_SIZE = (INT64_SIZE :: Int)
\end{code}
/* -----------------------------------------------------------------------------
- * $Id: MachRegs.h,v 1.2 1998/12/02 13:21:13 simonm Exp $
+ * $Id: MachRegs.h,v 1.3 1999/01/18 14:31:50 sof Exp $
*
* Registers used in STG code. Might or might not correspond to
* actual machine registers.
#define MAX_REAL_VANILLA_REG 1 /* always, since it defines the entry conv */
#define MAX_REAL_FLOAT_REG 0
#define MAX_REAL_DOUBLE_REG 0
+#define MAX_REAL_LONG_REG 0
#endif /* iX86 */