src/edu/berkeley/fleet/slipway/execute.v

   1 `include "macros.v"
   2
   3 module execute (clk, command_r,   command_a_, command_d,
   4                      ihorn_r_, ihorn_a, ihorn_d_,
   5                      dhorn_r_, dhorn_a, dhorn_d_
   6                );
   7   input clk;
   8
   9   `input(command_r,   command_a,   command_a_, [(`DATAWIDTH-1):0], command_d)
  10   `output(ihorn_r, ihorn_r_, ihorn_a, [(`INSTRUCTION_WIDTH-1):0], ihorn_d_)
  11   `defreg(ihorn_d_,                   [(`INSTRUCTION_WIDTH-1):0], ihorn_d)
  12   `output(dhorn_r, dhorn_r_, dhorn_a, [(`PACKET_WIDTH-1):0], dhorn_d_)
  13   `defreg(dhorn_d_,                   [(`PACKET_WIDTH-1):0], dhorn_d)
  14
  15   reg ihorn_full;
  16   reg dhorn_full;
  17
  18   always @(posedge clk) begin
  19     if (ihorn_full) begin
  20       `onwrite(ihorn_r, ihorn_a)
  21         ihorn_full = 0;
  22       end
  23     end else if (dhorn_full) begin
  24       `onwrite(dhorn_r, dhorn_a)
  25         dhorn_full = 0;
  26       end
  27     end else begin
  28       `onread(command_r, command_a)
  29         case (command_d[(`INSTRUCTION_WIDTH-1):(`INSTRUCTION_WIDTH-2)])
  30           0: begin
  31               ihorn_full  = 1;
  32               ihorn_d = command_d;
  33               end
  34           //01:
  35           2: begin
  36               dhorn_full  = 1;
  37               `packet_data(dhorn_d) = command_d[23:0];
  38               `packet_dest(dhorn_d) = command_d[34:24];
  39               end
  40           //11:
  41         endcase
  42       end
  43     end
  44   end
  45
  46
  47 endmodule
  48
  49
  50