add DDR2 controller, generated via MIG

[fleet.git] / Makefile

diff --git a/Makefile b/Makefile
index aa7638a..daa0c43 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -107,7 +107,8 @@ effort = high
 synth:
        cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/* .
        cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/mem/* .
-       cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/greg/* .
+       cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/ddr2/* .
+       #cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/greg/* .
        rm -f build/fpga/main.lso
        echo work                        >> build/fpga/main.lso
        rm -f build/fpga/main.prj