change rst to high-active

[fleet.git] / ships / Debug.ship

diff --git a/ships/Debug.ship b/ships/Debug.ship
index 549633c..4ce4f09 100644 (file)
--- a/ships/Debug.ship
+++ b/ships/Debug.ship
@@ -63,10 +63,13 @@ public void service() {
   wire break;
   wire uart_cts;
   assign uart_cts = 0;
-  assign rst_out = rst_in && !break;
+  assign rst_out = rst_in || break;
 
-  sasc_brg sasc_brg(clk, rst_in, 3, 65, sio_ce, sio_ce_x4);
-  sasc_top sasc_top(clk, rst_in,
+  // fst=3 means clock divider is 3+2=5 for a 50Mhz clock => 10Mhz
+  // using a 33Mhz clock,
+  //   33.333Mhz / 38400hz * 4 = 217.013 => 215+2,1
+  sasc_brg sasc_brg(clk, !rst_in, 215, 1, sio_ce, sio_ce_x4);
+  sasc_top sasc_top(clk, !rst_in,
                     uart_in,
                     uart_out,
                     uart_cts,
@@ -89,13 +92,12 @@ public void service() {
 
    // fpga -> host
    always @(posedge clk) begin
-     if (!rst) begin
+     if (rst) begin
        count_in  <= 0;
        count_out <= 0;
        `reset
      end else begin
 
-       `flush
        `cleanup
 
        // fpga -> host