DDR2 ship: works on ML509

[fleet.git] / src / edu / berkeley / fleet / fpga / ddr2 / ddr2_usr_rd.v

diff --git a/src/edu/berkeley/fleet/fpga/ddr2/ddr2_usr_rd.v b/src/edu/berkeley/fleet/fpga/ddr2/ddr2_usr_rd.v
index 5972da8..8f20e0d 100644 (file)
--- a/src/edu/berkeley/fleet/fpga/ddr2/ddr2_usr_rd.v
+++ b/src/edu/berkeley/fleet/fpga/ddr2/ddr2_usr_rd.v
@@ -97,7 +97,7 @@ module ddr2_usr_rd #
   reg [(DQS_WIDTH*DQ_PER_DQS)-1:0]  rd_data_in_rise_r;
   wire                              rden;
   reg [DQS_WIDTH-1:0]               rden_sel_r
-                                    /* */;
+                                    /* synthesis syn_preserve=1 */;
   wire [DQS_WIDTH-1:0]              rden_sel_mux;
   wire [(DQS_WIDTH*DQ_PER_DQS)-1:0] rise_data;
 
@@ -142,7 +142,7 @@ module ddr2_usr_rd #
          .D   (ctrl_rden_sel[rd_i]),
          .R   (1'b0),
          .S   (1'b0)
-         ) /* */;
+         ) /* synthesis syn_preserve=1 */;
     end
   endgenerate