massive overhaul of slipway (fpga-fleet)

[fleet.git] / src / edu / berkeley / fleet / slipway / main.v

diff --git a/src/edu/berkeley/fleet/slipway/main.v b/src/edu/berkeley/fleet/slipway/main.v
index 0805324..133aaf7 100644 (file)
--- a/src/edu/berkeley/fleet/slipway/main.v
+++ b/src/edu/berkeley/fleet/slipway/main.v
@@ -88,6 +88,7 @@ module main
    assign write_enable = write_enable_reg;
    assign root_in_d = root_in_d_reg;
 
+   // fpga -> host
    always @(posedge User_Clk)
    begin
      write_enable_reg = 0;
@@ -102,6 +103,7 @@ module main
      gpleds_reg[6] = root_out_a_reg;
    end
 
+   // host -> fpga
    always @(posedge User_Clk)
    begin
      read_enable_reg = 0;