private PowerChannel corePowerSupply, padsPowerSupply;
private VoltageReadable coreVoltmeter, voltmeterForCurrent;
- private ChainTest ctD, ctR, ctC;
- private ChainControl ccD, ccR, ccC;
+ private ChainTest ctD, ctR, ctC, ct;
+ private ChainControl ccD, ccR, ccC, cc;
//-------------------------- private methods -----------------------------
/** @return true if simulation. Return false if we're testing silicon. */
((SimulationModel)model).setOptimizedDirectReadsWrites(true);
CYCLE_TIME_NS = cmdArgs.useVerilog ? (100*20) : 0.250;
+ int khz = model instanceof VerilogModel ? 100000 : 1000000;
- //tester = ((SimulationModel)model).createJtagTester("TCK", "TMS", "TRSTb", "TDI", "TDO");
+ JtagTester tester = ((SimulationModel)model).createJtagTester("TCK", "TMS", "TRSTb", "TDI", "TDO");
+ tester.printInfo = false;
ChainControls ccs = new ChainControls();
+ PowerChannel pc = new ManualPowerChannel("pc", false);
+ /*
JtagTester testerD, testerR, testerC;
testerD = ((SimulationModel)model).createJtagSubchainTester("sid[1:9]", null);
testerR = ((SimulationModel)model).createJtagSubchainTester("sir[1:9]", null);
testerC = ((SimulationModel)model).createJtagSubchainTester("sic[1:9]", null);
testerD.printInfo = testerR.printInfo = testerC.printInfo = false;
- int khz = model instanceof VerilogModel ? 100000 : 1000000;
-
ccD = new ChainControl(SCAN_CHAIN_XML, testerD, 1.8f, khz);
ccR = new ChainControl(SCAN_CHAIN_XML, testerR, 1.8f, khz);
ccC = new ChainControl(SCAN_CHAIN_XML, testerC, 1.8f, khz);
ccD.noTestSeverity = ccR.noTestSeverity = ccC.noTestSeverity = Infrastructure.SEVERITY_NOMESSAGE;
-
- PowerChannel pc = new ManualPowerChannel("pc", false);
+
ctD = new ChainTest(ccD, pc);
ctR = new ChainTest(ccR, pc);
ctC = new ChainTest(ccC, pc);
-
+ */
+ /*
ccs.addChain(Marina.DATA_CHAIN, ccD);
ccs.addChain(Marina.REPORT_CHAIN, ccR);
ccs.addChain(Marina.CONTROL_CHAIN, ccC);
-
+ */
+
+ cc = new ChainControl(SCAN_CHAIN_XML, tester, 1.8f, khz);
+ ct = new ChainTest(cc, pc);
+ ccs.addChain(Marina.DATA_CHAIN, cc);
+ ccs.addChain(Marina.REPORT_CHAIN, cc);
+ ccs.addChain(Marina.CONTROL_CHAIN, cc);
+
marina = new Marina(ccs, model, !cmdArgs.jtagShift, indenter);
if (model instanceof VerilogModel)
else
((SimulationModel)model).start("nanosim -c cfg", netListName, 0, !cmdArgs.jtagShift);
+ /*
ccC.resetInBits();
ccC.shift(Marina.CONTROL_CHAIN, false, true);
+ */
+
+ cc.resetInBits();
+ cc.shift(Marina.CONTROL_CHAIN, false, true);
doOneTest(cmdArgs.testNum);
// Put top level tests here
private void testChains(Marina marina) {
- prln("Testing control chain...");
- ctC.testOneChain(Marina.CONTROL_CHAIN, Infrastructure.SEVERITY_WARNING);
- ccC.resetInBits();
- ccC.shift(Marina.CONTROL_CHAIN, false, true);
+ if (ctC!=null) {
+ prln("Testing control chain...");
+ ctC.testOneChain(Marina.CONTROL_CHAIN, Infrastructure.SEVERITY_WARNING);
+ ccC.resetInBits();
+ ccC.shift(Marina.CONTROL_CHAIN, false, true);
+ }
- prln("Testing data chain...");
- ctD.testOneChain(Marina.DATA_CHAIN, Infrastructure.SEVERITY_WARNING);
- //ccD.resetInBits();
- //ccD.shift(Marina.DATA_CHAIN, false, true);
+ if (ctD!=null) {
+ prln("Testing data chain...");
+ ctD.testOneChain(Marina.DATA_CHAIN, Infrastructure.SEVERITY_WARNING);
+ //ccD.resetInBits();
+ //ccD.shift(Marina.DATA_CHAIN, false, true);
+ }
- prln("Testing report chain...");
- ctR.testOneChain(Marina.REPORT_CHAIN, Infrastructure.SEVERITY_WARNING);
- //ccR.resetInBits();
- //ccR.shift(Marina.REPORT_CHAIN, false, true);
+ if (ctR!=null) {
+ prln("Testing report chain...");
+ ctR.testOneChain(Marina.REPORT_CHAIN, Infrastructure.SEVERITY_WARNING);
+ //ccR.resetInBits();
+ //ccR.shift(Marina.REPORT_CHAIN, false, true);
+ }
+
+ if (ct!=null) {
+ prln("Testing control chain...");
+ ct.testOneChain(Marina.CONTROL_CHAIN, Infrastructure.SEVERITY_WARNING);
+ cc.resetInBits();
+ cc.shift(Marina.CONTROL_CHAIN, false, true);
+ prln("Testing data chain...");
+ ct.testOneChain(Marina.DATA_CHAIN, Infrastructure.SEVERITY_WARNING);
+ prln("Testing report chain...");
+ ct.testOneChain(Marina.REPORT_CHAIN, Infrastructure.SEVERITY_WARNING);
+ }
}
private void testProperStoppers(Marina marina) {
}
+ private void showOlc() {
+ prln("OLC=="+marina.getOLC());
+ }
+ private void expectOlc(int x) {
+ int olc = marina.getOLC();
+ fatal(x!=olc, "expected OLC=="+x+", but scanned out OLC=="+olc);
+ }
private void getCtrsFlags(Marina marina) {
prln("begin getCtrsFlags");
adjustIndent(2);
- int olc = marina.getOLC();
- prln("OLC=="+olc);
-
+ showOlc();
Ilc ilc = marina.getILC();
prln("ILC.done=="+ilc.getDone()+
" ILC.infinity=="+ilc.getInfinity()+
private void walkOneOLC(Marina marina) {
prln("Begin walkOneOLC");
adjustIndent(2);
- for (int i=-1; i<=5; i++) {
+ for (int i=0; i<6; i++) {
if (marina.kesselsCounter) {
+ System.out.println("master-clearing...");
// master clear on each iteration; otherwise we'd need to "run down" the olc
marina.masterClear();
marina.enableInstructionSend(true);
model.waitNS(128 * CYCLE_TIME_NS);
- int outOlc = marina.getOLC();
-
- fatal(outOlc!=inOlc, "walkOneOLC: got="+outOlc+" expected="+inOlc);
+ expectOlc(inOlc);
prln("walkOneOLC: "+inOlc+" checks out");
}
adjustIndent(-2);
for (int i=maxOlc; i>=0; i--) {
model.waitNS(128 * CYCLE_TIME_NS);
prln("OLC should be: "+i);
- int olc = marina.getOLC();
- fatal(olc!=i, "bad OLC: "+olc+" expected: "+i);
+ expectOlc(i);
marina.instrIn.fill(new
Instruction.Set(dock,Predicate.IgnoreFlagD,SetDest.OuterLoopCounter, SetSource.Decrement));
}
model.waitNS(CYCLE_TIME_NS * 64);
- int olc = marina.getOLC();
- fatal(olc != (1<<bit), "expected olc to be " + (1<<bit) + ", but got " + olc);
+ expectOlc(1<<bit);
if (marina.kesselsCounter) {
// master clear on each iteration; otherwise we'd need to "run down" the olc
marina.instrIn.fill(setIlc(1));
marina.instrIn.fill(setOlc(63));
- int olc;
model.waitNS(128 * CYCLE_TIME_NS);
- olc = marina.getOLC();
- fatal(olc!=63, "bad OLC: "+olc+" expected: 63");
+ expectOlc(63);
marina.instrIn.fill(new
Instruction.Set(dock,Predicate.IgnoreFlagD, CLEAR_FLAG, CLEAR_FLAG));
prln("Set A=A, B=1 This instruction should execute because D-flag is set");
model.waitNS(128 * CYCLE_TIME_NS);
- prln("infoz: olc="+marina.getOLC());
marina.fillSouthProperStopper(new Instruction[] {
new Instruction.Set(dock,Predicate.IgnoreFlagD,SetDest.InnerLoopCounter, SetSource.Infinity),
});
model.waitNS(128 * CYCLE_TIME_NS);
- prln("infoz: olc="+marina.getOLC());
prln("send torpedo. This should clear the OLC");
marina.instrIn.fillTorpedo();
model.waitNS(128 * CYCLE_TIME_NS);
model.waitNS(128 * CYCLE_TIME_NS);
- prln("infoz: olc="+marina.getOLC());
prln("A should remain false, B should be true");
fatal(marina.getFlagA(), "bad A flag: true");
fatal(!marina.getFlagB(), "bad B flag: false");
model.waitNS(128 * CYCLE_TIME_NS);
- prln("infoz: olc="+marina.getOLC());
prln("Reload OLC after torpedo, clears D-flag");
marina.instrIn.fill(new Instruction.Set(dock,Predicate.IgnoreFlagD,SetDest.OuterLoopCounter, 63));
// FIXME: find another way to test this
model.waitNS(128 * CYCLE_TIME_NS);
- olc = marina.getOLC();
- fatal(olc!=63, "bad OLC: "+olc+" expected: 63");
+ expectOlc(63);
prln("Set A=1, B=1 This instruction should execute because OLC!=0");
marina.instrIn.fill(new
true, // dataOut
false // tokenOut
);
+
marina.fillSouthProperStopper(instructions);
model.waitNS(64 * CYCLE_TIME_NS);
model.waitNS(64 * CYCLE_TIME_NS);
prln("Verify OLC count using scan chain");
- outOlc = marina.getOLC();
- fatal(outOlc!=notZero, "bad OLC count: "+outOlc+" expected: "+notZero);
+ expectOlc(notZero);
if (!marina.kesselsCounter) {
prln("Set OLC="+notZero);
model.waitNS(64 * CYCLE_TIME_NS);
prln("Verify OLC count using scan chain");
- outOlc = marina.getOLC();
- fatal(outOlc!=0, "bad OLC count: "+outOlc+" expected: 0");
+ expectOlc(0);
}
}
prln("============================================================");
prln("MarinaTest: performing test: "+testNum);
- marina.masterClear();
- marina.enableInstructionSend(true);
-
+ if (testNum!=0) {
+ marina.masterClear();
+ marina.enableInstructionSend(true);
+ }
try {
switch (testNum) {
// these tests run fairly quickly
+
doOneTest(1); // passes extracted parasitics
doOneTest(2); // passes extracted parasitics
doOneTest(3); // passes extracted parasitics
doOneTest(4); // passes extracted parasitics
-
+ doOneTest(5); // passes extracted parasitics
doOneTest(6);
doOneTest(1002);
doOneTest(1005);
doOneTest(3019);
doOneTest(3025);
- doOneTest(5); // passes extracted parasitics
- doOneTest(6); // passes extracted parasitics
doOneTest(1000); // passes extracted parasitics
doOneTest(1001); // passes extracted parasitics
doOneTest(1003); // passes extracted parasitics
projects / fleet.git / blobdiff