add results from actual silicon in marina/results/
[fleet.git] / chips / marina / electric / basic.jelib
1 # header information:
2 Hbasic|8.07c
3
4 # Views:
5 Vicon|ic
6 Vschematic|sch
7
8 # Tools:
9 Oio|GDSOutputConvertsBracketsInExports()BF|GDSWritesExportPins()BT
10
11 # Technologies:
12 Tcmos|ScaleFORcmos()D1000.0
13 Tmocmos|ScaleFORmocmos()D100.0|SelectedFoundryFormocmos()STSMC
14 Trcmos|ScaleFORrcmos()D1000.0
15
16 # Cell iopin;1{ic}
17 Ciopin;1{ic}||artwork|1201830579034|1201830708186|E
18 Ngeneric:Facet-Center|art@0||0|0||||AV
19 NClosed-Polygon|art@1||-0.25|0|1.5|0.9|||trace()V[0.75/0,0.3/0.45,-0.3/0.45,-0.75/0,-0.3/-0.45,0.3/-0.45]
20 X
21
22 # Cell ipin;1{ic}
23 Cipin;1{ic}||artwork|1201830579042|1201830708186|E
24 Ngeneric:Facet-Center|art@0||0|0||||AV
25 NClosed-Polygon|art@1||-0.5|0|1|0.9|||trace()V[-0.5/-0.45,-0.5/0.45,0.05/0.45,0.5/0,0.05/-0.45]
26 X
27
28 # Cell noConn;1{ic}
29 CnoConn;1{ic}||artwork|1201830579045|1201830708186|E
30 Ngeneric:Facet-Center|art@0||0|0||||AV
31 NOpened-Polygon|art@1||0|-0.75||1.5|||trace()V[0/0.75,0/-0.75,0/-0.75]
32 NBox|art@2||0|-2|1|1||
33 NOpened-Polygon|art@3||0|-2|1|1|||trace()V[0.5/0.5,-0.5/-0.5,-0.5/-0.5]
34 NOpened-Polygon|art@4||0|-2|1|1|||trace()V[-0.5/0.5,0.5/-0.5,0.5/-0.5]
35 NBox|art@5||0|0|0.4|0.4||
36 Nschematic:Bus_Pin|pin@0||0|0||||
37 EnoConn||D5G2;|pin@0||B
38 X
39
40 # Cell noConn;1{sch}
41 CnoConn;1{sch}||schematic|1201830579044|1201830708186|
42 Ngeneric:Facet-Center|art@0||0|0||||AV
43 NOff-Page|conn@0||6|-2.5||||
44 EnoConn||D5G2;|conn@0|y|B
45 X
46
47 # Cell opin;1{ic}
48 Copin;1{ic}||artwork|1201830579047|1201830708186|E
49 Ngeneric:Facet-Center|art@0||0|0||||AV
50 NClosed-Polygon|art@1||0.5|0|1|0.9|||trace()V[-0.5/-0.45,-0.5/0.45,0.05/0.45,0.5/0,0.05/-0.45]
51 X
52
53 # Cell patch;1{ic}
54 Cpatch;1{ic}||artwork|1201830579050|1201830708186|E
55 Ngeneric:Facet-Center|art@0||0|0||||AV
56 NOpened-Polygon|art@1||-0.5|0.275|0.6|0.15|||trace()V[-0.3/-0.075,-0.2/0.025,0/0.075,0.2/0.025,0.3/-0.075,0.3/-0.025,0.25/-0.075,0.3/-0.075]
57 NBox|art@2||-1|0|0.4|0.4||
58 NBox|art@3||0|0|0.4|0.4||
59 NBox|art@4||-1|0|0.4|0.4||
60 NBox|art@5||0|0|0.4|0.4||
61 Nschematic:Bus_Pin|pin@0||-1|0||||
62 Nschematic:Bus_Pin|pin@1||0|0||||
63 Edst||D5G2;|pin@1||I
64 Esrc||D5G2;|pin@0||I
65 X
66
67 # Cell patch;1{sch}
68 Cpatch;1{sch}||schematic|1201830579048|1201831981422|
69 Ngeneric:Facet-Center|art@0||0|0||||AV
70 Nartwork:Box|art@1||0|0|0.2|0.2||
71 Nartwork:Box|art@2||-1|0|0.2|0.2||
72 NOff-Page|conn@0||7|-1||||
73 NOff-Page|conn@1||7|4||||
74 NGlobal-Signal|conn@2||2|1.5||||
75 NBus_Pin|pin@0||0|0||||
76 NBus_Pin|pin@1||-1|0||||
77 NWire_Pin|pin@2||2|-1||||
78 NWire_Pin|pin@3||2|4||||
79 Awire|net@0|||900|conn@2||2|0|pin@2||2|-1
80 Awire|net@1|||1800|pin@2||2|-1|conn@0|a|5|-1
81 Awire|net@2|||0|conn@1|a|5|4|pin@3||2|4
82 Awire|net@3|||900|pin@3||2|4|conn@2||2|0
83 Edst||D5G2;|conn@1|y|I
84 Esrc||D5G2;|conn@0|y|I
85 X