chips/marina/electric/marina_padframe.delib/TIELO.sch

   1 Hinfinity_padframe|8.06c
   2
   3 # External Libraries:
   4
   5 LorangeTSMC090nm|orangeTSMC090nm
   6
   7 # Cell TIELO;1{sch}
   8 CTIELO;1{sch}||schematic|1185574654288|1187236253683|I
   9 IorangeTSMC090nm:NMOSf;1{ic}|NMOS4fwk@0||-1|-5.5|||D5G4;|ATTR_Delay(D5G1;NX3.5;Y-2;)I100|ATTR_L(D5G1;NOLX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLX2;Y1;)S8.4
  10 IorangeTSMC090nm:PMOSfwk;1{ic}|PMOSf@0||-1|6.5|||D5G4;|ATTR_Delay(D5G1;NX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLX2;Y1;)S2.4
  11 ITIELO;1{ic}|TIELO@0||14.5|12.5|||D5G4;
  12 Ngeneric:Facet-Center|art@0||0|0||||AV
  13 NOff-Page|conn@0||5.5|-1||||
  14 NGround|gnd@0||-1|-12.5||||
  15 NWire_Pin|pin@0||-6|-5.5||||
  16 NWire_Pin|pin@3||-6|6.5||||
  17 NWire_Pin|pin@4||-1|-1||||
  18 NWire_Pin|pin@5||-1|2||||
  19 NWire_Pin|pin@6||-6|2||||
  20 NPower|pwr@0||-1|12||||
  21 Awire|net@0|||2700|gnd@0||-1|-10.5|NMOS4fwk@0|s|-1|-7.5
  22 Awire|net@1|||0|NMOS4fwk@0|g|-4|-5.5|pin@0||-6|-5.5
  23 Awire|net@9|||900|pwr@0||-1|12|PMOSf@0|s|-1|8.5
  24 Awire|net@10|||0|PMOSf@0|g|-4|6.5|pin@3||-6|6.5
  25 Awire|net@13|||0|conn@0|a|3.5|-1|pin@4||-1|-1
  26 Awire|net@15|||2700|pin@0||-6|-5.5|pin@6||-6|2
  27 Awire|net@16|||2700|NMOS4fwk@0|d|-1|-3.5|pin@4||-1|-1
  28 Awire|net@17|||900|PMOSf@0|d|-1|4.5|pin@5||-1|2
  29 Awire|net@18|||2700|pin@6||-6|2|pin@3||-6|6.5
  30 Awire|net@19|||0|pin@5||-1|2|pin@6||-6|2
  31 EY||D5G2;|conn@0|y|O
  32 X