chips/marina/electric/orangeTSMC090nm.jelib

   1 # header information:
   2 HorangeTSMC090nm|8.09a|USER_electrical_units()I70464
   3
   4 # Views:
   5 Vicon|ic
   6 Vlayout|lay
   7 Vschematic|sch
   8
   9 # Tools:
  10 Ouser|DefaultTechnology()Sartwork|SchematicTechnology()Scmos90
  11 Oio|GDSOutputConvertsBracketsInExports()BF|GDSWritesExportPins()BT
  12
  13 # Technologies:
  14 Tcmos|ScaleFORcmos()D1000.0
  15 Tcmos90|"GDS(ST)LayerForPad-FrameINcmos90"()S43|"GDS(ST)LayerForPassivationINcmos90"()S169|"GDS(TSMC)LayerForPad-FrameINcmos90"()S43|"GDS(TSMC)LayerForPassivationINcmos90"()S169
  16 Tmocmos|ScaleFORmocmos()D100.0|SelectedFoundryFormocmos()STSMC
  17 Trcmos|ScaleFORrcmos()D1000.0
  18
  19 # Cell LEload;1{ic}
  20 CLEload;1{ic}||artwork|1083966364000|1204140525662|E|ATTR_L(D5G1;HOLPUDX0.5;)S100|ATTR_LEWIRE(D5G1;HPT)I1|ATTR_layer(D5G1;HNOLPY-1;)S1|ATTR_width(D5G1;HNOLPY-2;)S3|prototype_center()I[0,0]
  21 Ngeneric:Facet-Center|art@0||0|0||||AV
  22 NPin|pin@0||-2|1|1|1||
  23 NPin|pin@1||2|1|1|1||
  24 NPin|pin@2||2|-1|1|1||
  25 NPin|pin@3||-2|-1|1|1||
  26 Nschematic:Bus_Pin|pin@5||-3|0|-1|-1||
  27 NPin|pin@6||-2|0|1|1||
  28 NPin|pin@7||-3|0|1|1||
  29 AThicker|net@0|||FS0|pin@1||2|1|pin@0||-2|1|ART_color()I74
  30 AThicker|net@1|||FS0|pin@2||2|-1|pin@3||-2|-1|ART_color()I74
  31 AThicker|net@3|||FS900|pin@0||-2|1|pin@3||-2|-1|ART_color()I74
  32 AThicker|net@4|||FS900|pin@1||2|1|pin@2||2|-1|ART_color()I74
  33 AThicker|net@5|||FS0|pin@6||-2|0|pin@7||-3|0|ART_color()I74
  34 Ea||D5G2;|pin@5||B
  35 X
  36
  37 # Cell LEload;1{sch}
  38 CLEload;1{sch}||schematic|1083965121000|1176245140811||ATTR_L(D5FLeave alone;G1;HNOLPUDX-20.5;Y-6.5;)S100|ATTR_LEWIRE(D5G1;HNPTX-20.5;Y-9.5;)I1|ATTR_layer(D5FLeave alone;G1;HNOLPX-20.5;Y-7.5;)S1|ATTR_width(D5FLeave alone;G1;HNOLPX-20.5;Y-8.5;)S3|prototype_center()I[0,0]
  39 Ngeneric:Facet-Center|art@0||0|0||||AV
  40 NOff-Page|conn@0||-23|-1||||
  41 Ngeneric:Invisible-Pin|pin@0||-4|6|||||ART_message(BD5G2;)SLEload
  42 Ngeneric:Invisible-Pin|pin@3||-9|2|||||ART_message(D6G1;)S["wire in layer 'layer', 'L' lambda long,","'width' lambda wide, for the 180nm tech"]
  43 ILEload;1{ic}|wire180@0||12|6.63|||D0G4;|ATTR_L(D5G1;OLPUDX0.5;)S100|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NOLPY-1;)S1|ATTR_width(D5G1;NOLPY-2;)S3
  44 ILEload_sub;1{ic}|wire@0||-10.5|-1|||D0G4;|ATTR_LEWIRECAP(D5G1;NOJTUDX0.5;Y-1.5;)S((@layer==0?15:@layer<6?25:30)+(@width-3))*1e-18*@L
  45 Awire|net@0|||0|wire@0|a|-14.5|-1|conn@0|y|-21|-1
  46 Ea||D4G2;|conn@0|a|B
  47 X
  48
  49 # Cell LEload_sub;1{ic}
  50 CLEload_sub;1{ic}||artwork|1083964052000|1176245054736|E|prototype_center()I[0,0]
  51 Ngeneric:Facet-Center|art@0||0|0||||AV
  52 NThick-Circle|art@1||-2|0|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
  53 NThick-Circle|art@2||2|0|1.5|1.5|||ART_color()I74
  54 NPin|pin@0||-2.75|0|1|1||
  55 NPin|pin@1||-4|0||||
  56 NPin|pin@4||-2|0.75|1|1||
  57 NPin|pin@5||2|0.75|1|1||
  58 NPin|pin@6||2|-0.75|1|1||
  59 NPin|pin@7||-2|-0.75|1|1||
  60 Nschematic:Bus_Pin|pin@9||-4|0|-2|-2||
  61 Ngeneric:Invisible-Pin|pin@10||0|0|||||ART_message(D5G1;)SLEload_sub
  62 AThicker|net@0|||IJS0|pin@0||-2.75|0|pin@1||-4|0|ART_color()I74
  63 AThicker|net@2|||IJS0|pin@5||2|0.75|pin@4||-2|0.75|ART_color()I74
  64 AThicker|net@3|||IJS0|pin@6||2|-0.75|pin@7||-2|-0.75|ART_color()I74
  65 Ea||D5G2;|pin@9||U
  66 X
  67
  68 # Cell LEload_sub;1{sch}
  69 CLEload_sub;1{sch}||schematic|1083961993000|1176245054736||prototype_center()I[0,0]
  70 Ngeneric:Facet-Center|art@0||0|0||||AV
  71 NOff-Page|conn@1||-7.5|3||||
  72 Ngeneric:Invisible-Pin|pin@5||-1|22|||||ART_message(D5G6;)SLEload_sub
  73 NWire_Pin|pin@12||8|3||||
  74 ILEload_sub;1{ic}|wire@0||22.5|23.5|||D0G4;
  75 Awire|a|D5G1.5;||1800|conn@1|y|-5.5|3|pin@12||8|3|ART_color()I0
  76 Ea||D4G2;|conn@1|a|U
  77 X
  78
  79 # Cell NMOS4f;1{ic}
  80 CNMOS4f;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.25;Y-2.25;)I100|ATTR_L(D5G1;HNOLPX3.25;Y-0.25;)S2|ATTR_SPICE_template_calibre(D5G1;HNPX-3;Y-26;)SM$(node_name) $(d) $(g) $(s) $(b) nch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_W(D6FLeave alone;G1;HNOLPX1.75;Y0.75;)S3|prototype_center()I[0,0]
  81 Ngeneric:Facet-Center|art@0||0|0||||AV
  82 NPin|pin@0||-0.25|-0.75||||
  83 NPin|pin@1||-0.25|-0.25||||
  84 NPin|pin@2||-0.75|-0.5|1|1|RR|
  85 NPin|pin@3||0|-0.5|||RR|
  86 Ngeneric:Invisible-Pin|pin@4||0|-0.5||||
  87 Ngeneric:Invisible-Pin|pin@5||0|-2||||
  88 NPin|pin@6||-1.5|0|1|1|RR|
  89 NPin|pin@7||-3|0|||RR|
  90 Nschematic:Bus_Pin|pin@8||-3|0|-2|-2||
  91 Nschematic:Bus_Pin|pin@9||0|2|-2|-2||
  92 NPin|pin@10||0|-2||||
  93 NPin|pin@11||-1.5|1|1|1||
  94 NPin|pin@12||-1.5|-1|1|1||
  95 NPin|pin@13||0|-1||||
  96 NPin|pin@14||-0.75|-1|1|1||
  97 NPin|pin@15||-0.75|1|1|1||
  98 NPin|pin@16||0|1||||
  99 NPin|pin@17||0|2||||
 100 AThicker|net@0|||FS2250|pin@0||-0.25|-0.75|pin@3||0|-0.5|ART_color()I74
 101 AThicker|net@1|||FS1350|pin@1||-0.25|-0.25|pin@3||0|-0.5|ART_color()I74
 102 AThicker|net@2|||FS1800|pin@2||-0.75|-0.5|pin@3||0|-0.5|ART_color()I74
 103 AThicker|net@3|||FS900|pin@15||-0.75|1|pin@14||-0.75|-1|ART_color()I74
 104 AThicker|net@4|||FS1800|pin@7||-3|0|pin@6||-1.5|0|ART_color()I74
 105 AThicker|net@5|||FS900|pin@11||-1.5|1|pin@12||-1.5|-1|ART_color()I74
 106 AThicker|net@6|||FS900|pin@13||0|-1|pin@10||0|-2|ART_color()I74
 107 AThicker|net@7|||FS1800|pin@14||-0.75|-1|pin@13||0|-1|ART_color()I74
 108 AThicker|net@8|||FS0|pin@16||0|1|pin@15||-0.75|1|ART_color()I74
 109 AThicker|net@9|||FS900|pin@17||0|2|pin@16||0|1|ART_color()I74
 110 Eb||D5G1;|pin@4||B
 111 Ed||D5G1;|pin@9||B
 112 Eg||D5G1;|pin@8||I
 113 Es||D5G1;|pin@5||B
 114 X
 115
 116 # Cell NMOS4f;1{sch}
 117 CNMOS4f;1{sch}||schematic|1021415734000|1159313256884||ATTR_Delay(D5G1;HNPX-18.25;Y-12.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-18;Y-11.5;)S2|ATTR_SPICE_template_calibre(D5G1;HNPX-3;Y-26;)SM$(node_name) $(d) $(g) $(s) $(b) nch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_W(D5FLeave alone;G1;HNOLPX-18;Y-10.5;)S3|ATTR_CDL_template(D5G1;NTX-3.5;Y-24;)SM$(node_name) $(d) $(g) $(s) $(b) nch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template(D5G1;NTX2.5;Y-19.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-17.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-6;Y-21.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
 118 INMOS4f;1{ic}|NMOS4f@0||18.5|1|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5G1;NOLPX3.25;Y-0.25;)S2|ATTR_W(D6FLeave alone;G1;NOLPX1.75;Y0.75;)S3
 119 Ngeneric:Facet-Center|art@0||0|0||||AV
 120 NOff-Page|conn@0||4.5|-7.5||||
 121 NOff-Page|conn@1||4.5|-12.5||||
 122 NOff-Page|conn@2||4.5|0||||
 123 NOff-Page|conn@3||-18.5|-6.5||||
 124 N4-Port-Transistor|nmos4p@0||-2|-6.5|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Snch
 125 Ngeneric:Invisible-Pin|pin@0||-2|7.5|||||ART_message(D5G3;)S4-terminal standard-threshold NMOS device
 126 NWire_Pin|pin@1||0|-12.5||||
 127 NWire_Pin|pin@2||0|0||||
 128 Ngeneric:Invisible-Pin|pin@3||-1.5|13|||||ART_message(D5G6;)S[NMOS4f]
 129 Awire|net@0|||0|nmos4p@0|g|-3|-6.5|conn@3|y|-16.5|-6.5
 130 Awire|net@1|||1800|nmos4p@0|b|0|-7.5|conn@0|a|2.5|-7.5
 131 Awire|net@2|||900|nmos4p@0|s|0|-8.5|pin@1||0|-12.5
 132 Awire|net@3|||1800|pin@1||0|-12.5|conn@1|a|2.5|-12.5
 133 Awire|net@4|||1800|pin@2||0|0|conn@2|a|2.5|0
 134 Awire|net@5|||900|pin@2||0|0|nmos4p@0|d|0|-4.5
 135 Eb||D5G2;|conn@0|y|B
 136 Ed||D5G2;|conn@2|y|B
 137 Eg||D5G2;|conn@3|a|I
 138 Es||D5G2;|conn@1|y|B
 139 X
 140
 141 # Cell NMOS4f_high;1{ic}
 142 CNMOS4f_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.25;Y-0.25;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX1.75;Y0.75;)S3|prototype_center()I[0,0]
 143 Ngeneric:Facet-Center|art@0||0|0||||AV
 144 NPin|pin@0||-0.25|-0.75||||
 145 NPin|pin@1||-0.25|-0.25||||
 146 NPin|pin@2||-0.75|-0.5|1|1|RR|
 147 NPin|pin@3||0|-0.5|||RR|
 148 Ngeneric:Invisible-Pin|pin@4||0|-0.5||||
 149 Ngeneric:Invisible-Pin|pin@5||0|-2||||
 150 NPin|pin@6||-2|0|1|1|RR|
 151 NPin|pin@7||-3.5|0|||RR|
 152 Nschematic:Bus_Pin|pin@8||-3.5|0|-2|-2||
 153 Nschematic:Bus_Pin|pin@9||0|2|-2|-2||
 154 NPin|pin@10||0|-2||||
 155 NPin|pin@11||-2|1|1|1||
 156 NPin|pin@12||-2|-1|1|1||
 157 NPin|pin@13||0|-1||||
 158 NPin|pin@14||-0.75|-1|1|1||
 159 NPin|pin@15||-0.75|1|1|1||
 160 NPin|pin@16||0|1||||
 161 NPin|pin@17||0|2||||
 162 AThicker|net@0|||FS2250|pin@0||-0.25|-0.75|pin@3||0|-0.5|ART_color()I74
 163 AThicker|net@1|||FS1350|pin@1||-0.25|-0.25|pin@3||0|-0.5|ART_color()I74
 164 AThicker|net@2|||FS1800|pin@2||-0.75|-0.5|pin@3||0|-0.5|ART_color()I74
 165 AThicker|net@3|||FS900|pin@15||-0.75|1|pin@14||-0.75|-1|ART_color()I74
 166 AThicker|net@4|||FS1800|pin@7||-3.5|0|pin@6||-2|0|ART_color()I74
 167 AThicker|net@5|||FS900|pin@11||-2|1|pin@12||-2|-1|ART_color()I74
 168 AThicker|net@6|||FS900|pin@13||0|-1|pin@10||0|-2|ART_color()I74
 169 AThicker|net@7|||FS1800|pin@14||-0.75|-1|pin@13||0|-1|ART_color()I74
 170 AThicker|net@8|||FS0|pin@16||0|1|pin@15||-0.75|1|ART_color()I74
 171 AThicker|net@9|||FS900|pin@17||0|2|pin@16||0|1|ART_color()I74
 172 Eb||D5G1;|pin@4||B
 173 Ed||D5G1;|pin@9||B
 174 Eg||D5G1;|pin@8||I
 175 Es||D5G1;|pin@5||B
 176 X
 177
 178 # Cell NMOS4f_high;1{sch}
 179 CNMOS4f_high;1{sch}||schematic|1021415734000|1159313234499||ATTR_Delay(D5G1;HNPX-18.25;Y-12.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-18;Y-11.5;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-18;Y-10.5;)S3|ATTR_CDL_template(D5G1;NTX-6.5;Y-26;)SM$(node_name) $(d) $(g) $(s) $(b) nch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-5.5;Y-23.75;)StransistorType VTH-N-Transistor|ATTR_SPICE_template(D5G1;NTX-4.5;Y-19.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_hvt W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-6;Y-28;)SM$(node_name) $(d) $(g) $(s) $(b) nch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-17.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_hvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-6;Y-21.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
 180 INMOS4f_high;1{ic}|NMOS4f@0||18.5|1|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.25;Y-0.25;)S2|ATTR_W(D6FLeave alone;G1;NOLPX1.75;Y0.75;)S3
 181 Ngeneric:Facet-Center|art@0||0|0||||AV
 182 NOff-Page|conn@0||4.5|-7.5||||
 183 NOff-Page|conn@1||4.5|-12.5||||
 184 NOff-Page|conn@2||4.5|0||||
 185 NOff-Page|conn@3||-18.5|-6.5||||
 186 N4-Port-Transistor|nmos4p@0||-2|-6.5|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Snch_hvt
 187 Ngeneric:Invisible-Pin|pin@0||-2|7.5|||||ART_message(D5G3;)S4-terminal high-threshold NMOS device
 188 NWire_Pin|pin@1||0|-12.5||||
 189 NWire_Pin|pin@2||0|0||||
 190 Ngeneric:Invisible-Pin|pin@3||-1.5|13|||||ART_message(D5G6;)SNMOS4f_high
 191 Awire|net@0|||0|nmos4p@0|g|-3|-6.5|conn@3|y|-16.5|-6.5
 192 Awire|net@1|||1800|nmos4p@0|b|0|-7.5|conn@0|a|2.5|-7.5
 193 Awire|net@2|||900|nmos4p@0|s|0|-8.5|pin@1||0|-12.5
 194 Awire|net@3|||1800|pin@1||0|-12.5|conn@1|a|2.5|-12.5
 195 Awire|net@4|||1800|pin@2||0|0|conn@2|a|2.5|0
 196 Awire|net@5|||900|pin@2||0|0|nmos4p@0|d|0|-4.5
 197 Eb||D5G2;|conn@0|y|B
 198 Ed||D5G2;|conn@2|y|B
 199 Eg||D5G2;|conn@3|a|I
 200 Es||D5G2;|conn@1|y|B
 201 X
 202
 203 # Cell NMOS4f_io18;1{ic}
 204 CNMOS4f_io18;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;HNPX3.25;Y-0.25;)S4|ATTR_W(D6FLeave alone;G1;HNPX1.75;Y0.75;)I3|prototype_center()I[0,0]
 205 Ngeneric:Facet-Center|art@0||0|0||||AV
 206 NPin|pin@0||-0.25|-0.75||||
 207 NPin|pin@1||-0.25|-0.25||||
 208 NPin|pin@2||-0.75|-0.5|1|1|RR|
 209 NPin|pin@3||0|-0.5|||RR|
 210 Ngeneric:Invisible-Pin|pin@4||0|-0.5||||
 211 Ngeneric:Invisible-Pin|pin@5||0|-2||||
 212 NPin|pin@6||-2|0|1|1|RR|
 213 NPin|pin@7||-3.5|0|||RR|
 214 Nschematic:Bus_Pin|pin@8||-3.5|0|-2|-2||
 215 Nschematic:Bus_Pin|pin@9||0|2|-2|-2||
 216 NPin|pin@10||0|-2||||
 217 NPin|pin@11||-2|1|1|1||
 218 NPin|pin@12||-2|-1|1|1||
 219 NPin|pin@13||0|-1||||
 220 NPin|pin@14||-0.75|-1|1|1||
 221 NPin|pin@15||-0.75|1|1|1||
 222 NPin|pin@16||0|1||||
 223 NPin|pin@17||0|2||||
 224 Ngeneric:Invisible-Pin|pin@18||-2.25|1.75|||||ART_message(D5G1;)S1.8V
 225 AThicker|net@0|||FS2250|pin@0||-0.25|-0.75|pin@3||0|-0.5|ART_color()I74
 226 AThicker|net@1|||FS1350|pin@1||-0.25|-0.25|pin@3||0|-0.5|ART_color()I74
 227 AThicker|net@2|||FS1800|pin@2||-0.75|-0.5|pin@3||0|-0.5|ART_color()I74
 228 AThicker|net@3|||FS900|pin@15||-0.75|1|pin@14||-0.75|-1|ART_color()I74
 229 AThicker|net@4|||FS1800|pin@7||-3.5|0|pin@6||-2|0|ART_color()I74
 230 AThicker|net@5|||FS900|pin@11||-2|1|pin@12||-2|-1|ART_color()I74
 231 AThicker|net@6|||FS900|pin@13||0|-1|pin@10||0|-2|ART_color()I74
 232 AThicker|net@7|||FS1800|pin@14||-0.75|-1|pin@13||0|-1|ART_color()I74
 233 AThicker|net@8|||FS0|pin@16||0|1|pin@15||-0.75|1|ART_color()I74
 234 AThicker|net@9|||FS900|pin@17||0|2|pin@16||0|1|ART_color()I74
 235 Eb||D5G1;|pin@4||B
 236 Ed||D5G1;|pin@9||B
 237 Eg||D5G1;|pin@8||I
 238 Es||D5G1;|pin@5||B
 239 X
 240
 241 # Cell NMOS4f_io18;1{sch}
 242 CNMOS4f_io18;1{sch}||schematic|1021415734000|1159313213884||ATTR_Delay(D5G1;HNPX-18.25;Y-12.5;)I100|ATTR_L(D5FLeave alone;G1;HNPX-18;Y-11.5;)S4|ATTR_W(D5FLeave alone;G1;HNPX-18;Y-10.5;)I3|ATTR_CDL_template(D5G1;NTX-1.5;Y-25.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-2.5;Y-23.5;)StransistorType  OD18-N-Transistor|ATTR_SPICE_template(D5G1;NTY-19.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_18 W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-1;Y-27.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-17.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_18 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-4;Y-21.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
 243 INMOS4f_io18;1{ic}|NMOS4f@0||18.5|1|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;NPX3.25;Y-0.25;)S4|ATTR_W(D6FLeave alone;G1;NPX1.75;Y0.75;)I3
 244 Ngeneric:Facet-Center|art@0||0|0||||AV
 245 NOff-Page|conn@0||4.5|-7.5||||
 246 NOff-Page|conn@1||4.5|-12.5||||
 247 NOff-Page|conn@2||4.5|0||||
 248 NOff-Page|conn@3||-18.5|-6.5||||
 249 N4-Port-Transistor|nmos4p@0||-2|-6.5|||R||ATTR_length(D5FLeave alone;G1;OJX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OJX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3.5;)Snch_18
 250 Ngeneric:Invisible-Pin|pin@0||-2|13.5|||||ART_message(D5G2;)S4-terminal NMOS device for 1.8V I/O pads
 251 NWire_Pin|pin@1||0|-12.5||||
 252 NWire_Pin|pin@2||0|0||||
 253 Ngeneric:Invisible-Pin|pin@3||-1.5|19|||||ART_message(D5G6;)SNMOS4f_io18
 254 Ngeneric:Invisible-Pin|pin@5||-2.25|8.5|||||ART_message(D5G2;)Sminimum length for 1.8V thick-oxide devices is 4
 255 Awire|net@0|||0|nmos4p@0|g|-3|-6.5|conn@3|y|-16.5|-6.5
 256 Awire|net@1|||1800|nmos4p@0|b|0|-7.5|conn@0|a|2.5|-7.5
 257 Awire|net@2|||900|nmos4p@0|s|0|-8.5|pin@1||0|-12.5
 258 Awire|net@3|||1800|pin@1||0|-12.5|conn@1|a|2.5|-12.5
 259 Awire|net@4|||1800|pin@2||0|0|conn@2|a|2.5|0
 260 Awire|net@5|||900|pin@2||0|0|nmos4p@0|d|0|-4.5
 261 Eb||D5G2;|conn@0|y|B
 262 Ed||D5G2;|conn@2|y|B
 263 Eg||D5G2;|conn@3|a|I
 264 Es||D5G2;|conn@1|y|B
 265 X
 266
 267 # Cell NMOS4f_io25;1{ic}
 268 CNMOS4f_io25;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.25;Y-0.25;)S5.6|ATTR_W(D6FLeave alone;G1;HNOLPX1.75;Y0.75;)S3|prototype_center()I[0,0]
 269 Ngeneric:Facet-Center|art@0||0|0||||AV
 270 NPin|pin@0||-0.25|-0.75||||
 271 NPin|pin@1||-0.25|-0.25||||
 272 NPin|pin@2||-0.75|-0.5|1|1|RR|
 273 NPin|pin@3||0|-0.5|||RR|
 274 Ngeneric:Invisible-Pin|pin@4||0|-0.5||||
 275 Ngeneric:Invisible-Pin|pin@5||0|-2||||
 276 NPin|pin@6||-2|0|1|1|RR|
 277 NPin|pin@7||-3.5|0|||RR|
 278 Nschematic:Bus_Pin|pin@8||-3.5|0|-2|-2||
 279 Nschematic:Bus_Pin|pin@9||0|2|-2|-2||
 280 NPin|pin@10||0|-2||||
 281 NPin|pin@11||-2|1|1|1||
 282 NPin|pin@12||-2|-1|1|1||
 283 NPin|pin@13||0|-1||||
 284 NPin|pin@14||-0.75|-1|1|1||
 285 NPin|pin@15||-0.75|1|1|1||
 286 NPin|pin@16||0|1||||
 287 NPin|pin@17||0|2||||
 288 Ngeneric:Invisible-Pin|pin@18||-2.25|1.75|||||ART_message(D5G1;)S2.5V
 289 AThicker|net@0|||FS2250|pin@0||-0.25|-0.75|pin@3||0|-0.5|ART_color()I74
 290 AThicker|net@1|||FS1350|pin@1||-0.25|-0.25|pin@3||0|-0.5|ART_color()I74
 291 AThicker|net@2|||FS1800|pin@2||-0.75|-0.5|pin@3||0|-0.5|ART_color()I74
 292 AThicker|net@3|||FS900|pin@15||-0.75|1|pin@14||-0.75|-1|ART_color()I74
 293 AThicker|net@4|||FS1800|pin@7||-3.5|0|pin@6||-2|0|ART_color()I74
 294 AThicker|net@5|||FS900|pin@11||-2|1|pin@12||-2|-1|ART_color()I74
 295 AThicker|net@6|||FS900|pin@13||0|-1|pin@10||0|-2|ART_color()I74
 296 AThicker|net@7|||FS1800|pin@14||-0.75|-1|pin@13||0|-1|ART_color()I74
 297 AThicker|net@8|||FS0|pin@16||0|1|pin@15||-0.75|1|ART_color()I74
 298 AThicker|net@9|||FS900|pin@17||0|2|pin@16||0|1|ART_color()I74
 299 Eb||D5G1;|pin@4||B
 300 Ed||D5G1;|pin@9||B
 301 Eg||D5G1;|pin@8||I
 302 Es||D5G1;|pin@5||B
 303 X
 304
 305 # Cell NMOS4f_io25;1{sch}
 306 CNMOS4f_io25;1{sch}||schematic|1021415734000|1159313192055||ATTR_Delay(D5G1;HNPX-18.25;Y-12.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-18;Y-11.5;)S5.6|ATTR_W(D5FLeave alone;G1;HNOLPX-18;Y-10.5;)S3|ATTR_CDL_template(D5G1;NTX-1;Y-26;)SM$(node_name) $(d) $(g) $(s) $(b) nch_25 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-1.5;Y-23.5;)StransistorType  OD25-N-Transistor|ATTR_SPICE_template(D5G1;NTX2.5;Y-19.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_25 W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-0.5;Y-28;)SM$(node_name) $(d) $(g) $(s) $(b) nch_25 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-17.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_25 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-6;Y-21.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
 307 INMOS4f_io25;1{ic}|NMOS4f_i@1||18.5|1|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.25;Y-0.25;)S5.6|ATTR_W(D6FLeave alone;G1;NOLPX1.75;Y0.75;)S3
 308 Ngeneric:Facet-Center|art@0||0|0||||AV
 309 NOff-Page|conn@0||4.5|-7.5||||
 310 NOff-Page|conn@1||4.5|-12.5||||
 311 NOff-Page|conn@2||4.5|0||||
 312 NOff-Page|conn@3||-18.5|-6.5||||
 313 N4-Port-Transistor|nmos4p@0||-2|-6.5|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X2;Y-3.5;)Snch_25
 314 Ngeneric:Invisible-Pin|pin@0||-2|13.5|||||ART_message(D5G2;)S4-terminal NMOS device for 2.5V I/O pads
 315 NWire_Pin|pin@1||0|-12.5||||
 316 NWire_Pin|pin@2||0|0||||
 317 Ngeneric:Invisible-Pin|pin@3||-1.5|19|||||ART_message(D5G6;)SNMOS4f_io25
 318 Ngeneric:Invisible-Pin|pin@4||-2|8.5|||||ART_message(D5G2;)Sminimum length for 2.5V thick-oxide devices is 5.6
 319 Awire|net@0|||0|nmos4p@0|g|-3|-6.5|conn@3|y|-16.5|-6.5
 320 Awire|net@1|||1800|nmos4p@0|b|0|-7.5|conn@0|a|2.5|-7.5
 321 Awire|net@2|||900|nmos4p@0|s|0|-8.5|pin@1||0|-12.5
 322 Awire|net@3|||1800|pin@1||0|-12.5|conn@1|a|2.5|-12.5
 323 Awire|net@4|||1800|pin@2||0|0|conn@2|a|2.5|0
 324 Awire|net@5|||900|pin@2||0|0|nmos4p@0|d|0|-4.5
 325 Eb||D5G2;|conn@0|y|B
 326 Ed||D5G2;|conn@2|y|B
 327 Eg||D5G2;|conn@3|a|I
 328 Es||D5G2;|conn@1|y|B
 329 X
 330
 331 # Cell NMOS4f_io33;1{ic}
 332 CNMOS4f_io33;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.25;Y-0.25;)S7.6|ATTR_W(D6FLeave alone;G1;HNOLPX1.75;Y0.75;)S3|prototype_center()I[0,0]
 333 Ngeneric:Facet-Center|art@0||0|0||||AV
 334 NPin|pin@0||-0.25|-0.75||||
 335 NPin|pin@1||-0.25|-0.25||||
 336 NPin|pin@2||-0.75|-0.5|1|1|RR|
 337 NPin|pin@3||0|-0.5|||RR|
 338 Ngeneric:Invisible-Pin|pin@4||0|-0.5||||
 339 Ngeneric:Invisible-Pin|pin@5||0|-2||||
 340 NPin|pin@6||-2|0|1|1|RR|
 341 NPin|pin@7||-3.5|0|||RR|
 342 Nschematic:Bus_Pin|pin@8||-3.5|0|-2|-2||
 343 Nschematic:Bus_Pin|pin@9||0|2|-2|-2||
 344 NPin|pin@10||0|-2||||
 345 NPin|pin@11||-2|1|1|1||
 346 NPin|pin@12||-2|-1|1|1||
 347 NPin|pin@13||0|-1||||
 348 NPin|pin@14||-0.75|-1|1|1||
 349 NPin|pin@15||-0.75|1|1|1||
 350 NPin|pin@16||0|1||||
 351 NPin|pin@17||0|2||||
 352 Ngeneric:Invisible-Pin|pin@18||-2.25|1.75|||||ART_message(D5G1;)S3.3V
 353 AThicker|net@0|||FS2250|pin@0||-0.25|-0.75|pin@3||0|-0.5|ART_color()I74
 354 AThicker|net@1|||FS1350|pin@1||-0.25|-0.25|pin@3||0|-0.5|ART_color()I74
 355 AThicker|net@2|||FS1800|pin@2||-0.75|-0.5|pin@3||0|-0.5|ART_color()I74
 356 AThicker|net@3|||FS900|pin@15||-0.75|1|pin@14||-0.75|-1|ART_color()I74
 357 AThicker|net@4|||FS1800|pin@7||-3.5|0|pin@6||-2|0|ART_color()I74
 358 AThicker|net@5|||FS900|pin@11||-2|1|pin@12||-2|-1|ART_color()I74
 359 AThicker|net@6|||FS900|pin@13||0|-1|pin@10||0|-2|ART_color()I74
 360 AThicker|net@7|||FS1800|pin@14||-0.75|-1|pin@13||0|-1|ART_color()I74
 361 AThicker|net@8|||FS0|pin@16||0|1|pin@15||-0.75|1|ART_color()I74
 362 AThicker|net@9|||FS900|pin@17||0|2|pin@16||0|1|ART_color()I74
 363 Eb||D5G1;|pin@4||B
 364 Ed||D5G1;|pin@9||B
 365 Eg||D5G1;|pin@8||I
 366 Es||D5G1;|pin@5||B
 367 X
 368
 369 # Cell NMOS4f_io33;1{sch}
 370 CNMOS4f_io33;1{sch}||schematic|1021415734000|1159313151805||ATTR_Delay(D5G1;HNPX-18.25;Y-12.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-18;Y-11.5;)S7.6|ATTR_W(D5FLeave alone;G1;HNOLPX-18;Y-10.5;)S3|ATTR_CDL_template(D5G1;NTX-3.5;Y-26;)SM$(node_name) $(d) $(g) $(s) $(b) nch_33 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-5;Y-24;)StransistorType  OD33-N-Transistor|ATTR_SPICE_template(D5G1;NTX-1.5;Y-19.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_33 W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-3;Y-28;)SM$(node_name) $(d) $(g) $(s) $(b) nch_33 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-17.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_33 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-6;Y-21.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
 371 INMOS4f_io33;1{ic}|NMOS4f_i@3||18.5|1|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.25;Y-0.25;)S7.6|ATTR_W(D6FLeave alone;G1;NOLPX1.75;Y0.75;)S3
 372 Ngeneric:Facet-Center|art@0||0|0||||AV
 373 NOff-Page|conn@0||4.5|-7.5||||
 374 NOff-Page|conn@1||4.5|-12.5||||
 375 NOff-Page|conn@2||4.5|0||||
 376 NOff-Page|conn@3||-18.5|-6.5||||
 377 N4-Port-Transistor|nmos4p@0||-2|-6.5|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-4;)Snch_33
 378 Ngeneric:Invisible-Pin|pin@0||-2|13.5|||||ART_message(D5G2;)S4-terminal NMOS device for 3.3V I/O pads
 379 NWire_Pin|pin@1||0|-12.5||||
 380 NWire_Pin|pin@2||0|0||||
 381 Ngeneric:Invisible-Pin|pin@3||-1.5|19|||||ART_message(D5G6;)SNMOS4f_io33
 382 Ngeneric:Invisible-Pin|pin@4||-2|8.5|||||ART_message(D5G2;)Sminimum length for 3.3V thick-oxide devices is 7.6
 383 Awire|net@0|||0|nmos4p@0|g|-3|-6.5|conn@3|y|-16.5|-6.5
 384 Awire|net@1|||1800|nmos4p@0|b|0|-7.5|conn@0|a|2.5|-7.5
 385 Awire|net@2|||900|nmos4p@0|s|0|-8.5|pin@1||0|-12.5
 386 Awire|net@3|||1800|pin@1||0|-12.5|conn@1|a|2.5|-12.5
 387 Awire|net@4|||1800|pin@2||0|0|conn@2|a|2.5|0
 388 Awire|net@5|||900|pin@2||0|0|nmos4p@0|d|0|-4.5
 389 Eb||D5G2;|conn@0|y|B
 390 Ed||D5G2;|conn@2|y|B
 391 Eg||D5G2;|conn@3|a|I
 392 Es||D5G2;|conn@1|y|B
 393 X
 394
 395 # Cell NMOS4f_low;1{ic}
 396 CNMOS4f_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.25;Y-0.25;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX1.75;Y0.75;)S3|prototype_center()I[0,0]
 397 Ngeneric:Facet-Center|art@0||0|0||||AV
 398 NPin|pin@0||-0.25|-0.75||||
 399 NPin|pin@1||-0.25|-0.25||||
 400 NPin|pin@2||-0.75|-0.5|1|1|RR|
 401 NPin|pin@3||0|-0.5|||RR|
 402 Ngeneric:Invisible-Pin|pin@4||0|-0.5||||
 403 Ngeneric:Invisible-Pin|pin@5||0|-2||||
 404 NPin|pin@6||-1|0|1|1|RR|
 405 NPin|pin@7||-2.5|0|||RR|
 406 Nschematic:Bus_Pin|pin@8||-2.5|0|-2|-2||
 407 Nschematic:Bus_Pin|pin@9||0|2|-2|-2||
 408 NPin|pin@10||0|-2||||
 409 NPin|pin@11||-1|1|1|1||
 410 NPin|pin@12||-1|-1|1|1||
 411 NPin|pin@13||0|-1||||
 412 NPin|pin@14||-0.75|-1|1|1||
 413 NPin|pin@15||-0.75|1|1|1||
 414 NPin|pin@16||0|1||||
 415 NPin|pin@17||0|2||||
 416 AThicker|net@0|||FS2250|pin@0||-0.25|-0.75|pin@3||0|-0.5|ART_color()I74
 417 AThicker|net@1|||FS1350|pin@1||-0.25|-0.25|pin@3||0|-0.5|ART_color()I74
 418 AThicker|net@2|||FS1800|pin@2||-0.75|-0.5|pin@3||0|-0.5|ART_color()I74
 419 AThicker|net@3|||FS900|pin@15||-0.75|1|pin@14||-0.75|-1|ART_color()I74
 420 AThicker|net@4|||FS1800|pin@7||-2.5|0|pin@6||-1|0|ART_color()I74
 421 AThicker|net@5|||FS900|pin@11||-1|1|pin@12||-1|-1|ART_color()I74
 422 AThicker|net@6|||FS900|pin@13||0|-1|pin@10||0|-2|ART_color()I74
 423 AThicker|net@7|||FS1800|pin@14||-0.75|-1|pin@13||0|-1|ART_color()I74
 424 AThicker|net@8|||FS0|pin@16||0|1|pin@15||-0.75|1|ART_color()I74
 425 AThicker|net@9|||FS900|pin@17||0|2|pin@16||0|1|ART_color()I74
 426 Eb||D5G1;|pin@4||B
 427 Ed||D5G1;|pin@9||B
 428 Eg||D5G1;|pin@8||I
 429 Es||D5G1;|pin@5||B
 430 X
 431
 432 # Cell NMOS4f_low;1{sch}
 433 CNMOS4f_low;1{sch}||schematic|1021415734000|1159313276571||ATTR_Delay(D5G1;HNPX-18.25;Y-12.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-18;Y-11.5;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-18;Y-10.5;)S3|ATTR_CDL_template(D5G1;NTX-4;Y-25.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-3.75;Y-23.5;)StransistorType VTL-N-Transistor|ATTR_SPICE_template(D5G1;NTX-3.5;Y-19.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_lvt W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-3.5;Y-27.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-17.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_lvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-6;Y-21.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
 434 INMOS4f_low;1{ic}|NMOS4f@0||18.5|1|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.25;Y-0.25;)S2|ATTR_W(D6FLeave alone;G1;NOLPX1.75;Y0.75;)S3
 435 Ngeneric:Facet-Center|art@0||0|0||||AV
 436 NOff-Page|conn@0||4.5|-7.5||||
 437 NOff-Page|conn@1||4.5|-12.5||||
 438 NOff-Page|conn@2||4.5|0||||
 439 NOff-Page|conn@3||-18.5|-6.5||||
 440 N4-Port-Transistor|nmos4p@0||-2|-6.5|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Snch_lvt
 441 Ngeneric:Invisible-Pin|pin@0||-2|8.5|||||ART_message(D5G3;)S4-terminal low-threshold NMOS device
 442 NWire_Pin|pin@1||0|-12.5||||
 443 NWire_Pin|pin@2||0|0||||
 444 Ngeneric:Invisible-Pin|pin@3||-1.5|14|||||ART_message(D5G6;)SNMOS4f_low
 445 Awire|net@0|||0|nmos4p@0|g|-3|-6.5|conn@3|y|-16.5|-6.5
 446 Awire|net@1|||1800|nmos4p@0|b|0|-7.5|conn@0|a|2.5|-7.5
 447 Awire|net@2|||900|nmos4p@0|s|0|-8.5|pin@1||0|-12.5
 448 Awire|net@3|||1800|pin@1||0|-12.5|conn@1|a|2.5|-12.5
 449 Awire|net@4|||1800|pin@2||0|0|conn@2|a|2.5|0
 450 Awire|net@5|||900|pin@2||0|0|nmos4p@0|d|0|-4.5
 451 Eb||D5G2;|conn@0|y|B
 452 Ed||D5G2;|conn@2|y|B
 453 Eg||D5G2;|conn@3|a|I
 454 Es||D5G2;|conn@1|y|B
 455 X
 456
 457 # Cell NMOS4f_native;1{ic}
 458 CNMOS4f_native;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.25;Y-0.25;)S4|ATTR_W(D6FLeave alone;G1;HNOLPX1.75;Y0.75;)S10|prototype_center()I[0,0]
 459 Ngeneric:Facet-Center|art@0||0|0||||AV
 460 NPin|pin@0||-0.25|-0.75||||
 461 NPin|pin@1||-0.25|-0.25||||
 462 NPin|pin@2||-0.75|-0.5|1|1|RR|
 463 NPin|pin@3||0|-0.5|||RR|
 464 Ngeneric:Invisible-Pin|pin@4||0|-0.5||||
 465 Ngeneric:Invisible-Pin|pin@5||0|-2||||
 466 NPin|pin@6||-0.75|0|1|1|RR|
 467 NPin|pin@7||-2.5|0|||RR|
 468 Nschematic:Bus_Pin|pin@8||-2.5|0|-2|-2||
 469 Nschematic:Bus_Pin|pin@9||0|2|-2|-2||
 470 NPin|pin@10||0|-2||||
 471 NPin|pin@13||0|-1||||
 472 NPin|pin@14||-0.75|-1|1|1||
 473 NPin|pin@15||-0.75|1|1|1||
 474 NPin|pin@16||0|1||||
 475 NPin|pin@17||0|2||||
 476 AThicker|net@0|||FS2250|pin@0||-0.25|-0.75|pin@3||0|-0.5|ART_color()I74
 477 AThicker|net@1|||FS1350|pin@1||-0.25|-0.25|pin@3||0|-0.5|ART_color()I74
 478 AThicker|net@2|||FS1800|pin@2||-0.75|-0.5|pin@3||0|-0.5|ART_color()I74
 479 AThicker|net@3|||FS900|pin@15||-0.75|1|pin@14||-0.75|-1|ART_color()I74
 480 AThicker|net@4|||FS1800|pin@7||-2.5|0|pin@6||-0.75|0|ART_color()I74
 481 AThicker|net@6|||FS900|pin@13||0|-1|pin@10||0|-2|ART_color()I74
 482 AThicker|net@7|||FS1800|pin@14||-0.75|-1|pin@13||0|-1|ART_color()I74
 483 AThicker|net@8|||FS0|pin@16||0|1|pin@15||-0.75|1|ART_color()I74
 484 AThicker|net@9|||FS900|pin@17||0|2|pin@16||0|1|ART_color()I74
 485 Eb||D5G1;|pin@4||B
 486 Ed||D5G1;|pin@9||B
 487 Eg||D5G1;|pin@8||I
 488 Es||D5G1;|pin@5||B
 489 X
 490
 491 # Cell NMOS4f_native;1{sch}
 492 CNMOS4f_native;1{sch}||schematic|1021415734000|1158099366852||ATTR_Delay(D5G1;HNPX-18.25;Y-12.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-18;Y-11.5;)S4|ATTR_W(D5FLeave alone;G1;HNOLPX-18;Y-10.5;)S10|ATTR_CDL_template(D5G1;NTX-6;Y-25.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-5;Y-23.5;)StransistorType  NT-N-Transistor|ATTR_SPICE_template(D5G1;NTX-3.5;Y-19.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-5.5;Y-27.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-17.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-6;Y-21.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
 493 INMOS4f_native;1{ic}|NMOS4f@0||18.5|1|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.25;Y-0.25;)S4|ATTR_W(D6FLeave alone;G1;NOLPX1.75;Y0.75;)S10
 494 Ngeneric:Facet-Center|art@0||0|0||||AV
 495 NOff-Page|conn@0||4.5|-7.5||||
 496 NOff-Page|conn@1||4.5|-12.5||||
 497 NOff-Page|conn@2||4.5|0||||
 498 NOff-Page|conn@3||-12.5|-6.5||||
 499 N4-Port-Transistor|nmos4p@0||-2|-6.5|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X2;Y-4;)Snch_na
 500 Ngeneric:Invisible-Pin|pin@0||-2|15.5|||||ART_message(D5G2;)S4-terminal native-threshold NMOS device
 501 NWire_Pin|pin@1||0|-12.5||||
 502 NWire_Pin|pin@2||0|0||||
 503 Ngeneric:Invisible-Pin|pin@3||-1.5|22|||||ART_message(D5G6;)SNMOS4f_native
 504 Ngeneric:Invisible-Pin|pin@4||-2.5|9|||||ART_message(D5G2;)S[note that the minimum allowed native,"device dimensions are W=10, L=4"]
 505 Awire|net@0|||0|nmos4p@0|g|-3|-6.5|conn@3|y|-10.5|-6.5
 506 Awire|net@1|||1800|nmos4p@0|b|0|-7.5|conn@0|a|2.5|-7.5
 507 Awire|net@2|||900|nmos4p@0|s|0|-8.5|pin@1||0|-12.5
 508 Awire|net@3|||1800|pin@1||0|-12.5|conn@1|a|2.5|-12.5
 509 Awire|net@4|||1800|pin@2||0|0|conn@2|a|2.5|0
 510 Awire|net@5|||900|pin@2||0|0|nmos4p@0|d|0|-4.5
 511 Eb||D5G2;|conn@0|y|B
 512 Ed||D5G2;|conn@2|y|B
 513 Eg||D5G2;|conn@3|a|I
 514 Es||D5G2;|conn@1|y|B
 515 X
 516
 517 # Cell NMOS4fwk;1{ic}
 518 CNMOS4fwk;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,-8000]
 519 Ngeneric:Facet-Center|art@0||0|0||||AV
 520 NPin|pin@0||0|2||||
 521 NPin|pin@1||0|0.75||||
 522 NPin|pin@2||-0.75|0.75|1|1||
 523 NPin|pin@3||-0.75|-0.75|1|1||
 524 NPin|pin@4||0|-0.75||||
 525 NPin|pin@5||-1.25|-0.75|1|1||
 526 NPin|pin@6||-1.25|0.75|1|1||
 527 NPin|pin@7||0|-2||||
 528 Nschematic:Bus_Pin|pin@8||0|2|-2|-2||
 529 Nschematic:Bus_Pin|pin@9||-3|0|-2|-2||
 530 NPin|pin@10||-3|0|||RR|
 531 NPin|pin@11||-1.25|0|1|1|RR|
 532 Ngeneric:Invisible-Pin|pin@12||0|-2||||
 533 Ngeneric:Invisible-Pin|pin@13||-0.5|0|||||ART_message(D5G1;)S[wk]
 534 NPin|pin@14||0|-0.5||||
 535 NPin|pin@15||-0.75|-0.5|1|1||
 536 NPin|pin@16||-0.5|-0.75|1|1|YRR|
 537 NPin|pin@17||-0.75|-0.5|1|1|Y|
 538 NPin|pin@18||-0.75|-0.5|1|1||
 539 NPin|pin@19||-0.5|-0.25|1|1|RR|
 540 Nschematic:Bus_Pin|pin@20||0|-0.5||||
 541 AThicker|net@0|||FS900|pin@0||0|2|pin@1||0|0.75|ART_color()I74
 542 AThicker|net@1|||FS0|pin@1||0|0.75|pin@2||-0.75|0.75|ART_color()I74
 543 AThicker|net@2|||FS1800|pin@3||-0.75|-0.75|pin@4||0|-0.75|ART_color()I74
 544 AThicker|net@3|||FS900|pin@4||0|-0.75|pin@7||0|-2|ART_color()I74
 545 AThicker|net@4|||FS900|pin@6||-1.25|0.75|pin@5||-1.25|-0.75|ART_color()I74
 546 AThicker|net@5|||FS1800|pin@10||-3|0|pin@11||-1.25|0|ART_color()I74
 547 AThicker|net@6|||FS900|pin@2||-0.75|0.75|pin@3||-0.75|-0.75|ART_color()I74
 548 AThicker|net@7|||FS1800|pin@15||-0.75|-0.5|pin@14||0|-0.5|ART_color()I74
 549 AThicker|net@8|||FS3150|pin@16||-0.5|-0.75|pin@17||-0.75|-0.5|ART_color()I74
 550 AThicker|net@9|||FS450|pin@19||-0.5|-0.25|pin@18||-0.75|-0.5|ART_color()I74
 551 Eb||D5G1;|pin@20||B
 552 Ed||D5G1;|pin@8||B
 553 Eg||D5G1;|pin@9||I
 554 Es||D5G1;|pin@12||B
 555 X
 556
 557 # Cell NMOS4fwk;1{sch}
 558 CNMOS4fwk;1{sch}||schematic|1021415734000|1159313367315||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S3|ATTR_CDL_template(D5G1;NTX-1;Y-29;)SM$(node_name) $(d) $(g) $(s) $(b) nch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template(D5G1;NTX4;Y-24;)SM$(node_name) $(d) $(g) $(s) $(b) nch W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-0.5;Y-31;)SM$(node_name) $(d) $(g) $(s) $(b) nch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTY-21.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Srtranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
 559 INMOS4fwk;1{ic}|NMOS4fwk@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3|ATTR_GEO(T)I0|ATTR_M(T)I1
 560 Ngeneric:Facet-Center|art@0||0|0||||AV
 561 NOff-Page|conn@0||-10|-8||||
 562 NOff-Page|conn@1||4.5|0||||
 563 NOff-Page|conn@2||6|-16.5||||
 564 NOff-Page|conn@3||6|-9|||YRR|
 565 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-2.5;)Snch
 566 Ngeneric:Invisible-Pin|pin@0||0|11.5|||||ART_message(D5G6;)S[NMOS4fwk]
 567 NWire_Pin|pin@1||0|0||||
 568 NWire_Pin|pin@2||0|-16.5||||
 569 Ngeneric:Invisible-Pin|pin@3||1|5.5|||||ART_message(D5G2;)S4-terminal standard threshold weak NMOS device
 570 Awire|net@0|||900|pin@1||0|0|nmos4p@0|d|0|-6
 571 Awire|net@1|||1800|conn@0|y|-8|-8|nmos4p@0|g|-3|-8
 572 Awire|net@2|||1800|pin@1||0|0|conn@1|a|2.5|0
 573 Awire|net@3|||1800|pin@2||0|-16.5|conn@2|a|4|-16.5
 574 Awire|net@4|||900|nmos4p@0|s|0|-10|pin@2||0|-16.5
 575 Awire|net@5|||1800|nmos4p@0|b|0|-9|conn@3|y|4|-9
 576 Eb||D5G2;|conn@3|y|B
 577 Ed||D5G2;|conn@1|y|B
 578 Eg||D5G2;|conn@0|a|I
 579 Es||D5G2;|conn@2|y|B
 580 X
 581
 582 # Cell NMOS4fwk_high;1{ic}
 583 CNMOS4fwk_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,-8000]
 584 Ngeneric:Facet-Center|art@0||0|0||||AV
 585 NPin|pin@0||0|2||||
 586 NPin|pin@1||0|0.75||||
 587 NPin|pin@2||-0.75|0.75|1|1||
 588 NPin|pin@3||-0.75|-0.75|1|1||
 589 NPin|pin@4||0|-0.75||||
 590 NPin|pin@5||-1.75|-0.75|1|1||
 591 NPin|pin@6||-1.75|0.75|1|1||
 592 NPin|pin@7||0|-2||||
 593 Nschematic:Bus_Pin|pin@8||0|2|-2|-2||
 594 Nschematic:Bus_Pin|pin@9||-3|0|-2|-2||
 595 NPin|pin@10||-3|0|||RR|
 596 NPin|pin@11||-1.75|0|1|1|RR|
 597 Ngeneric:Invisible-Pin|pin@12||0|-2||||
 598 Ngeneric:Invisible-Pin|pin@13||-0.5|0|||||ART_message(D5G1;)S[wk]
 599 NPin|pin@14||0|-0.5||||
 600 NPin|pin@15||-0.75|-0.5|1|1||
 601 NPin|pin@16||-0.5|-0.75|1|1|YRR|
 602 NPin|pin@17||-0.75|-0.5|1|1|Y|
 603 NPin|pin@18||-0.75|-0.5|1|1||
 604 NPin|pin@19||-0.5|-0.25|1|1|RR|
 605 Nschematic:Bus_Pin|pin@20||0|-0.5||||
 606 AThicker|net@0|||FS900|pin@0||0|2|pin@1||0|0.75|ART_color()I74
 607 AThicker|net@1|||FS0|pin@1||0|0.75|pin@2||-0.75|0.75|ART_color()I74
 608 AThicker|net@2|||FS1800|pin@3||-0.75|-0.75|pin@4||0|-0.75|ART_color()I74
 609 AThicker|net@3|||FS900|pin@4||0|-0.75|pin@7||0|-2|ART_color()I74
 610 AThicker|net@4|||FS900|pin@6||-1.75|0.75|pin@5||-1.75|-0.75|ART_color()I74
 611 AThicker|net@5|||FS1800|pin@10||-3|0|pin@11||-1.75|0|ART_color()I74
 612 AThicker|net@6|||FS900|pin@2||-0.75|0.75|pin@3||-0.75|-0.75|ART_color()I74
 613 AThicker|net@7|||FS1800|pin@15||-0.75|-0.5|pin@14||0|-0.5|ART_color()I74
 614 AThicker|net@8|||FS3150|pin@16||-0.5|-0.75|pin@17||-0.75|-0.5|ART_color()I74
 615 AThicker|net@9|||FS450|pin@19||-0.5|-0.25|pin@18||-0.75|-0.5|ART_color()I74
 616 Eb||D5G1;|pin@20||B
 617 Ed||D5G1;|pin@8||B
 618 Eg||D5G1;|pin@9||I
 619 Es||D5G1;|pin@12||B
 620 X
 621
 622 # Cell NMOS4fwk_high;1{sch}
 623 CNMOS4fwk_high;1{sch}||schematic|1021415734000|1159313323976||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S3|ATTR_CDL_template(D5G1;NTX1;Y-31.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX0.5;Y-28.75;)StransistorType VTH-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24;)SM$(node_name) $(d) $(g) $(s) $(b) nch_hvt W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX0.5;Y-34;)SM$(node_name) $(d) $(g) $(s) $(b) nch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTY-21.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_hvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Srtranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
 624 INMOS4fwk_high;1{ic}|NMOS4fwk@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3|ATTR_GEO(T)I0|ATTR_M(T)I1
 625 Ngeneric:Facet-Center|art@0||0|0||||AV
 626 NOff-Page|conn@0||-10|-8||||
 627 NOff-Page|conn@1||4.5|0||||
 628 NOff-Page|conn@2||6|-16.5||||
 629 NOff-Page|conn@3||6|-9|||YRR|
 630 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Snch_hvt
 631 Ngeneric:Invisible-Pin|pin@0||0|11.5|||||ART_message(D5G6;)SNMOS4fwk_high
 632 NWire_Pin|pin@1||0|0||||
 633 NWire_Pin|pin@2||0|-16.5||||
 634 Ngeneric:Invisible-Pin|pin@3||1|5.5|||||ART_message(D5G2;)S4-terminal high-threshold weak NMOS device
 635 Awire|net@0|||900|pin@1||0|0|nmos4p@0|d|0|-6
 636 Awire|net@1|||1800|conn@0|y|-8|-8|nmos4p@0|g|-3|-8
 637 Awire|net@2|||1800|pin@1||0|0|conn@1|a|2.5|0
 638 Awire|net@3|||1800|pin@2||0|-16.5|conn@2|a|4|-16.5
 639 Awire|net@4|||900|nmos4p@0|s|0|-10|pin@2||0|-16.5
 640 Awire|net@5|||1800|nmos4p@0|b|0|-9|conn@3|y|4|-9
 641 Eb||D5G2;|conn@3|y|B
 642 Ed||D5G2;|conn@1|y|B
 643 Eg||D5G2;|conn@0|a|I
 644 Es||D5G2;|conn@2|y|B
 645 X
 646
 647 # Cell NMOS4fwk_low;1{ic}
 648 CNMOS4fwk_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,-8000]
 649 Ngeneric:Facet-Center|art@0||0|0||||AV
 650 NPin|pin@0||0|2||||
 651 NPin|pin@1||0|0.75||||
 652 NPin|pin@2||-0.75|0.75|1|1||
 653 NPin|pin@3||-0.75|-0.75|1|1||
 654 NPin|pin@4||0|-0.75||||
 655 NPin|pin@5||-1|-0.75|1|1||
 656 NPin|pin@6||-1|0.75|1|1||
 657 NPin|pin@7||0|-2||||
 658 Nschematic:Bus_Pin|pin@8||0|2|-2|-2||
 659 Nschematic:Bus_Pin|pin@9||-2.5|0|-2|-2||
 660 NPin|pin@10||-2.5|0|||RR|
 661 NPin|pin@11||-1|0|1|1|RR|
 662 Ngeneric:Invisible-Pin|pin@12||0|-2||||
 663 Ngeneric:Invisible-Pin|pin@13||-0.5|0|||||ART_message(D5G1;)S[wk]
 664 NPin|pin@14||0|-0.5||||
 665 NPin|pin@15||-0.75|-0.5|1|1||
 666 NPin|pin@16||-0.5|-0.75|1|1|YRR|
 667 NPin|pin@17||-0.75|-0.5|1|1|Y|
 668 NPin|pin@18||-0.75|-0.5|1|1||
 669 NPin|pin@19||-0.5|-0.25|1|1|RR|
 670 Nschematic:Bus_Pin|pin@20||0|-0.5||||
 671 AThicker|net@0|||FS900|pin@0||0|2|pin@1||0|0.75|ART_color()I74
 672 AThicker|net@1|||FS0|pin@1||0|0.75|pin@2||-0.75|0.75|ART_color()I74
 673 AThicker|net@2|||FS1800|pin@3||-0.75|-0.75|pin@4||0|-0.75|ART_color()I74
 674 AThicker|net@3|||FS900|pin@4||0|-0.75|pin@7||0|-2|ART_color()I74
 675 AThicker|net@4|||FS900|pin@6||-1|0.75|pin@5||-1|-0.75|ART_color()I74
 676 AThicker|net@5|||FS1800|pin@10||-2.5|0|pin@11||-1|0|ART_color()I74
 677 AThicker|net@6|||FS900|pin@2||-0.75|0.75|pin@3||-0.75|-0.75|ART_color()I74
 678 AThicker|net@7|||FS1800|pin@15||-0.75|-0.5|pin@14||0|-0.5|ART_color()I74
 679 AThicker|net@8|||FS3150|pin@16||-0.5|-0.75|pin@17||-0.75|-0.5|ART_color()I74
 680 AThicker|net@9|||FS450|pin@19||-0.5|-0.25|pin@18||-0.75|-0.5|ART_color()I74
 681 Eb||D5G1;|pin@20||B
 682 Ed||D5G1;|pin@8||B
 683 Eg||D5G1;|pin@9||I
 684 Es||D5G1;|pin@12||B
 685 X
 686
 687 # Cell NMOS4fwk_low;1{sch}
 688 CNMOS4fwk_low;1{sch}||schematic|1021415734000|1159313388630||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5G1;HNOLPX-9;Y-13.5;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S3|ATTR_CDL_template(D5G1;NTX-1.5;Y-31.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX0.5;Y-29;)StransistorType VTL-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24;)SM$(node_name) $(d) $(g) $(s) $(b) nch_lvt W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-1;Y-33.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTY-21.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_lvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Srtranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
 689 INMOS4fwk_low;1{ic}|NMOS4fwk@0||20|0|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3|ATTR_GEO(T)I0|ATTR_M(T)I1
 690 Ngeneric:Facet-Center|art@0||0|0||||AV
 691 NOff-Page|conn@0||-10|-8||||
 692 NOff-Page|conn@1||4.5|0||||
 693 NOff-Page|conn@2||6|-16.5||||
 694 NOff-Page|conn@3||6|-9|||YRR|
 695 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Snch_lvt
 696 Ngeneric:Invisible-Pin|pin@0||1|12.5|||||ART_message(D5G6;)SNMOS4fwk_low
 697 NWire_Pin|pin@1||0|0||||
 698 NWire_Pin|pin@2||0|-16.5||||
 699 Ngeneric:Invisible-Pin|pin@3||-0.5|6.5|||||ART_message(D5G2;)S4-terminal low-threshold weak NMOS device
 700 Awire|net@0|||900|pin@1||0|0|nmos4p@0|d|0|-6
 701 Awire|net@1|||1800|conn@0|y|-8|-8|nmos4p@0|g|-3|-8
 702 Awire|net@2|||1800|pin@1||0|0|conn@1|a|2.5|0
 703 Awire|net@3|||1800|pin@2||0|-16.5|conn@2|a|4|-16.5
 704 Awire|net@4|||900|nmos4p@0|s|0|-10|pin@2||0|-16.5
 705 Awire|net@5|||1800|nmos4p@0|b|0|-9|conn@3|y|4|-9
 706 Eb||D5G2;|conn@3|y|B
 707 Ed||D5G2;|conn@1|y|B
 708 Eg||D5G2;|conn@0|a|I
 709 Es||D5G2;|conn@2|y|B
 710 X
 711
 712 # Cell NMOS4fwk_native;1{ic}
 713 CNMOS4fwk_native;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNPX3.5;)S4|ATTR_W(D6FLeave alone;G1;HNPX2;Y1;)S10|prototype_center()I[0,-8000]
 714 Ngeneric:Facet-Center|art@0||0|0||||AV
 715 NPin|pin@0||0|2||||
 716 NPin|pin@1||0|0.75||||
 717 NPin|pin@2||-0.75|0.75|1|1||
 718 NPin|pin@3||-0.75|-0.75|1|1||
 719 NPin|pin@4||0|-0.75||||
 720 NPin|pin@7||0|-2||||
 721 Nschematic:Bus_Pin|pin@8||0|2|-2|-2||
 722 Nschematic:Bus_Pin|pin@9||-2.5|0|-2|-2||
 723 NPin|pin@10||-2.5|0|||RR|
 724 NPin|pin@11||-0.75|0|1|1|RR|
 725 Ngeneric:Invisible-Pin|pin@12||0|-2||||
 726 Ngeneric:Invisible-Pin|pin@13||-0.5|0|||||ART_message(D5G1;)S[wk]
 727 NPin|pin@14||0|-0.5||||
 728 NPin|pin@15||-0.75|-0.5|1|1||
 729 NPin|pin@16||-0.5|-0.75|1|1|YRR|
 730 NPin|pin@17||-0.75|-0.5|1|1|Y|
 731 NPin|pin@18||-0.75|-0.5|1|1||
 732 NPin|pin@19||-0.5|-0.25|1|1|RR|
 733 Nschematic:Bus_Pin|pin@20||0|-0.5||||
 734 AThicker|net@0|||FS900|pin@0||0|2|pin@1||0|0.75|ART_color()I74
 735 AThicker|net@1|||FS0|pin@1||0|0.75|pin@2||-0.75|0.75|ART_color()I74
 736 AThicker|net@2|||FS1800|pin@3||-0.75|-0.75|pin@4||0|-0.75|ART_color()I74
 737 AThicker|net@3|||FS900|pin@4||0|-0.75|pin@7||0|-2|ART_color()I74
 738 AThicker|net@5|||FS1800|pin@10||-2.5|0|pin@11||-0.75|0|ART_color()I74
 739 AThicker|net@6|||FS900|pin@2||-0.75|0.75|pin@3||-0.75|-0.75|ART_color()I74
 740 AThicker|net@7|||FS1800|pin@15||-0.75|-0.5|pin@14||0|-0.5|ART_color()I74
 741 AThicker|net@8|||FS3150|pin@16||-0.5|-0.75|pin@17||-0.75|-0.5|ART_color()I74
 742 AThicker|net@9|||FS450|pin@19||-0.5|-0.25|pin@18||-0.75|-0.5|ART_color()I74
 743 Eb||D5G1;|pin@20||B
 744 Ed||D5G1;|pin@8||B
 745 Eg||D5G1;|pin@9||I
 746 Es||D5G1;|pin@12||B
 747 X
 748
 749 # Cell NMOS4fwk_native;1{sch}
 750 CNMOS4fwk_native;1{sch}||schematic|1021415734000|1159313406251||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNPX-9;Y-13.5;)S4|ATTR_W(D5FLeave alone;G1;HNPX-8.5;Y-12.5;)S10|ATTR_CDL_template(D5G1;NTX-0.5;Y-31;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-1;Y-28.5;)StransistorType  NT-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTY-33;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTY-21.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Srtranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
 751 INMOS4fwk_native;1{ic}|NMOS4fwk@0||20|0|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NPX3.5;)S4|ATTR_W(D6FLeave alone;G1;NPX2;Y1;)S10|ATTR_GEO(T)I0|ATTR_M(T)I1
 752 Ngeneric:Facet-Center|art@0||0|0||||AV
 753 NOff-Page|conn@0||-10|-8||||
 754 NOff-Page|conn@1||4.5|0||||
 755 NOff-Page|conn@2||6|-16.5||||
 756 NOff-Page|conn@3||6|-9|||YRR|
 757 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OJX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OJX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X2;Y-4;)Snch_na
 758 Ngeneric:Invisible-Pin|pin@0||1|17.5|||||ART_message(D5G6;)SNMOS4fwk_native
 759 NWire_Pin|pin@1||0|0||||
 760 NWire_Pin|pin@2||0|-16.5||||
 761 Ngeneric:Invisible-Pin|pin@3||-0.5|11.5|||||ART_message(D5G2;)S4-terminal native weak NMOS device
 762 Ngeneric:Invisible-Pin|pin@4||-0.5|6|||||ART_message(D5G2;)S[note that the minimum allowed native,"device dimensions are W=10, L=4"]
 763 Awire|net@0|||900|pin@1||0|0|nmos4p@0|d|0|-6
 764 Awire|net@1|||1800|conn@0|y|-8|-8|nmos4p@0|g|-3|-8
 765 Awire|net@2|||1800|pin@1||0|0|conn@1|a|2.5|0
 766 Awire|net@3|||1800|pin@2||0|-16.5|conn@2|a|4|-16.5
 767 Awire|net@4|||900|nmos4p@0|s|0|-10|pin@2||0|-16.5
 768 Awire|net@5|||1800|nmos4p@0|b|0|-9|conn@3|y|4|-9
 769 Eb||D5G2;|conn@3|y|B
 770 Ed||D5G2;|conn@1|y|B
 771 Eg||D5G2;|conn@0|a|I
 772 Es||D5G2;|conn@2|y|B
 773 X
 774
 775 # Cell NMOS4x;1{ic}
 776 CNMOS4x;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
 777 Ngeneric:Facet-Center|art@0||0|0||||AV
 778 Ngeneric:Invisible-Pin|pin@0||0|-2||||
 779 NPin|pin@1||-1.5|0|1|1|RR|
 780 NPin|pin@2||-3|0|||RR|
 781 Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
 782 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
 783 NPin|pin@5||0|-2||||
 784 NPin|pin@6||-1.5|1|1|1||
 785 NPin|pin@7||-1.5|-1|1|1||
 786 NPin|pin@8||0|-1||||
 787 NPin|pin@9||-0.75|-1|1|1||
 788 NPin|pin@10||-0.75|1|1|1||
 789 NPin|pin@11||0|1||||
 790 NPin|pin@12||0|2||||
 791 Ngeneric:Universal-Pin|pin@13||0|-0.5|-1|-1||
 792 NPin|pin@15||-0.75|-0.5|||X|
 793 NPin|pin@16||0|-0.5|1|1|XY|
 794 NPin|pin@17||0|-0.5|1|1|XY|
 795 NPin|pin@18||-0.25|-0.75|1|1|XYRR|
 796 NPin|pin@19||0|-0.5|1|1|XY|
 797 NPin|pin@20||-0.25|-0.25|1|1|XYRR|
 798 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I10
 799 AThicker|net@1|||FS1800|pin@2||-3|0|pin@1||-1.5|0|ART_color()I10
 800 AThicker|net@2|||FS900|pin@6||-1.5|1|pin@7||-1.5|-1|ART_color()I10
 801 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I10
 802 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I10
 803 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I10
 804 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I10
 805 AThicker|net@8|||FS2250|pin@18||-0.25|-0.75|pin@17||0|-0.5|ART_color()I10
 806 AThicker|net@9|||FS1350|pin@20||-0.25|-0.25|pin@19||0|-0.5|ART_color()I10
 807 AThicker|net@10|||FS1800|pin@15||-0.75|-0.5|pin@16||0|-0.5|ART_color()I10
 808 Eb||D5G1;|pin@13||U
 809 Ed||D5G1;|pin@4||B
 810 Eg||D5G1;|pin@3||I
 811 Es||D5G1;|pin@0||B
 812 X
 813
 814 # Cell NMOS4x;1{sch}
 815 CNMOS4x;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-11.25;)S1|prototype_center()I[0,0]
 816 INMOS4x;1{ic}|NMOS@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S1
 817 INMOS4f;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (2-0.4) / @X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 1 ? 3.0*@X : 3
 818 Ngeneric:Facet-Center|art@0||0|0||||AV
 819 NOff-Page|conn@0||6|-16.5||||
 820 NOff-Page|conn@1||5.5|0||||
 821 NOff-Page|conn@2||-18.5|-8||||
 822 NOff-Page|conn@3||11.5|-8.5|||YRR|
 823 Ngeneric:Invisible-Pin|pin@0||-13|-2|||||ART_message(D5G1;)S[Note: Gate Resistor removed for,NCC in miniheater chip]
 824 NWire_Pin|pin@1||0|-16.5||||
 825 NWire_Pin|pin@2||0|0||||
 826 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)SNMOS4x
 827 Ngeneric:Invisible-Pin|pin@4||-8.5|-4.5|||||ART_message(D5G1;)S[model,gate,resistance]
 828 Ngeneric:Invisible-Pin|pin@5||-0.5|6|||||ART_message(D5G2;)S4 terminal strength-based NMOS device
 829 Awire|net@0|||0|NMOSf@0|g|-3|-8|conn@2|y|-16.5|-8
 830 Awire|net@1|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
 831 Awire|net@2|||900|pin@2||0|0|NMOSf@0|d|0|-6
 832 Awire|net@3|||1800|pin@1||0|-16.5|conn@0|a|4|-16.5
 833 Awire|net@4|||1800|pin@2||0|0|conn@1|a|3.5|0
 834 Awire|net@8|||0|conn@3|y|9.5|-8.5|NMOSf@0|b|0|-8.5
 835 Eb||D4G2;|conn@3|a|P
 836 Ed||D5G2;|conn@1|y|B
 837 Eg||D5G2;|conn@2|a|I
 838 Es||D5G2;|conn@0|y|B
 839 X
 840
 841 # Cell NMOS4x_io18;1{ic}
 842 CNMOS4x_io18;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
 843 Ngeneric:Facet-Center|art@0||0|0||||AV
 844 Ngeneric:Invisible-Pin|pin@0||0|-2||||
 845 NPin|pin@1||-2|0|1|1|RR|
 846 NPin|pin@2||-3.5|0|||RR|
 847 Nschematic:Bus_Pin|pin@3||-3.5|0|-2|-2||
 848 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
 849 NPin|pin@5||0|-2||||
 850 NPin|pin@6||-2|1|1|1||
 851 NPin|pin@7||-2|-1|1|1||
 852 NPin|pin@8||0|-1||||
 853 NPin|pin@9||-0.75|-1|1|1||
 854 NPin|pin@10||-0.75|1|1|1||
 855 NPin|pin@11||0|1||||
 856 NPin|pin@12||0|2||||
 857 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S1.8V
 858 Ngeneric:Invisible-Pin|pin@14||0|-0.5||||
 859 NPin|pin@22||-0.75|-0.5|1|1|RR|
 860 NPin|pin@23||0|-0.5|||RR|
 861 NPin|pin@24||-0.25|-0.25||||
 862 NPin|pin@25||0|-0.5|||RR|
 863 NPin|pin@26||-0.25|-0.75||||
 864 NPin|pin@27||0|-0.5|||RR|
 865 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I10
 866 AThicker|net@1|||FS1800|pin@2||-3.5|0|pin@1||-2|0|ART_color()I10
 867 AThicker|net@2|||FS900|pin@6||-2|1|pin@7||-2|-1|ART_color()I10
 868 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I10
 869 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I10
 870 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I10
 871 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I10
 872 AThicker|net@19|||FS1800|pin@22||-0.75|-0.5|pin@23||0|-0.5|ART_color()I10
 873 AThicker|net@20|||FS1350|pin@24||-0.25|-0.25|pin@25||0|-0.5|ART_color()I10
 874 AThicker|net@21|||FS2250|pin@26||-0.25|-0.75|pin@27||0|-0.5|ART_color()I10
 875 Eb||D5G1;|pin@14||B
 876 Ed||D5G1;|pin@4||B
 877 Eg||D5G1;|pin@3||I
 878 Es||D5G1;|pin@0||B
 879 X
 880
 881 # Cell NMOS4x_io18;1{sch}
 882 CNMOS4x_io18;1{sch}||schematic|1021415734000|1158100927976||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-11.25;)S1|prototype_center()I[0,0]
 883 INMOS4x_io18;1{ic}|NMOS@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
 884 INMOS4f_io18;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (4-0.4) / @X + 0.4) : 4|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 1 ? 3.0*@X : 3
 885 Ngeneric:Facet-Center|art@0||0|0||||AV
 886 NOff-Page|conn@0||6|-16.5||||
 887 NOff-Page|conn@1||5.5|0||||
 888 NOff-Page|conn@2||-18.5|-8||||
 889 NOff-Page|conn@3||8.5|-8.5||||
 890 Ngeneric:Invisible-Pin|pin@0||-13|-2|||||ART_message(D5G1;)S[Note: Gate Resistor removed for,NCC in miniheater chip]
 891 NWire_Pin|pin@1||0|-16.5||||
 892 NWire_Pin|pin@2||0|0||||
 893 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)SNMOS4x_io25
 894 Ngeneric:Invisible-Pin|pin@4||-8.5|-4.5|||||ART_message(D5G1;)S[model,gate,resistance]
 895 Ngeneric:Invisible-Pin|pin@5||-0.5|6|||||ART_message(D5G2;)S4-terminal strength-based NMOS device for 1.8V I/O pads
 896 Awire|net@0|||0|NMOSf@0|g|-3.5|-8|conn@2|y|-16.5|-8
 897 Awire|net@1|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
 898 Awire|net@2|||900|pin@2||0|0|NMOSf@0|d|0|-6
 899 Awire|net@3|||1800|pin@1||0|-16.5|conn@0|a|4|-16.5
 900 Awire|net@4|||1800|pin@2||0|0|conn@1|a|3.5|0
 901 Awire|net@8|||0|conn@3|a|6.5|-8.5|NMOSf@0|b|0|-8.5
 902 Eb||D5G2;|conn@3|y|B
 903 Ed||D5G2;|conn@1|y|B
 904 Eg||D5G2;|conn@2|a|I
 905 Es||D5G2;|conn@0|y|B
 906 X
 907
 908 # Cell NMOS4x_io25;1{ic}
 909 CNMOS4x_io25;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
 910 Ngeneric:Facet-Center|art@0||0|0||||AV
 911 Ngeneric:Invisible-Pin|pin@0||0|-2||||
 912 NPin|pin@1||-2|0|1|1|RR|
 913 NPin|pin@2||-3.5|0|||RR|
 914 Nschematic:Bus_Pin|pin@3||-3.5|0|-2|-2||
 915 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
 916 NPin|pin@5||0|-2||||
 917 NPin|pin@6||-2|1|1|1||
 918 NPin|pin@7||-2|-1|1|1||
 919 NPin|pin@8||0|-1||||
 920 NPin|pin@9||-0.75|-1|1|1||
 921 NPin|pin@10||-0.75|1|1|1||
 922 NPin|pin@11||0|1||||
 923 NPin|pin@12||0|2||||
 924 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S2.5V
 925 Ngeneric:Invisible-Pin|pin@14||0|-0.5||||
 926 NPin|pin@22||-0.75|-0.5|1|1|RR|
 927 NPin|pin@23||0|-0.5|||RR|
 928 NPin|pin@24||-0.25|-0.25||||
 929 NPin|pin@25||0|-0.5|||RR|
 930 NPin|pin@26||-0.25|-0.75||||
 931 NPin|pin@27||0|-0.5|||RR|
 932 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I10
 933 AThicker|net@1|||FS1800|pin@2||-3.5|0|pin@1||-2|0|ART_color()I10
 934 AThicker|net@2|||FS900|pin@6||-2|1|pin@7||-2|-1|ART_color()I10
 935 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I10
 936 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I10
 937 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I10
 938 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I10
 939 AThicker|net@19|||FS1800|pin@22||-0.75|-0.5|pin@23||0|-0.5|ART_color()I10
 940 AThicker|net@20|||FS1350|pin@24||-0.25|-0.25|pin@25||0|-0.5|ART_color()I10
 941 AThicker|net@21|||FS2250|pin@26||-0.25|-0.75|pin@27||0|-0.5|ART_color()I10
 942 Eb||D5G1;|pin@14||B
 943 Ed||D5G1;|pin@4||B
 944 Eg||D5G1;|pin@3||I
 945 Es||D5G1;|pin@0||B
 946 X
 947
 948 # Cell NMOS4x_io25;1{sch}
 949 CNMOS4x_io25;1{sch}||schematic|1021415734000|1158100925062||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-11.25;)S1|prototype_center()I[0,0]
 950 INMOS4x_io25;1{ic}|NMOS4_io@1||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
 951 INMOS4f_io25;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (5.6-0.4) / @X + 0.4) : 5.6|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 1 ? 3.0*@X : 3
 952 Ngeneric:Facet-Center|art@0||0|0||||AV
 953 NOff-Page|conn@0||6|-16.5||||
 954 NOff-Page|conn@1||5.5|0||||
 955 NOff-Page|conn@2||-18.5|-8||||
 956 NOff-Page|conn@3||8.5|-8.5||||
 957 Ngeneric:Invisible-Pin|pin@0||-13|-2|||||ART_message(D5G1;)S[Note: Gate Resistor removed for,NCC in miniheater chip]
 958 NWire_Pin|pin@1||0|-16.5||||
 959 NWire_Pin|pin@2||0|0||||
 960 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)SNMOS4x_io33
 961 Ngeneric:Invisible-Pin|pin@4||-8.5|-4.5|||||ART_message(D5G1;)S[model,gate,resistance]
 962 Ngeneric:Invisible-Pin|pin@5||-0.5|6|||||ART_message(D5G2;)S4-terminal strength-based NMOS device for 2.5V I/O pads
 963 Awire|net@0|||0|NMOSf@0|g|-3.5|-8|conn@2|y|-16.5|-8
 964 Awire|net@1|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
 965 Awire|net@2|||900|pin@2||0|0|NMOSf@0|d|0|-6
 966 Awire|net@3|||1800|pin@1||0|-16.5|conn@0|a|4|-16.5
 967 Awire|net@4|||1800|pin@2||0|0|conn@1|a|3.5|0
 968 Awire|net@8|||0|conn@3|a|6.5|-8.5|NMOSf@0|b|0|-8.5
 969 Eb||D5G2;|conn@3|y|B
 970 Ed||D5G2;|conn@1|y|B
 971 Eg||D5G2;|conn@2|a|I
 972 Es||D5G2;|conn@0|y|B
 973 X
 974
 975 # Cell NMOS4x_io33;1{ic}
 976 CNMOS4x_io33;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
 977 Ngeneric:Facet-Center|art@0||0|0||||AV
 978 Ngeneric:Invisible-Pin|pin@0||0|-2||||
 979 NPin|pin@1||-2|0|1|1|RR|
 980 NPin|pin@2||-3.5|0|||RR|
 981 Nschematic:Bus_Pin|pin@3||-3.5|0|-2|-2||
 982 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
 983 NPin|pin@5||0|-2||||
 984 NPin|pin@6||-2|1|1|1||
 985 NPin|pin@7||-2|-1|1|1||
 986 NPin|pin@8||0|-1||||
 987 NPin|pin@9||-0.75|-1|1|1||
 988 NPin|pin@10||-0.75|1|1|1||
 989 NPin|pin@11||0|1||||
 990 NPin|pin@12||0|2||||
 991 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S3.3V
 992 Ngeneric:Invisible-Pin|pin@14||0|-0.5||||
 993 NPin|pin@22||-0.75|-0.5|1|1|RR|
 994 NPin|pin@23||0|-0.5|||RR|
 995 NPin|pin@24||-0.25|-0.25||||
 996 NPin|pin@25||0|-0.5|||RR|
 997 NPin|pin@26||-0.25|-0.75||||
 998 NPin|pin@27||0|-0.5|||RR|
 999 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I10
1000 AThicker|net@1|||FS1800|pin@2||-3.5|0|pin@1||-2|0|ART_color()I10
1001 AThicker|net@2|||FS900|pin@6||-2|1|pin@7||-2|-1|ART_color()I10
1002 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I10
1003 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I10
1004 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I10
1005 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I10
1006 AThicker|net@19|||FS1800|pin@22||-0.75|-0.5|pin@23||0|-0.5|ART_color()I10
1007 AThicker|net@20|||FS1350|pin@24||-0.25|-0.25|pin@25||0|-0.5|ART_color()I10
1008 AThicker|net@21|||FS2250|pin@26||-0.25|-0.75|pin@27||0|-0.5|ART_color()I10
1009 Eb||D5G1;|pin@14||B
1010 Ed||D5G1;|pin@4||B
1011 Eg||D5G1;|pin@3||I
1012 Es||D5G1;|pin@0||B
1013 X
1014
1015 # Cell NMOS4x_io33;1{sch}
1016 CNMOS4x_io33;1{sch}||schematic|1021415734000|1158100921910||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-11.25;)S1|prototype_center()I[0,0]
1017 INMOS4x_io33;1{ic}|NMOS4_io@3||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
1018 INMOS4f_io33;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (7.6-0.4) / @X + 0.4) : 7.6|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 1 ? 3.0*@X : 3
1019 Ngeneric:Facet-Center|art@0||0|0||||AV
1020 NOff-Page|conn@0||6|-16.5||||
1021 NOff-Page|conn@1||5.5|0||||
1022 NOff-Page|conn@2||-18.5|-8||||
1023 NOff-Page|conn@3||8.5|-8.5||||
1024 Ngeneric:Invisible-Pin|pin@0||-13|-2|||||ART_message(D5G1;)S[Note: Gate Resistor removed for,NCC in miniheater chip]
1025 NWire_Pin|pin@1||0|-16.5||||
1026 NWire_Pin|pin@2||0|0||||
1027 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)SNMOS4x_io33
1028 Ngeneric:Invisible-Pin|pin@4||-8.5|-4.5|||||ART_message(D5G1;)S[model,gate,resistance]
1029 Ngeneric:Invisible-Pin|pin@5||-0.5|6|||||ART_message(D5G2;)S4-terminal strength-based NMOS device for 3.3V I/O pads
1030 Awire|net@0|||0|NMOSf@0|g|-3.5|-8|conn@2|y|-16.5|-8
1031 Awire|net@1|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
1032 Awire|net@2|||900|pin@2||0|0|NMOSf@0|d|0|-6
1033 Awire|net@3|||1800|pin@1||0|-16.5|conn@0|a|4|-16.5
1034 Awire|net@4|||1800|pin@2||0|0|conn@1|a|3.5|0
1035 Awire|net@8|||0|conn@3|a|6.5|-8.5|NMOSf@0|b|0|-8.5
1036 Eb||D5G2;|conn@3|y|B
1037 Ed||D5G2;|conn@1|y|B
1038 Eg||D5G2;|conn@2|a|I
1039 Es||D5G2;|conn@0|y|B
1040 X
1041
1042 # Cell NMOSf;1{ic}
1043 CNMOSf;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,-8000]
1044 Ngeneric:Facet-Center|art@0||0|0||||AV
1045 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1046 NPin|pin@1||-1.5|0|1|1|RR|
1047 NPin|pin@2||-3|0|||RR|
1048 Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
1049 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1050 NPin|pin@5||0|-2||||
1051 NPin|pin@6||-1.5|1|1|1||
1052 NPin|pin@7||-1.5|-1|1|1||
1053 NPin|pin@8||0|-1||||
1054 NPin|pin@9||-0.75|-1|1|1||
1055 NPin|pin@10||-0.75|1|1|1||
1056 NPin|pin@11||0|1||||
1057 NPin|pin@12||0|2||||
1058 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I74
1059 AThicker|net@1|||FS1800|pin@2||-3|0|pin@1||-1.5|0|ART_color()I74
1060 AThicker|net@2|||FS900|pin@6||-1.5|1|pin@7||-1.5|-1|ART_color()I74
1061 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I74
1062 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I74
1063 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I74
1064 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I74
1065 Ed||D5G1;|pin@4||B
1066 Eg||D5G1;|pin@3||I
1067 Es||D5G1;|pin@0||B
1068 X
1069
1070 # Cell NMOSf;1{sch}
1071 CNMOSf;1{sch}||schematic|1021415734000|1159313246486||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S3|ATTR_CDL_template(D5G1;NTX0.5;Y-29;)SM$(node_name) $(d) $(g) $(s) gnd nch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template(D5G1;NTX4;Y-24.5;)SM$(node_name) $(d) $(g) $(s) gnd nch W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX1;Y-31;)SM$(node_name) $(d) $(g) $(s) gnd nch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX0.5;Y-22.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1072 INMOSf;1{ic}|NMOSf@0||28|0.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
1073 Ngeneric:Facet-Center|art@0||0|0||||AV
1074 NOff-Page|conn@0||6|-16.5||||
1075 NOff-Page|conn@1||6.5|0||||
1076 NOff-Page|conn@2||-16.5|-8||||
1077 NGround|gnd@0||5|-11||||
1078 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Snch
1079 NWire_Pin|pin@0||0|-16.5||||
1080 NWire_Pin|pin@1||0|0||||
1081 Ngeneric:Invisible-Pin|pin@2||1.5|14|||||ART_message(D5G6;)S[NMOSf]
1082 Ngeneric:Invisible-Pin|pin@3||1.5|7.5|||||ART_message(D5G2;)S3-terminal standard threshold NMOS device
1083 Awire|net@0|||0|conn@1|a|4.5|0|pin@1||0|0
1084 Awire|net@1|||0|nmos4p@0|g|-3|-8|conn@2|y|-14.5|-8
1085 Awire|net@2|||900|nmos4p@0|s|0|-10|pin@0||0|-16.5
1086 Awire|net@3|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
1087 Awire|net@4|||900|pin@1||0|0|nmos4p@0|d|0|-6
1088 Awire|net@5|||1800|nmos4p@0|b|0|-9|gnd@0||5|-9
1089 Ed||D5G2;|conn@1|y|B
1090 Eg||D5G2;|conn@2|a|I
1091 Es||D5G2;|conn@0|y|B
1092 X
1093
1094 # Cell NMOSf_high;1{ic}
1095 CNMOSf_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,-8000]
1096 Ngeneric:Facet-Center|art@0||0|0||||AV
1097 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1098 NPin|pin@1||-2|0|1|1|RR|
1099 NPin|pin@2||-3.5|0|||RR|
1100 Nschematic:Bus_Pin|pin@3||-3.5|0|-2|-2||
1101 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1102 NPin|pin@5||0|-2||||
1103 NPin|pin@6||-2|1|1|1||
1104 NPin|pin@7||-2|-1|1|1||
1105 NPin|pin@8||0|-1||||
1106 NPin|pin@9||-0.75|-1|1|1||
1107 NPin|pin@10||-0.75|1|1|1||
1108 NPin|pin@11||0|1||||
1109 NPin|pin@12||0|2||||
1110 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I74
1111 AThicker|net@1|||FS1800|pin@2||-3.5|0|pin@1||-2|0|ART_color()I74
1112 AThicker|net@2|||FS900|pin@6||-2|1|pin@7||-2|-1|ART_color()I74
1113 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I74
1114 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I74
1115 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I74
1116 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I74
1117 Ed||D5G1;|pin@4||B
1118 Eg||D5G1;|pin@3||I
1119 Es||D5G1;|pin@0||B
1120 X
1121
1122 # Cell NMOSf_high;1{sch}
1123 CNMOSf_high;1{sch}||schematic|1021415734000|1159313222266||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S3|ATTR_CDL_template(D5G1;NTX4;Y-31;)SM$(node_name) $(d) $(g) $(s) gnd nch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX4.5;Y-28.5;)StransistorType VTH-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_hvt W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX4.5;Y-33;)SM$(node_name) $(d) $(g) $(s) gnd nch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2.5;Y-22;)SM$(node_name) $(d) $(g) $(s) gnd nch_hvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX2.5;Y-26.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1124 INMOSf_high;1{ic}|NMOSf@0||28|0.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
1125 Ngeneric:Facet-Center|art@0||0|0||||AV
1126 NOff-Page|conn@0||6|-16.5||||
1127 NOff-Page|conn@1||6.5|0||||
1128 NOff-Page|conn@2||-16.5|-8||||
1129 NGround|gnd@0||5|-11||||
1130 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1;Y-3;)Snch_hvt
1131 NWire_Pin|pin@0||0|-16.5||||
1132 NWire_Pin|pin@1||0|0||||
1133 Ngeneric:Invisible-Pin|pin@2||1.5|14|||||ART_message(D5G6;)SNMOSf_high
1134 Ngeneric:Invisible-Pin|pin@3||1.5|7.5|||||ART_message(D5G2;)S3-terminal high-threshold NMOS device
1135 Awire|net@0|||0|conn@1|a|4.5|0|pin@1||0|0
1136 Awire|net@1|||0|nmos4p@0|g|-3|-8|conn@2|y|-14.5|-8
1137 Awire|net@2|||900|nmos4p@0|s|0|-10|pin@0||0|-16.5
1138 Awire|net@3|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
1139 Awire|net@4|||900|pin@1||0|0|nmos4p@0|d|0|-6
1140 Awire|net@5|||1800|nmos4p@0|b|0|-9|gnd@0||5|-9
1141 Ed||D5G2;|conn@1|y|B
1142 Eg||D5G2;|conn@2|a|I
1143 Es||D5G2;|conn@0|y|B
1144 X
1145
1146 # Cell NMOSf_io18;1{ic}
1147 CNMOSf_io18;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.25;Y-0.25;)S4|ATTR_W(D6FLeave alone;G1;HNOLPX1.75;Y0.75;)S3|prototype_center()I[0,0]
1148 Ngeneric:Facet-Center|art@0||0|0||||AV
1149 Ngeneric:Invisible-Pin|pin@5||0|-2||||
1150 NPin|pin@6||-2|0|1|1|RR|
1151 NPin|pin@7||-3.5|0|||RR|
1152 Nschematic:Bus_Pin|pin@8||-3.5|0|-2|-2||
1153 Nschematic:Bus_Pin|pin@9||0|2|-2|-2||
1154 NPin|pin@10||0|-2||||
1155 NPin|pin@11||-2|1|1|1||
1156 NPin|pin@12||-2|-1|1|1||
1157 NPin|pin@13||0|-1||||
1158 NPin|pin@14||-0.75|-1|1|1||
1159 NPin|pin@15||-0.75|1|1|1||
1160 NPin|pin@16||0|1||||
1161 NPin|pin@17||0|2||||
1162 Ngeneric:Invisible-Pin|pin@18||-2.25|1.75|||||ART_message(D5G1;)S1.8V
1163 AThicker|net@3|||FS900|pin@15||-0.75|1|pin@14||-0.75|-1|ART_color()I74
1164 AThicker|net@4|||FS1800|pin@7||-3.5|0|pin@6||-2|0|ART_color()I74
1165 AThicker|net@5|||FS900|pin@11||-2|1|pin@12||-2|-1|ART_color()I74
1166 AThicker|net@6|||FS900|pin@13||0|-1|pin@10||0|-2|ART_color()I74
1167 AThicker|net@7|||FS1800|pin@14||-0.75|-1|pin@13||0|-1|ART_color()I74
1168 AThicker|net@8|||FS0|pin@16||0|1|pin@15||-0.75|1|ART_color()I74
1169 AThicker|net@9|||FS900|pin@17||0|2|pin@16||0|1|ART_color()I74
1170 Ed||D5G1;|pin@9||B
1171 Eg||D5G1;|pin@8||I
1172 Es||D5G1;|pin@5||B
1173 X
1174
1175 # Cell NMOSf_io18;1{sch}
1176 CNMOSf_io18;1{sch}||schematic|1021415734000|1159313203077||ATTR_Delay(D5G1;HNPX-18.25;Y-12.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-18;Y-11.5;)S4|ATTR_W(D5FLeave alone;G1;HNOLPX-18;Y-10.5;)S3|ATTR_CDL_template(D5G1;NTY-26;)SM$(node_name) $(d) $(g) $(s) gnd nch_18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-1.5;Y-23.75;)StransistorType OD18-N-Transistor|ATTR_SPICE_template(D5G1;NTX-3;Y-19.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_18 W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX0.5;Y-28;)SM$(node_name) $(d) $(g) $(s) gnd nch_18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-17.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_18 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-21.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1177 INMOSf_io18;1{ic}|NMOSf_io@1||18.5|1|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.25;Y-0.25;)S4|ATTR_W(D6FLeave alone;G1;NOLPX1.75;Y0.75;)S3
1178 Ngeneric:Facet-Center|art@0||0|0||||AV
1179 NOff-Page|conn@1||4.5|-12.5||||
1180 NOff-Page|conn@2||4.5|0||||
1181 NOff-Page|conn@3||-18.5|-6.5||||
1182 NGround|gnd@0||7|-7.5|||R|
1183 N4-Port-Transistor|nmos4p@0||-2|-6.5|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-4;)Snch_18
1184 Ngeneric:Invisible-Pin|pin@0||-2|13.5|||||ART_message(D5G2;)S3-terminal NMOS device for 1.8V I/O pads
1185 NWire_Pin|pin@1||0|-12.5||||
1186 NWire_Pin|pin@2||0|0||||
1187 Ngeneric:Invisible-Pin|pin@3||-1.5|19|||||ART_message(D5G6;)SNMOSf_io18
1188 Ngeneric:Invisible-Pin|pin@4||-2|8.5|||||ART_message(D5G2;)Sminimum length for 1.8V thick-oxide devices is 4
1189 Awire|net@0|||0|nmos4p@0|g|-3|-6.5|conn@3|y|-16.5|-6.5
1190 Awire|net@2|||900|nmos4p@0|s|0|-8.5|pin@1||0|-12.5
1191 Awire|net@3|||1800|pin@1||0|-12.5|conn@1|a|2.5|-12.5
1192 Awire|net@4|||1800|pin@2||0|0|conn@2|a|2.5|0
1193 Awire|net@5|||900|pin@2||0|0|nmos4p@0|d|0|-4.5
1194 Awire|net@6|||0|gnd@0||5|-7.5|nmos4p@0|b|0|-7.5
1195 Ed||D5G2;|conn@2|y|B
1196 Eg||D5G2;|conn@3|a|I
1197 Es||D5G2;|conn@1|y|B
1198 X
1199
1200 # Cell NMOSf_io25;1{ic}
1201 CNMOSf_io25;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HPT)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S5.6|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,-8000]
1202 Ngeneric:Facet-Center|art@0||0|0||||AV
1203 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1204 NPin|pin@1||-2|0|1|1|RR|
1205 NPin|pin@2||-3.5|0|||RR|
1206 Nschematic:Bus_Pin|pin@3||-3.5|0|-2|-2||
1207 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1208 NPin|pin@5||0|-2||||
1209 NPin|pin@6||-2|1|1|1||
1210 NPin|pin@7||-2|-1|1|1||
1211 NPin|pin@8||0|-1||||
1212 NPin|pin@9||-0.75|-1|1|1||
1213 NPin|pin@10||-0.75|1|1|1||
1214 NPin|pin@11||0|1||||
1215 NPin|pin@12||0|2||||
1216 Ngeneric:Invisible-Pin|pin@13||-2.5|1.5|||||ART_message(D5G1;)S2.5V
1217 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I74
1218 AThicker|net@1|||FS1800|pin@2||-3.5|0|pin@1||-2|0|ART_color()I74
1219 AThicker|net@2|||FS900|pin@6||-2|1|pin@7||-2|-1|ART_color()I74
1220 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I74
1221 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I74
1222 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I74
1223 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I74
1224 Ed||D5G1;|pin@4||B
1225 Eg||D5G1;|pin@3||I
1226 Es||D5G1;|pin@0||B
1227 X
1228
1229 # Cell NMOSf_io25;1{sch}
1230 CNMOSf_io25;1{sch}||schematic|1021415734000|1159313179436||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S5.6|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S3|ATTR_CDL_template(D5G1;NTX0.5;Y-31;)SM$(node_name) $(d) $(g) $(s) gnd nch_25 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX0.5;Y-29;)StransistorType  OD25-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_25 W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX1;Y-33;)SM$(node_name) $(d) $(g) $(s) gnd nch_25 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2.5;Y-22;)SM$(node_name) $(d) $(g) $(s) gnd nch_25 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1231 INMOSf_io25;1{ic}|NMOSf_25@1||28|0.5|||D0G4;|ATTR_Delay(P)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S5.6|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
1232 Ngeneric:Facet-Center|art@0||0|0||||AV
1233 NOff-Page|conn@0||6|-16.5||||
1234 NOff-Page|conn@1||6.5|0||||
1235 NOff-Page|conn@2||-16.5|-8||||
1236 NGround|gnd@0||5|-11||||
1237 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1;Y-4;)Snch_25
1238 NWire_Pin|pin@0||0|-16.5||||
1239 NWire_Pin|pin@1||0|0||||
1240 Ngeneric:Invisible-Pin|pin@2||1.5|21|||||ART_message(D5G6;)SNMOSf_25
1241 Ngeneric:Invisible-Pin|pin@4||0|13.5|||||ART_message(D5G2;)S3-terminal NMOS device for 2.5V I/O pads
1242 Ngeneric:Invisible-Pin|pin@5||0|8.5|||||ART_message(D5G2;)Sminimum length for 2.5V thick-oxide devices is 5.6
1243 Awire|net@0|||0|conn@1|a|4.5|0|pin@1||0|0
1244 Awire|net@1|||0|nmos4p@0|g|-3|-8|conn@2|y|-14.5|-8
1245 Awire|net@2|||900|nmos4p@0|s|0|-10|pin@0||0|-16.5
1246 Awire|net@3|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
1247 Awire|net@4|||900|pin@1||0|0|nmos4p@0|d|0|-6
1248 Awire|net@5|||1800|nmos4p@0|b|0|-9|gnd@0||5|-9
1249 Ed||D5G2;|conn@1|y|B
1250 Eg||D5G2;|conn@2|a|I
1251 Es||D5G2;|conn@0|y|B
1252 X
1253
1254 # Cell NMOSf_io33;1{ic}
1255 CNMOSf_io33;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HPT)I100|ATTR_L(D5G1;HNOLPX3.5;)S7.6|ATTR_W(D6G1;HNOLPX2;Y1;)S3|prototype_center()I[0,-8000]
1256 Ngeneric:Facet-Center|art@0||0|0||||AV
1257 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1258 NPin|pin@1||-2|0|1|1|RR|
1259 NPin|pin@2||-3.5|0|||RR|
1260 Nschematic:Bus_Pin|pin@3||-3.5|0|-2|-2||
1261 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1262 NPin|pin@5||0|-2||||
1263 NPin|pin@6||-2|1|1|1||
1264 NPin|pin@7||-2|-1|1|1||
1265 NPin|pin@8||0|-1||||
1266 NPin|pin@9||-0.75|-1|1|1||
1267 NPin|pin@10||-0.75|1|1|1||
1268 NPin|pin@11||0|1||||
1269 NPin|pin@12||0|2||||
1270 Ngeneric:Invisible-Pin|pin@13||-2.5|1.5|||||ART_message(D5G1;)S3.3V
1271 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I74
1272 AThicker|net@1|||FS1800|pin@2||-3.5|0|pin@1||-2|0|ART_color()I74
1273 AThicker|net@2|||FS900|pin@6||-2|1|pin@7||-2|-1|ART_color()I74
1274 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I74
1275 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I74
1276 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I74
1277 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I74
1278 Ed||D5G1;|pin@4||B
1279 Eg||D5G1;|pin@3||I
1280 Es||D5G1;|pin@0||B
1281 X
1282
1283 # Cell NMOSf_io33;1{sch}
1284 CNMOSf_io33;1{sch}||schematic|1021415734000|1159313127323||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S7.6|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S3|ATTR_CDL_template(D5G1;NTX2;Y-31.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_33 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1.5;Y-29;)StransistorType  OD33-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_33 W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX2.5;Y-33.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_33 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2.5;Y-22;)SM$(node_name) $(d) $(g) $(s) gnd nch_33 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-26.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1285 INMOSf_io33;1{ic}|NMOSf_33@1||28|0.5|||D0G4;|ATTR_Delay(P)I100|ATTR_L(D5G1;NOLPX3.5;)S7.6|ATTR_W(D6G1;NOLPX2;Y1;)S3
1286 Ngeneric:Facet-Center|art@0||0|0||||AV
1287 NOff-Page|conn@0||6|-16.5||||
1288 NOff-Page|conn@1||6.5|0||||
1289 NOff-Page|conn@2||-16.5|-8||||
1290 NGround|gnd@0||5|-11||||
1291 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;NOLX-1.5;Y2;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;NOLX2.5;Y-6;)S"P(\"W\")"|SIM_spice_model(D5G1;X0.5;Y-3;)Snch_33
1292 NWire_Pin|pin@0||0|-16.5||||
1293 NWire_Pin|pin@1||0|0||||
1294 Ngeneric:Invisible-Pin|pin@2||-0.5|20|||||ART_message(D5G6;)SNMOSf_33
1295 Ngeneric:Invisible-Pin|pin@4||-1|12.5|||||ART_message(D5G2;)S3-terminal NMOS device for 3.3V I/O pads
1296 Ngeneric:Invisible-Pin|pin@5||-1|7.5|||||ART_message(D5G2;)Sminimum length for 3.3V thick-oxide devices is 7.6
1297 Awire|net@0|||0|conn@1|a|4.5|0|pin@1||0|0
1298 Awire|net@1|||0|nmos4p@0|g|-3|-8|conn@2|y|-14.5|-8
1299 Awire|net@2|||900|nmos4p@0|s|0|-10|pin@0||0|-16.5
1300 Awire|net@3|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
1301 Awire|net@4|||900|pin@1||0|0|nmos4p@0|d|0|-6
1302 Awire|net@5|||1800|nmos4p@0|b|0|-9|gnd@0||5|-9
1303 Ed||D5G2;|conn@1|y|B
1304 Eg||D5G2;|conn@2|a|I
1305 Es||D5G2;|conn@0|y|B
1306 X
1307
1308 # Cell NMOSf_low;1{ic}
1309 CNMOSf_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,-8000]
1310 Ngeneric:Facet-Center|art@0||0|0||||AV
1311 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1312 NPin|pin@1||-1|0|1|1|RR|
1313 NPin|pin@2||-2.5|0|||RR|
1314 Nschematic:Bus_Pin|pin@3||-2.5|0|-2|-2||
1315 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1316 NPin|pin@5||0|-2||||
1317 NPin|pin@6||-1|1|1|1||
1318 NPin|pin@7||-1|-1|1|1||
1319 NPin|pin@8||0|-1||||
1320 NPin|pin@9||-0.75|-1|1|1||
1321 NPin|pin@10||-0.75|1|1|1||
1322 NPin|pin@11||0|1||||
1323 NPin|pin@12||0|2||||
1324 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I74
1325 AThicker|net@1|||FS1800|pin@2||-2.5|0|pin@1||-1|0|ART_color()I74
1326 AThicker|net@2|||FS900|pin@6||-1|1|pin@7||-1|-1|ART_color()I74
1327 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I74
1328 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I74
1329 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I74
1330 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I74
1331 Ed||D5G1;|pin@4||B
1332 Eg||D5G1;|pin@3||I
1333 Es||D5G1;|pin@0||B
1334 X
1335
1336 # Cell NMOSf_low;1{sch}
1337 CNMOSf_low;1{sch}||schematic|1021415734000|1159313266395||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S3|ATTR_CDL_template(D5G1;NTX1.5;Y-30.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX2;Y-28.5;)StransistorType VTL-N-Transistor|ATTR_SPICE_template(D5G1;NTX2;Y-24.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_lvt W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX2;Y-32.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2.5;Y-22;)SM$(node_name) $(d) $(g) $(s) gnd nch_lvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1338 INMOSf_low;1{ic}|NMOSf@0||28|0.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
1339 Ngeneric:Facet-Center|art@0||0|0||||AV
1340 NOff-Page|conn@0||6|-16.5||||
1341 NOff-Page|conn@1||6.5|0||||
1342 NOff-Page|conn@2||-16.5|-8||||
1343 NGround|gnd@0||5|-11||||
1344 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Snch_lvt
1345 NWire_Pin|pin@0||0|-16.5||||
1346 NWire_Pin|pin@1||0|0||||
1347 Ngeneric:Invisible-Pin|pin@2||1.5|14|||||ART_message(D5G6;)SNMOSf_low
1348 Ngeneric:Invisible-Pin|pin@3||1.5|7.5|||||ART_message(D5G2;)S3-terminal low threshold NMOS device
1349 Awire|net@0|||0|conn@1|a|4.5|0|pin@1||0|0
1350 Awire|net@1|||0|nmos4p@0|g|-3|-8|conn@2|y|-14.5|-8
1351 Awire|net@2|||900|nmos4p@0|s|0|-10|pin@0||0|-16.5
1352 Awire|net@3|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
1353 Awire|net@4|||900|pin@1||0|0|nmos4p@0|d|0|-6
1354 Awire|net@5|||1800|nmos4p@0|b|0|-9|gnd@0||5|-9
1355 Ed||D5G2;|conn@1|y|B
1356 Eg||D5G2;|conn@2|a|I
1357 Es||D5G2;|conn@0|y|B
1358 X
1359
1360 # Cell NMOSf_native;1{ic}
1361 CNMOSf_native;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S4|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S10|prototype_center()I[0,-8000]
1362 Ngeneric:Facet-Center|art@0||0|0||||AV
1363 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1364 NPin|pin@1||-0.75|0|1|1|RR|
1365 NPin|pin@2||-2.5|0|||RR|
1366 Nschematic:Bus_Pin|pin@3||-2.5|0|-2|-2||
1367 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1368 NPin|pin@5||0|-2||||
1369 NPin|pin@8||0|-1||||
1370 NPin|pin@9||-0.75|-1|1|1||
1371 NPin|pin@10||-0.75|1|1|1||
1372 NPin|pin@11||0|1||||
1373 NPin|pin@12||0|2||||
1374 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I74
1375 AThicker|net@1|||FS1800|pin@2||-2.5|0|pin@1||-0.75|0|ART_color()I74
1376 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I74
1377 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I74
1378 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I74
1379 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I74
1380 Ed||D5G1;|pin@4||B
1381 Eg||D5G1;|pin@3||I
1382 Es||D5G1;|pin@0||B
1383 X
1384
1385 # Cell NMOSf_native;1{sch}
1386 CNMOSf_native;1{sch}||schematic|1021415734000|1158099348261||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S4|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S10|ATTR_CDL_template(D5G1;NTX-1;Y-31;)SM$(node_name) $(d) $(g) $(s) gnd nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-0.5;Y-28.5;)StransistorType  NT-N-Transistor|ATTR_SPICE_template(D5G1;NTY-24.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-1.5;Y-33.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2.5;Y-22;)SM$(node_name) $(d) $(g) $(s) gnd nch_na W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1387 INMOSf_native;1{ic}|NMOSf@0||27|7.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S4|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S10
1388 Ngeneric:Facet-Center|art@0||0|0||||AV
1389 NOff-Page|conn@0||6|-16.5||||
1390 NOff-Page|conn@1||6.5|0||||
1391 NOff-Page|conn@2||-16.5|-8||||
1392 NGround|gnd@0||5|-11||||
1393 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X2;Y-4;)Snch_na
1394 NWire_Pin|pin@0||0|-16.5||||
1395 NWire_Pin|pin@1||0|0||||
1396 Ngeneric:Invisible-Pin|pin@2||-3.5|20|||||ART_message(D5G6;)SNMOSf_native
1397 Ngeneric:Invisible-Pin|pin@3||-3.5|13|||||ART_message(D5G2;)S3-terminal native NMOS device
1398 Ngeneric:Invisible-Pin|pin@4||-3.5|8|||||ART_message(D5G2;)S[note that the minimum allowed native,"device dimensions are W=10, L=4"]
1399 Awire|net@0|||0|conn@1|a|4.5|0|pin@1||0|0
1400 Awire|net@1|||0|nmos4p@0|g|-3|-8|conn@2|y|-14.5|-8
1401 Awire|net@2|||900|nmos4p@0|s|0|-10|pin@0||0|-16.5
1402 Awire|net@3|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
1403 Awire|net@4|||900|pin@1||0|0|nmos4p@0|d|0|-6
1404 Awire|net@5|||1800|nmos4p@0|b|0|-9|gnd@0||5|-9
1405 Ed||D5G2;|conn@1|y|B
1406 Eg||D5G2;|conn@2|a|I
1407 Es||D5G2;|conn@0|y|B
1408 X
1409
1410 # Cell NMOSf_native_od18;1{ic}
1411 CNMOSf_native_od18;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S24|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S10|prototype_center()I[0,-8000]
1412 Ngeneric:Facet-Center|art@0||0|0||||AV
1413 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1414 NPin|pin@1||-1.75|0|1|1|RR|
1415 NPin|pin@2||-3|0|||RR|
1416 Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
1417 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1418 NPin|pin@5||0|-2||||
1419 NPin|pin@8||0|-1||||
1420 NPin|pin@9||-1.75|-1|1|1||
1421 NPin|pin@10||-1.75|1|1|1||
1422 NPin|pin@11||0|1||||
1423 NPin|pin@12||0|2||||
1424 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S1.8V
1425 AThicker|net@0|||FS2700|pin@9||-1.75|-1|pin@10||-1.75|1|ART_color()I74
1426 AThicker|net@1|||FS0|pin@1||-1.75|0|pin@2||-3|0|ART_color()I74
1427 AThicker|net@3|||FS2700|pin@5||0|-2|pin@8||0|-1|ART_color()I74
1428 AThicker|net@4|||FS0|pin@8||0|-1|pin@9||-1.75|-1|ART_color()I74
1429 AThicker|net@5|||FS1800|pin@10||-1.75|1|pin@11||0|1|ART_color()I74
1430 AThicker|net@6|||FS2700|pin@11||0|1|pin@12||0|2|ART_color()I74
1431 Ed||D5G1;|pin@4||B
1432 Eg||D5G1;|pin@3||I
1433 Es||D5G1;|pin@0||B
1434 X
1435
1436 # Cell NMOSf_native_od18;1{sch}
1437 CNMOSf_native_od18;1{sch}||schematic|1021415734000|1158082635019||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S24|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S10|ATTR_CDL_template(D5G1;NTX2.5;Y-31.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX2;Y-29;)StransistorType  NT-OD18-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na18 W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX2;Y-34;)SM$(node_name) $(d) $(g) $(s) gnd nch_na18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2.5;Y-22;)SM$(node_name) $(d) $(g) $(s) gnd nch_na18 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX3;Y-26.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1438 INMOSf_native_od18;1{ic}|NMOSf@0||27|7.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S24|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S10
1439 Ngeneric:Facet-Center|art@0||0|0||||AV
1440 NOff-Page|conn@0||6|-16.5||||
1441 NOff-Page|conn@1||6.5|0||||
1442 NOff-Page|conn@2||-16.5|-8||||
1443 NGround|gnd@0||5|-11||||
1444 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-4;)Snch_na18
1445 NWire_Pin|pin@0||0|-16.5||||
1446 NWire_Pin|pin@1||0|0||||
1447 Ngeneric:Invisible-Pin|pin@2||-3.5|20|||||ART_message(D5G6;)SNMOSf_native_od18
1448 Ngeneric:Invisible-Pin|pin@3||-3.5|13|||||ART_message(D5G2;)S3-terminal 1.8V native NMOS device
1449 Ngeneric:Invisible-Pin|pin@4||-3.5|8|||||ART_message(D5G2;)S[note that the minimum allowed native,"device dimensions are W=10, L=24"]
1450 Awire|net@0|||1800|pin@1||0|0|conn@1|a|4.5|0
1451 Awire|net@1|||1800|conn@2|y|-14.5|-8|nmos4p@0|g|-3|-8
1452 Awire|net@2|||2700|pin@0||0|-16.5|nmos4p@0|s|0|-10
1453 Awire|net@3|||0|conn@0|a|4|-16.5|pin@0||0|-16.5
1454 Awire|net@4|||2700|nmos4p@0|d|0|-6|pin@1||0|0
1455 Awire|net@5|||0|gnd@0||5|-9|nmos4p@0|b|0|-9
1456 Ed||D5G2;|conn@1|y|B
1457 Eg||D5G2;|conn@2|a|I
1458 Es||D5G2;|conn@0|y|B
1459 X
1460
1461 # Cell NMOSf_native_od25;1{ic}
1462 CNMOSf_native_od25;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5G1;HNOLPX3.5;)S24|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S10|prototype_center()I[0,-8000]
1463 Ngeneric:Facet-Center|art@0||0|0||||AV
1464 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1465 NPin|pin@1||-1.75|0|1|1|RR|
1466 NPin|pin@2||-3|0|||RR|
1467 Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
1468 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1469 NPin|pin@5||0|-2||||
1470 NPin|pin@8||0|-1||||
1471 NPin|pin@9||-1.75|-1|1|1||
1472 NPin|pin@10||-1.75|1|1|1||
1473 NPin|pin@11||0|1||||
1474 NPin|pin@12||0|2||||
1475 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S2.5V
1476 AThicker|net@0|||FS900|pin@10||-1.75|1|pin@9||-1.75|-1|ART_color()I74
1477 AThicker|net@1|||FS1800|pin@2||-3|0|pin@1||-1.75|0|ART_color()I74
1478 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I74
1479 AThicker|net@4|||FS1800|pin@9||-1.75|-1|pin@8||0|-1|ART_color()I74
1480 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-1.75|1|ART_color()I74
1481 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I74
1482 Ed||D5G1;|pin@4||B
1483 Eg||D5G1;|pin@3||I
1484 Es||D5G1;|pin@0||B
1485 X
1486
1487 # Cell NMOSf_native_od25;1{sch}
1488 CNMOSf_native_od25;1{sch}||schematic|1021415734000|1158082583609||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5G1;HNOLPX-9;Y-13.5;)S24|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S10|ATTR_CDL_template(D5G1;NTX4;Y-31.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na25 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX2.5;Y-29;)StransistorType  NT-OD25-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na25 W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX3.5;Y-34;)SM$(node_name) $(d) $(g) $(s) gnd nch_na25 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2.5;Y-22;)SM$(node_name) $(d) $(g) $(s) gnd nch_na25 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1.5;Y-26.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1489 INMOSf_native_od25;1{ic}|NMOSf@0||27|7.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NOLPX3.5;)S24|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S10
1490 Ngeneric:Facet-Center|art@0||0|0||||AV
1491 NOff-Page|conn@0||6|-16.5||||
1492 NOff-Page|conn@1||6.5|0||||
1493 NOff-Page|conn@2||-16.5|-8||||
1494 NGround|gnd@0||5|-11||||
1495 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-4;)Snch_na25
1496 NWire_Pin|pin@0||0|-16.5||||
1497 NWire_Pin|pin@1||0|0||||
1498 Ngeneric:Invisible-Pin|pin@2||-3.5|20|||||ART_message(D5G6;)SNMOSf_native_od25
1499 Ngeneric:Invisible-Pin|pin@3||-3.5|13|||||ART_message(D5G2;)S3-terminal 2.5V native NMOS device
1500 Ngeneric:Invisible-Pin|pin@4||-3.5|8|||||ART_message(D5G2;)S[note that the minimum allowed native,"device dimensions are W=10, L=24"]
1501 Awire|net@0|||0|conn@1|a|4.5|0|pin@1||0|0
1502 Awire|net@1|||0|nmos4p@0|g|-3|-8|conn@2|y|-14.5|-8
1503 Awire|net@2|||900|nmos4p@0|s|0|-10|pin@0||0|-16.5
1504 Awire|net@3|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
1505 Awire|net@4|||900|pin@1||0|0|nmos4p@0|d|0|-6
1506 Awire|net@5|||1800|nmos4p@0|b|0|-9|gnd@0||5|-9
1507 Ed||D5G2;|conn@1|y|B
1508 Eg||D5G2;|conn@2|a|I
1509 Es||D5G2;|conn@0|y|B
1510 X
1511
1512 # Cell NMOSf_native_od33;1{ic}
1513 CNMOSf_native_od33;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5G1;HNOLPX3.5;)S24|ATTR_W(D6G1;HNOLPX2;Y1;)S10|prototype_center()I[0,-8000]
1514 Ngeneric:Facet-Center|art@0||0|0||||AV
1515 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1516 NPin|pin@1||-1.75|0|1|1|RR|
1517 NPin|pin@2||-3|0|||RR|
1518 Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
1519 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1520 NPin|pin@5||0|-2||||
1521 NPin|pin@8||0|-1||||
1522 NPin|pin@9||-1.75|-1|1|1||
1523 NPin|pin@10||-1.75|1|1|1||
1524 NPin|pin@11||0|1||||
1525 NPin|pin@12||0|2||||
1526 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S3.3V
1527 AThicker|net@0|||FS2700|pin@9||-1.75|-1|pin@10||-1.75|1|ART_color()I74
1528 AThicker|net@1|||FS0|pin@1||-1.75|0|pin@2||-3|0|ART_color()I74
1529 AThicker|net@3|||FS2700|pin@5||0|-2|pin@8||0|-1|ART_color()I74
1530 AThicker|net@4|||FS0|pin@8||0|-1|pin@9||-1.75|-1|ART_color()I74
1531 AThicker|net@5|||FS1800|pin@10||-1.75|1|pin@11||0|1|ART_color()I74
1532 AThicker|net@6|||FS2700|pin@11||0|1|pin@12||0|2|ART_color()I74
1533 Ed||D5G1;|pin@4||B
1534 Eg||D5G1;|pin@3||I
1535 Es||D5G1;|pin@0||B
1536 X
1537
1538 # Cell NMOSf_native_od33;1{sch}
1539 CNMOSf_native_od33;1{sch}||schematic|1021415734000|1158082542097||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5G1;HNOLPX-9;Y-13.5;)S24|ATTR_W(D5G1;HNOLPX-8.5;Y-12.5;)S10|ATTR_CDL_template(D5G1;NTX3;Y-31;)SM$(node_name) $(d) $(g) $(s) gnd nch_na33 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-28.5;)StransistorType  NT-OD33-N-Transistor|ATTR_SPICE_template(D5G1;NTX2;Y-24.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na33 W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX2.5;Y-33.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na33 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2.5;Y-22;)SM$(node_name) $(d) $(g) $(s) gnd nch_na33 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1.5;Y-26.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1540 INMOSf_native_od33;1{ic}|NMOSf@0||27|7.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NOLPX3.5;)S24|ATTR_W(D6G1;NOLPX2;Y1;)S10
1541 Ngeneric:Facet-Center|art@0||0|0||||AV
1542 NOff-Page|conn@0||6|-16.5||||
1543 NOff-Page|conn@1||6.5|0||||
1544 NOff-Page|conn@2||-16.5|-8||||
1545 NGround|gnd@0||5|-11||||
1546 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-4.5;)Snch_na33
1547 NWire_Pin|pin@0||0|-16.5||||
1548 NWire_Pin|pin@1||0|0||||
1549 Ngeneric:Invisible-Pin|pin@2||-3.5|20|||||ART_message(D5G6;)SNMOSf_native_od33
1550 Ngeneric:Invisible-Pin|pin@3||-3.5|13|||||ART_message(D5G2;)S3-terminal 3.3V native NMOS device
1551 Ngeneric:Invisible-Pin|pin@4||-3.5|8|||||ART_message(D5G2;)S[note that the minimum allowed native,"device dimensions are W=10, L=24"]
1552 Awire|net@0|||1800|pin@1||0|0|conn@1|a|4.5|0
1553 Awire|net@1|||1800|conn@2|y|-14.5|-8|nmos4p@0|g|-3|-8
1554 Awire|net@2|||2700|pin@0||0|-16.5|nmos4p@0|s|0|-10
1555 Awire|net@3|||0|conn@0|a|4|-16.5|pin@0||0|-16.5
1556 Awire|net@4|||2700|nmos4p@0|d|0|-6|pin@1||0|0
1557 Awire|net@5|||0|gnd@0||5|-9|nmos4p@0|b|0|-9
1558 Ed||D5G2;|conn@1|y|B
1559 Eg||D5G2;|conn@2|a|I
1560 Es||D5G2;|conn@0|y|B
1561 X
1562
1563 # Cell NMOSfwk;1{ic}
1564 CNMOSfwk;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,-8000]
1565 Ngeneric:Facet-Center|art@0||0|0||||AV
1566 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
1567 Ngeneric:Invisible-Pin|pin@1||0|-2||||
1568 NPin|pin@2||-1.25|0|1|1|RR|
1569 NPin|pin@3||-3|0|||RR|
1570 Nschematic:Bus_Pin|pin@4||-3|0|-2|-2||
1571 Nschematic:Bus_Pin|pin@5||0|2|-2|-2||
1572 NPin|pin@6||0|-2||||
1573 NPin|pin@7||-1.25|0.75|1|1||
1574 NPin|pin@8||-1.25|-0.75|1|1||
1575 NPin|pin@9||0|-0.75||||
1576 NPin|pin@10||-0.75|-0.75|1|1||
1577 NPin|pin@11||-0.75|0.75|1|1||
1578 NPin|pin@12||0|0.75||||
1579 NPin|pin@13||0|2||||
1580 AThicker|net@0|||FS900|pin@11||-0.75|0.75|pin@10||-0.75|-0.75|ART_color()I74
1581 AThicker|net@1|||FS1800|pin@3||-3|0|pin@2||-1.25|0|ART_color()I74
1582 AThicker|net@2|||FS900|pin@7||-1.25|0.75|pin@8||-1.25|-0.75|ART_color()I74
1583 AThicker|net@3|||FS900|pin@9||0|-0.75|pin@6||0|-2|ART_color()I74
1584 AThicker|net@4|||FS1800|pin@10||-0.75|-0.75|pin@9||0|-0.75|ART_color()I74
1585 AThicker|net@5|||FS0|pin@12||0|0.75|pin@11||-0.75|0.75|ART_color()I74
1586 AThicker|net@6|||FS900|pin@13||0|2|pin@12||0|0.75|ART_color()I74
1587 Ed||D5G1;|pin@5||B
1588 Eg||D5G1;|pin@4||I
1589 Es||D5G1;|pin@1||B
1590 X
1591
1592 # Cell NMOSfwk;1{sch}
1593 CNMOSfwk;1{sch}||schematic|1021415734000|1159313356852||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S3|ATTR_CDL_template(D5G1;NTX-1;Y-29;)SM$(node_name) $(d) $(g) $(s) gnd nch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template(D5G1;NTX4;Y-24;)SM$(node_name) $(d) $(g) $(s) gnd nch W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)'  DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-0.5;Y-31;)SM$(node_name) $(d) $(g) $(s) gnd nch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTY-21.5;)SM$(node_name) $(d) $(g) $(s) gnd nch W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Srtranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1594 INMOSfwk;1{ic}|NMOSfwk@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3|ATTR_GEO(T)I0|ATTR_M(T)I1
1595 Ngeneric:Facet-Center|art@0||0|0||||AV
1596 NOff-Page|conn@0||6|-16.5||||
1597 NOff-Page|conn@1||4.5|0||||
1598 NOff-Page|conn@2||-10|-8||||
1599 NGround|gnd@0||5|-11||||
1600 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-2.5;)Snch
1601 NWire_Pin|pin@0||0|-16.5||||
1602 NWire_Pin|pin@1||0|0||||
1603 Ngeneric:Invisible-Pin|pin@2||0|13.5|||||ART_message(D5G6;)S[NMOSfwk]
1604 Ngeneric:Invisible-Pin|pin@3||2|7|||||ART_message(D5G2;)S3-terminal standard threshold weak NMOS device
1605 Awire|net@0|||900|nmos4p@0|s|0|-10|pin@0||0|-16.5
1606 Awire|net@1|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
1607 Awire|net@2|||1800|pin@1||0|0|conn@1|a|2.5|0
1608 Awire|net@3|||1800|conn@2|y|-8|-8|nmos4p@0|g|-3|-8
1609 Awire|net@4|||900|pin@1||0|0|nmos4p@0|d|0|-6
1610 Awire|net@5|||1800|nmos4p@0|b|0|-9|gnd@0||5|-9
1611 Ed||D5G2;|conn@1|y|B
1612 Eg||D5G2;|conn@2|a|I
1613 Es||D5G2;|conn@0|y|B
1614 X
1615
1616 # Cell NMOSfwk_high;1{ic}
1617 CNMOSfwk_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5G1;HNOLPX3.5;)S2|ATTR_W(D6G1;HNOLPX2;Y1;)S3|prototype_center()I[0,-8000]
1618 Ngeneric:Facet-Center|art@0||0|0||||AV
1619 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
1620 Ngeneric:Invisible-Pin|pin@1||0|-2||||
1621 NPin|pin@2||-1.75|0|1|1|RR|
1622 NPin|pin@3||-3|0|||RR|
1623 Nschematic:Bus_Pin|pin@4||-3|0|-2|-2||
1624 Nschematic:Bus_Pin|pin@5||0|2|-2|-2||
1625 NPin|pin@6||0|-2||||
1626 NPin|pin@7||-1.75|0.75|1|1||
1627 NPin|pin@8||-1.75|-0.75|1|1||
1628 NPin|pin@9||0|-0.75||||
1629 NPin|pin@10||-0.75|-0.75|1|1||
1630 NPin|pin@11||-0.75|0.75|1|1||
1631 NPin|pin@12||0|0.75||||
1632 NPin|pin@13||0|2||||
1633 AThicker|net@0|||FS900|pin@11||-0.75|0.75|pin@10||-0.75|-0.75|ART_color()I74
1634 AThicker|net@1|||FS1800|pin@3||-3|0|pin@2||-1.75|0|ART_color()I74
1635 AThicker|net@2|||FS900|pin@7||-1.75|0.75|pin@8||-1.75|-0.75|ART_color()I74
1636 AThicker|net@3|||FS900|pin@9||0|-0.75|pin@6||0|-2|ART_color()I74
1637 AThicker|net@4|||FS1800|pin@10||-0.75|-0.75|pin@9||0|-0.75|ART_color()I74
1638 AThicker|net@5|||FS0|pin@12||0|0.75|pin@11||-0.75|0.75|ART_color()I74
1639 AThicker|net@6|||FS900|pin@13||0|2|pin@12||0|0.75|ART_color()I74
1640 Ed||D5G1;|pin@5||B
1641 Eg||D5G1;|pin@4||I
1642 Es||D5G1;|pin@1||B
1643 X
1644
1645 # Cell NMOSfwk_high;1{sch}
1646 CNMOSfwk_high;1{sch}||schematic|1021415734000|1159313313027||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5G1;HNOLPX-9;Y-13.5;)S2|ATTR_W(D5G1;HNOLPX-8.5;Y-12.5;)S3|ATTR_CDL_template(D5G1;NTY-31;)SM$(node_name) $(d) $(g) $(s) gnd nch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTY-28.75;)StransistorType VTH-N-Transistor|ATTR_SPICE_template(D5G1;NTX1.5;Y-24;)SM$(node_name) $(d) $(g) $(s) gnd nch_hvt W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)'  DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX0.5;Y-33;)SM$(node_name) $(d) $(g) $(s) gnd nch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTY-21.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_hvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Srtranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1647 INMOSfwk_high;1{ic}|NMOSfwk@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NOLPX3.5;)S2|ATTR_W(D6G1;NOLPX2;Y1;)S3|ATTR_GEO(T)I0|ATTR_M(T)I1
1648 Ngeneric:Facet-Center|art@0||0|0||||AV
1649 NOff-Page|conn@0||6|-16.5||||
1650 NOff-Page|conn@1||4.5|0||||
1651 NOff-Page|conn@2||-10|-8||||
1652 NGround|gnd@0||5|-11||||
1653 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1;Y-3.5;)Snch_hvt
1654 NWire_Pin|pin@0||0|-16.5||||
1655 NWire_Pin|pin@1||0|0||||
1656 Ngeneric:Invisible-Pin|pin@2||0|13.5|||||ART_message(D5G6;)SNMOSfwk_high
1657 Ngeneric:Invisible-Pin|pin@3||2|7|||||ART_message(D5G2;)S3-terminal high-threshold weak NMOS device
1658 Awire|net@0|||900|nmos4p@0|s|0|-10|pin@0||0|-16.5
1659 Awire|net@1|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
1660 Awire|net@2|||1800|pin@1||0|0|conn@1|a|2.5|0
1661 Awire|net@3|||1800|conn@2|y|-8|-8|nmos4p@0|g|-3|-8
1662 Awire|net@4|||900|pin@1||0|0|nmos4p@0|d|0|-6
1663 Awire|net@5|||1800|nmos4p@0|b|0|-9|gnd@0||5|-9
1664 Ed||D5G2;|conn@1|y|B
1665 Eg||D5G2;|conn@2|a|I
1666 Es||D5G2;|conn@0|y|B
1667 X
1668
1669 # Cell NMOSfwk_low;1{ic}
1670 CNMOSfwk_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,-8000]
1671 Ngeneric:Facet-Center|art@0||0|0||||AV
1672 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
1673 Ngeneric:Invisible-Pin|pin@1||0|-2||||
1674 NPin|pin@2||-1|0|1|1|RR|
1675 NPin|pin@3||-2.5|0|||RR|
1676 Nschematic:Bus_Pin|pin@4||-2.5|0|-2|-2||
1677 Nschematic:Bus_Pin|pin@5||0|2|-2|-2||
1678 NPin|pin@6||0|-2||||
1679 NPin|pin@7||-1|0.75|1|1||
1680 NPin|pin@8||-1|-0.75|1|1||
1681 NPin|pin@9||0|-0.75||||
1682 NPin|pin@10||-0.75|-0.75|1|1||
1683 NPin|pin@11||-0.75|0.75|1|1||
1684 NPin|pin@12||0|0.75||||
1685 NPin|pin@13||0|2||||
1686 AThicker|net@0|||FS900|pin@11||-0.75|0.75|pin@10||-0.75|-0.75|ART_color()I74
1687 AThicker|net@1|||FS1800|pin@3||-2.5|0|pin@2||-1|0|ART_color()I74
1688 AThicker|net@2|||FS900|pin@7||-1|0.75|pin@8||-1|-0.75|ART_color()I74
1689 AThicker|net@3|||FS900|pin@9||0|-0.75|pin@6||0|-2|ART_color()I74
1690 AThicker|net@4|||FS1800|pin@10||-0.75|-0.75|pin@9||0|-0.75|ART_color()I74
1691 AThicker|net@5|||FS0|pin@12||0|0.75|pin@11||-0.75|0.75|ART_color()I74
1692 AThicker|net@6|||FS900|pin@13||0|2|pin@12||0|0.75|ART_color()I74
1693 Ed||D5G1;|pin@5||B
1694 Eg||D5G1;|pin@4||I
1695 Es||D5G1;|pin@1||B
1696 X
1697
1698 # Cell NMOSfwk_low;1{sch}
1699 CNMOSfwk_low;1{sch}||schematic|1021415734000|1159313378128||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S3|ATTR_CDL_template(D5G1;NTY-31.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-29;)StransistorType VTL-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24;)SM$(node_name) $(d) $(g) $(s) gnd nch_lvt W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)'  DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX0.5;Y-33.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTY-21.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_lvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Srtranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1700 INMOSfwk_low;1{ic}|NMOSfwk@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3|ATTR_GEO(T)I0|ATTR_M(T)I1
1701 Ngeneric:Facet-Center|art@0||0|0||||AV
1702 NOff-Page|conn@0||6|-16.5||||
1703 NOff-Page|conn@1||4.5|0||||
1704 NOff-Page|conn@2||-10|-8||||
1705 NGround|gnd@0||5|-11||||
1706 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1;Y-3.5;)Snch_lvt
1707 NWire_Pin|pin@0||0|-16.5||||
1708 NWire_Pin|pin@1||0|0||||
1709 Ngeneric:Invisible-Pin|pin@2||0|13.5|||||ART_message(D5G6;)SNMOSfwk_low
1710 Ngeneric:Invisible-Pin|pin@3||2|7|||||ART_message(D5G2;)S3-terminal low-threshold weak NMOS device
1711 Awire|net@0|||900|nmos4p@0|s|0|-10|pin@0||0|-16.5
1712 Awire|net@1|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
1713 Awire|net@2|||1800|pin@1||0|0|conn@1|a|2.5|0
1714 Awire|net@3|||1800|conn@2|y|-8|-8|nmos4p@0|g|-3|-8
1715 Awire|net@4|||900|pin@1||0|0|nmos4p@0|d|0|-6
1716 Awire|net@5|||1800|nmos4p@0|b|0|-9|gnd@0||5|-9
1717 Ed||D5G2;|conn@1|y|B
1718 Eg||D5G2;|conn@2|a|I
1719 Es||D5G2;|conn@0|y|B
1720 X
1721
1722 # Cell NMOSfwk_native;1{ic}
1723 CNMOSfwk_native;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S4|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S10|prototype_center()I[0,-8000]
1724 Ngeneric:Facet-Center|art@0||0|0||||AV
1725 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
1726 Ngeneric:Invisible-Pin|pin@1||0|-2||||
1727 NPin|pin@2||-0.75|0|1|1|RR|
1728 NPin|pin@3||-2.5|0|||RR|
1729 Nschematic:Bus_Pin|pin@4||-2.5|0|-2|-2||
1730 Nschematic:Bus_Pin|pin@5||0|2|-2|-2||
1731 NPin|pin@6||0|-2||||
1732 NPin|pin@9||0|-0.75||||
1733 NPin|pin@10||-0.75|-0.75|1|1||
1734 NPin|pin@11||-0.75|0.75|1|1||
1735 NPin|pin@12||0|0.75||||
1736 NPin|pin@13||0|2||||
1737 AThicker|net@0|||FS900|pin@11||-0.75|0.75|pin@10||-0.75|-0.75|ART_color()I74
1738 AThicker|net@1|||FS1800|pin@3||-2.5|0|pin@2||-0.75|0|ART_color()I74
1739 AThicker|net@3|||FS900|pin@9||0|-0.75|pin@6||0|-2|ART_color()I74
1740 AThicker|net@4|||FS1800|pin@10||-0.75|-0.75|pin@9||0|-0.75|ART_color()I74
1741 AThicker|net@5|||FS0|pin@12||0|0.75|pin@11||-0.75|0.75|ART_color()I74
1742 AThicker|net@6|||FS900|pin@13||0|2|pin@12||0|0.75|ART_color()I74
1743 Ed||D5G1;|pin@5||B
1744 Eg||D5G1;|pin@4||I
1745 Es||D5G1;|pin@1||B
1746 X
1747
1748 # Cell NMOSfwk_native;1{sch}
1749 CNMOSfwk_native;1{sch}||schematic|1021415734000|1158099882605||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S4|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S10|ATTR_CDL_template(D5G1;NTX1.5;Y-31.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-1;Y-29;)StransistorType  NT-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24;)SM$(node_name) $(d) $(g) $(s) gnd nch_na W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)'  DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX1;Y-34;)SM$(node_name) $(d) $(g) $(s) gnd nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTY-21.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Srtranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
1750 INMOSfwk_native;1{ic}|NMOSfwk@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S4|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S10|ATTR_GEO(T)I0|ATTR_M(T)I1
1751 Ngeneric:Facet-Center|art@0||0|0||||AV
1752 NOff-Page|conn@0||6|-16.5||||
1753 NOff-Page|conn@1||4.5|0||||
1754 NOff-Page|conn@2||-10|-8||||
1755 NGround|gnd@0||5|-11||||
1756 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X2;Y-3.5;)Snch_na
1757 NWire_Pin|pin@0||0|-16.5||||
1758 NWire_Pin|pin@1||0|0||||
1759 Ngeneric:Invisible-Pin|pin@2||0|19.5|||||ART_message(D5G6;)SNMOSfwk_native
1760 Ngeneric:Invisible-Pin|pin@3||2|13|||||ART_message(D5G2;)S3-terminal native weak NMOS device
1761 Ngeneric:Invisible-Pin|pin@4||2.5|7|||||ART_message(D5G2;)S[note that the minimum allowed native,"device dimensions are W=10, L=4"]
1762 Awire|net@0|||900|nmos4p@0|s|0|-10|pin@0||0|-16.5
1763 Awire|net@1|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
1764 Awire|net@2|||1800|pin@1||0|0|conn@1|a|2.5|0
1765 Awire|net@3|||1800|conn@2|y|-8|-8|nmos4p@0|g|-3|-8
1766 Awire|net@4|||900|pin@1||0|0|nmos4p@0|d|0|-6
1767 Awire|net@5|||1800|nmos4p@0|b|0|-9|gnd@0||5|-9
1768 Ed||D5G2;|conn@1|y|B
1769 Eg||D5G2;|conn@2|a|I
1770 Es||D5G2;|conn@0|y|B
1771 X
1772
1773 # Cell NMOSx;1{ic}
1774 CNMOSx;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
1775 Ngeneric:Facet-Center|art@0||0|0||||AV
1776 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1777 NPin|pin@1||-1.5|0|1|1|RR|
1778 NPin|pin@2||-3|0|||RR|
1779 Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
1780 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1781 NPin|pin@5||0|-2||||
1782 NPin|pin@6||-1.5|1|1|1||
1783 NPin|pin@7||-1.5|-1|1|1||
1784 NPin|pin@8||0|-1||||
1785 NPin|pin@9||-0.75|-1|1|1||
1786 NPin|pin@10||-0.75|1|1|1||
1787 NPin|pin@11||0|1||||
1788 NPin|pin@12||0|2||||
1789 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I10
1790 AThicker|net@1|||FS1800|pin@2||-3|0|pin@1||-1.5|0|ART_color()I10
1791 AThicker|net@2|||FS900|pin@6||-1.5|1|pin@7||-1.5|-1|ART_color()I10
1792 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I10
1793 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I10
1794 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I10
1795 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I10
1796 Ed||D5G1;|pin@4||B
1797 Eg||D5G1;|pin@3||I
1798 Es||D5G1;|pin@0||B
1799 X
1800
1801 # Cell NMOSx;1{sch}
1802 CNMOSx;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-11.25;)S1|prototype_center()I[0,0]
1803 INMOSx;1{ic}|NMOS@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S1
1804 INMOSf;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (2-0.4) / @X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 1 ? 3.0*@X : 3
1805 Ngeneric:Facet-Center|art@0||0|0||||AV
1806 NOff-Page|conn@0||6|-16.5||||
1807 NOff-Page|conn@1||5.5|0||||
1808 NOff-Page|conn@2||-18.5|-8||||
1809 Ngeneric:Invisible-Pin|pin@0||-13|-2|||||ART_message(D5G1;)S[Note: Gate Resistor removed for,NCC in miniheater chip]
1810 NWire_Pin|pin@1||0|-16.5||||
1811 NWire_Pin|pin@2||0|0||||
1812 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)SNMOSx
1813 Ngeneric:Invisible-Pin|pin@4||-8.5|-4.5|||||ART_message(D5G1;)S[model,gate,resistance]
1814 Ngeneric:Invisible-Pin|pin@5||-0.5|6|||||ART_message(D5G2;)Sstandard-threshold strength-based NMOS device
1815 Awire|net@0|||0|NMOSf@0|g|-3|-8|conn@2|y|-16.5|-8
1816 Awire|net@1|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
1817 Awire|net@2|||900|pin@2||0|0|NMOSf@0|d|0|-6
1818 Awire|net@3|||1800|pin@1||0|-16.5|conn@0|a|4|-16.5
1819 Awire|net@4|||1800|pin@2||0|0|conn@1|a|3.5|0
1820 Ed||D5G2;|conn@1|y|B
1821 Eg||D5G2;|conn@2|a|I
1822 Es||D5G2;|conn@0|y|B
1823 X
1824
1825 # Cell NMOSx_high;1{ic}
1826 CNMOSx_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
1827 Ngeneric:Facet-Center|art@0||0|0||||AV
1828 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1829 NPin|pin@1||-2|0|1|1|RR|
1830 NPin|pin@2||-3.5|0|||RR|
1831 Nschematic:Bus_Pin|pin@3||-3.5|0|-2|-2||
1832 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1833 NPin|pin@5||0|-2||||
1834 NPin|pin@6||-2|1|1|1||
1835 NPin|pin@7||-2|-1|1|1||
1836 NPin|pin@8||0|-1||||
1837 NPin|pin@9||-0.75|-1|1|1||
1838 NPin|pin@10||-0.75|1|1|1||
1839 NPin|pin@11||0|1||||
1840 NPin|pin@12||0|2||||
1841 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I10
1842 AThicker|net@1|||FS1800|pin@2||-3.5|0|pin@1||-2|0|ART_color()I10
1843 AThicker|net@2|||FS900|pin@6||-2|1|pin@7||-2|-1|ART_color()I10
1844 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I10
1845 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I10
1846 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I10
1847 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I10
1848 Ed||D5G1;|pin@4||B
1849 Eg||D5G1;|pin@3||I
1850 Es||D5G1;|pin@0||B
1851 X
1852
1853 # Cell NMOSx_high;1{sch}
1854 CNMOSx_high;1{sch}||schematic|1021415734000|1158100931062||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-11.25;)S1|prototype_center()I[0,0]
1855 INMOSx_high;1{ic}|NMOS@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
1856 INMOSf_high;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (2-0.4) / @X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 1 ? 3.0*@X : 3
1857 Ngeneric:Facet-Center|art@0||0|0||||AV
1858 NOff-Page|conn@0||6|-16.5||||
1859 NOff-Page|conn@1||5.5|0||||
1860 NOff-Page|conn@2||-18.5|-8||||
1861 Ngeneric:Invisible-Pin|pin@0||-13|-2|||||ART_message(D5G1;)S[Note: Gate Resistor removed for,NCC in miniheater chip]
1862 NWire_Pin|pin@1||0|-16.5||||
1863 NWire_Pin|pin@2||0|0||||
1864 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)SNMOSx_high
1865 Ngeneric:Invisible-Pin|pin@4||-8.5|-4.5|||||ART_message(D5G1;)S[model,gate,resistance]
1866 Ngeneric:Invisible-Pin|pin@5||-0.5|6|||||ART_message(D5G2;)Shigh-threshold strength-based NMOS device
1867 Awire|net@0|||0|NMOSf@0|g|-3.5|-8|conn@2|y|-16.5|-8
1868 Awire|net@1|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
1869 Awire|net@2|||900|pin@2||0|0|NMOSf@0|d|0|-6
1870 Awire|net@3|||1800|pin@1||0|-16.5|conn@0|a|4|-16.5
1871 Awire|net@4|||1800|pin@2||0|0|conn@1|a|3.5|0
1872 Ed||D5G2;|conn@1|y|B
1873 Eg||D5G2;|conn@2|a|I
1874 Es||D5G2;|conn@0|y|B
1875 X
1876
1877 # Cell NMOSx_low;1{ic}
1878 CNMOSx_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
1879 Ngeneric:Facet-Center|art@0||0|0||||AV
1880 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1881 NPin|pin@1||-1|0|1|1|RR|
1882 NPin|pin@2||-2.5|0|||RR|
1883 Nschematic:Bus_Pin|pin@3||-2.5|0|-2|-2||
1884 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1885 NPin|pin@5||0|-2||||
1886 NPin|pin@6||-1|1|1|1||
1887 NPin|pin@7||-1|-1|1|1||
1888 NPin|pin@8||0|-1||||
1889 NPin|pin@9||-0.75|-1|1|1||
1890 NPin|pin@10||-0.75|1|1|1||
1891 NPin|pin@11||0|1||||
1892 NPin|pin@12||0|2||||
1893 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I10
1894 AThicker|net@1|||FS1800|pin@2||-2.5|0|pin@1||-1|0|ART_color()I10
1895 AThicker|net@2|||FS900|pin@6||-1|1|pin@7||-1|-1|ART_color()I10
1896 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I10
1897 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I10
1898 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I10
1899 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I10
1900 Ed||D5G1;|pin@4||B
1901 Eg||D5G1;|pin@3||I
1902 Es||D5G1;|pin@0||B
1903 X
1904
1905 # Cell NMOSx_low;1{sch}
1906 CNMOSx_low;1{sch}||schematic|1021415734000|1158100938709||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-11.25;)S1|prototype_center()I[0,0]
1907 INMOSx_low;1{ic}|NMOS@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
1908 INMOSf_low;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (2-0.4) / @X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 1 ? 3.0*@X : 3
1909 Ngeneric:Facet-Center|art@0||0|0||||AV
1910 NOff-Page|conn@0||6|-16.5||||
1911 NOff-Page|conn@1||5.5|0||||
1912 NOff-Page|conn@2||-18.5|-8||||
1913 Ngeneric:Invisible-Pin|pin@0||-13|-2|||||ART_message(D5G1;)S[Note: Gate Resistor removed for,NCC in miniheater chip]
1914 NWire_Pin|pin@1||0|-16.5||||
1915 NWire_Pin|pin@2||0|0||||
1916 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)SNMOSx_low
1917 Ngeneric:Invisible-Pin|pin@4||-8.5|-4.5|||||ART_message(D5G1;)S[model,gate,resistance]
1918 Ngeneric:Invisible-Pin|pin@5||-0.5|6|||||ART_message(D5G2;)Slow-threshold strength-based NMOS device
1919 Awire|net@0|||0|NMOSf@0|g|-2.5|-8|conn@2|y|-16.5|-8
1920 Awire|net@1|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
1921 Awire|net@2|||900|pin@2||0|0|NMOSf@0|d|0|-6
1922 Awire|net@3|||1800|pin@1||0|-16.5|conn@0|a|4|-16.5
1923 Awire|net@4|||1800|pin@2||0|0|conn@1|a|3.5|0
1924 Ed||D5G2;|conn@1|y|B
1925 Eg||D5G2;|conn@2|a|I
1926 Es||D5G2;|conn@0|y|B
1927 X
1928
1929 # Cell NMOSx_native;1{ic}
1930 CNMOSx_native;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
1931 Ngeneric:Facet-Center|art@0||0|0||||AV
1932 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1933 NPin|pin@1||-0.75|0|1|1|RR|
1934 NPin|pin@2||-2.5|0|||RR|
1935 Nschematic:Bus_Pin|pin@3||-2.5|0|-2|-2||
1936 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1937 NPin|pin@5||0|-2||||
1938 NPin|pin@8||0|-1||||
1939 NPin|pin@9||-0.75|-1|1|1||
1940 NPin|pin@10||-0.75|1|1|1||
1941 NPin|pin@11||0|1||||
1942 NPin|pin@12||0|2||||
1943 AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I10
1944 AThicker|net@1|||FS1800|pin@2||-2.5|0|pin@1||-0.75|0|ART_color()I10
1945 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I10
1946 AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I10
1947 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I10
1948 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I10
1949 Ed||D5G1;|pin@4||B
1950 Eg||D5G1;|pin@3||I
1951 Es||D5G1;|pin@0||B
1952 X
1953
1954 # Cell NMOSx_native;1{sch}
1955 CNMOSx_native;1{sch}||schematic|1021415734000|1158100942644||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-11.25;)S1|prototype_center()I[0,0]
1956 INMOSx_native;1{ic}|NMOS@0||20|0|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
1957 INMOSf_native;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (4-0.4) / @X + 0.4) : 4|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 1 ? 10.0*@X : 10.0
1958 Ngeneric:Facet-Center|art@0||0|0||||AV
1959 NOff-Page|conn@0||6|-16.5||||
1960 NOff-Page|conn@1||5.5|0||||
1961 NOff-Page|conn@2||-18.5|-8||||
1962 Ngeneric:Invisible-Pin|pin@0||-13|-2|||||ART_message(D5G1;)S[Note: Gate Resistor removed for,NCC in miniheater chip]
1963 NWire_Pin|pin@1||0|-16.5||||
1964 NWire_Pin|pin@2||0|0||||
1965 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)SNMOSx_native
1966 Ngeneric:Invisible-Pin|pin@4||-8.5|-4.5|||||ART_message(D5G1;)S[model,gate,resistance]
1967 Ngeneric:Invisible-Pin|pin@5||0|6|||||ART_message(D5G2;)S3 terminal native strength-based NMOS device
1968 Awire|net@0|||0|NMOSf@0|g|-2.5|-8|conn@2|y|-16.5|-8
1969 Awire|net@1|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
1970 Awire|net@2|||900|pin@2||0|0|NMOSf@0|d|0|-6
1971 Awire|net@3|||1800|pin@1||0|-16.5|conn@0|a|4|-16.5
1972 Awire|net@4|||1800|pin@2||0|0|conn@1|a|3.5|0
1973 Ed||D5G2;|conn@1|y|B
1974 Eg||D5G2;|conn@2|a|I
1975 Es||D5G2;|conn@0|y|B
1976 X
1977
1978 # Cell NMOSx_native_od18;1{ic}
1979 CNMOSx_native_od18;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
1980 Ngeneric:Facet-Center|art@0||0|0||||AV
1981 Ngeneric:Invisible-Pin|pin@0||0|-2||||
1982 NPin|pin@1||-1.75|0|1|1|RR|
1983 NPin|pin@2||-3|0|||RR|
1984 Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
1985 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
1986 NPin|pin@5||0|-2||||
1987 NPin|pin@8||0|-1||||
1988 NPin|pin@9||-1.75|-1|1|1||
1989 NPin|pin@10||-1.75|1|1|1||
1990 NPin|pin@11||0|1||||
1991 NPin|pin@12||0|2||||
1992 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S1.8V
1993 AThicker|net@0|||FS2700|pin@9||-1.75|-1|pin@10||-1.75|1|ART_color()I10
1994 AThicker|net@1|||FS0|pin@1||-1.75|0|pin@2||-3|0|ART_color()I10
1995 AThicker|net@3|||FS2700|pin@5||0|-2|pin@8||0|-1|ART_color()I10
1996 AThicker|net@4|||FS0|pin@8||0|-1|pin@9||-1.75|-1|ART_color()I10
1997 AThicker|net@5|||FS1800|pin@10||-1.75|1|pin@11||0|1|ART_color()I10
1998 AThicker|net@6|||FS2700|pin@11||0|1|pin@12||0|2|ART_color()I10
1999 Ed||D5G1;|pin@4||B
2000 Eg||D5G1;|pin@3||I
2001 Es||D5G1;|pin@0||B
2002 X
2003
2004 # Cell NMOSx_native_od18;1{sch}
2005 CNMOSx_native_od18;1{sch}||schematic|1021415734000|1158100918384||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-11.25;)S1|prototype_center()I[0,0]
2006 INMOSx_native_od18;1{ic}|NMOS@0||20|0|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
2007 INMOSf_native_od18;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (24-0.4) / @X + 0.4) : 24|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 1 ? 10.0*@X : 10.0
2008 Ngeneric:Facet-Center|art@0||0|0||||AV
2009 NOff-Page|conn@0||6|-16.5||||
2010 NOff-Page|conn@1||5.5|0||||
2011 NOff-Page|conn@2||-18.5|-8||||
2012 NWire_Pin|pin@1||0|-16.5||||
2013 NWire_Pin|pin@2||0|0||||
2014 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)SNMOSx_native_od18
2015 Ngeneric:Invisible-Pin|pin@5||0|6|||||ART_message(D5G2;)S3 terminal 1.8V native strength-based NMOS device
2016 Awire|net@0|||0|NMOSf@0|g|-3|-8|conn@2|y|-16.5|-8
2017 Awire|net@1|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
2018 Awire|net@2|||900|pin@2||0|0|NMOSf@0|d|0|-6
2019 Awire|net@3|||0|conn@0|a|4|-16.5|pin@1||0|-16.5
2020 Awire|net@4|||0|conn@1|a|3.5|0|pin@2||0|0
2021 Ed||D5G2;|conn@1|y|B
2022 Eg||D5G2;|conn@2|a|I
2023 Es||D5G2;|conn@0|y|B
2024 X
2025
2026 # Cell NMOSx_native_od25;1{ic}
2027 CNMOSx_native_od25;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
2028 Ngeneric:Facet-Center|art@0||0|0||||AV
2029 Ngeneric:Invisible-Pin|pin@0||0|-2||||
2030 NPin|pin@1||-1.75|0|1|1|RR|
2031 NPin|pin@2||-3|0|||RR|
2032 Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
2033 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
2034 NPin|pin@5||0|-2||||
2035 NPin|pin@8||0|-1||||
2036 NPin|pin@9||-1.75|-1|1|1||
2037 NPin|pin@10||-1.75|1|1|1||
2038 NPin|pin@11||0|1||||
2039 NPin|pin@12||0|2||||
2040 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S2.5V
2041 AThicker|net@0|||FS900|pin@10||-1.75|1|pin@9||-1.75|-1|ART_color()I10
2042 AThicker|net@1|||FS1800|pin@2||-3|0|pin@1||-1.75|0|ART_color()I10
2043 AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I10
2044 AThicker|net@4|||FS1800|pin@9||-1.75|-1|pin@8||0|-1|ART_color()I10
2045 AThicker|net@5|||FS0|pin@11||0|1|pin@10||-1.75|1|ART_color()I10
2046 AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I10
2047 Ed||D5G1;|pin@4||B
2048 Eg||D5G1;|pin@3||I
2049 Es||D5G1;|pin@0||B
2050 X
2051
2052 # Cell NMOSx_native_od25;1{sch}
2053 CNMOSx_native_od25;1{sch}||schematic|1021415734000|1158100915657||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-11.25;)S1|prototype_center()I[0,0]
2054 INMOSx_native_od25;1{ic}|NMOS@0||20|0|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
2055 INMOSf_native_od25;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5G1;NOLPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (24-0.4) / @X + 0.4) : 24|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 1 ? 10.0*@X : 10.0
2056 Ngeneric:Facet-Center|art@0||0|0||||AV
2057 NOff-Page|conn@0||6|-16.5||||
2058 NOff-Page|conn@1||5.5|0||||
2059 NOff-Page|conn@2||-18.5|-8||||
2060 NWire_Pin|pin@1||0|-16.5||||
2061 NWire_Pin|pin@2||0|0||||
2062 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)SNMOSx_native_od25
2063 Ngeneric:Invisible-Pin|pin@5||0|6|||||ART_message(D5G2;)S3 terminal 2.5V native strength-based NMOS device
2064 Awire|net@0|||0|NMOSf@0|g|-3|-8|conn@2|y|-16.5|-8
2065 Awire|net@1|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
2066 Awire|net@2|||900|pin@2||0|0|NMOSf@0|d|0|-6
2067 Awire|net@3|||1800|pin@1||0|-16.5|conn@0|a|4|-16.5
2068 Awire|net@4|||1800|pin@2||0|0|conn@1|a|3.5|0
2069 Ed||D5G2;|conn@1|y|B
2070 Eg||D5G2;|conn@2|a|I
2071 Es||D5G2;|conn@0|y|B
2072 X
2073
2074 # Cell NMOSx_native_od33;1{ic}
2075 CNMOSx_native_od33;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
2076 Ngeneric:Facet-Center|art@0||0|0||||AV
2077 Ngeneric:Invisible-Pin|pin@0||0|-2||||
2078 NPin|pin@1||-1.75|0|1|1|RR|
2079 NPin|pin@2||-3|0|||RR|
2080 Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
2081 Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
2082 NPin|pin@5||0|-2||||
2083 NPin|pin@8||0|-1||||
2084 NPin|pin@9||-1.75|-1|1|1||
2085 NPin|pin@10||-1.75|1|1|1||
2086 NPin|pin@11||0|1||||
2087 NPin|pin@12||0|2||||
2088 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S3.3V
2089 AThicker|net@0|||FS2700|pin@9||-1.75|-1|pin@10||-1.75|1|ART_color()I10
2090 AThicker|net@1|||FS0|pin@1||-1.75|0|pin@2||-3|0|ART_color()I10
2091 AThicker|net@3|||FS2700|pin@5||0|-2|pin@8||0|-1|ART_color()I10
2092 AThicker|net@4|||FS0|pin@8||0|-1|pin@9||-1.75|-1|ART_color()I10
2093 AThicker|net@5|||FS1800|pin@10||-1.75|1|pin@11||0|1|ART_color()I10
2094 AThicker|net@6|||FS2700|pin@11||0|1|pin@12||0|2|ART_color()I10
2095 Ed||D5G1;|pin@4||B
2096 Eg||D5G1;|pin@3||I
2097 Es||D5G1;|pin@0||B
2098 X
2099
2100 # Cell NMOSx_native_od33;1{sch}
2101 CNMOSx_native_od33;1{sch}||schematic|1021415734000|1158100912091||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-11.25;)S1|prototype_center()I[0,0]
2102 INMOSx_native_od33;1{ic}|NMOS@0||20|0|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S1
2103 INMOSf_native_od33;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (24-0.4) / @X + 0.4) : 24|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 1 ? 10.0*@X : 10.0
2104 Ngeneric:Facet-Center|art@0||0|0||||AV
2105 NOff-Page|conn@0||6|-16.5||||
2106 NOff-Page|conn@1||5.5|0||||
2107 NOff-Page|conn@2||-18.5|-8||||
2108 NWire_Pin|pin@1||0|-16.5||||
2109 NWire_Pin|pin@2||0|0||||
2110 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)SNMOSx_native_od33
2111 Ngeneric:Invisible-Pin|pin@5||0|6|||||ART_message(D5G2;)S3 terminal 3.3V native strength-based NMOS device
2112 Awire|net@0|||0|NMOSf@0|g|-3|-8|conn@2|y|-16.5|-8
2113 Awire|net@1|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
2114 Awire|net@2|||900|pin@2||0|0|NMOSf@0|d|0|-6
2115 Awire|net@3|||0|conn@0|a|4|-16.5|pin@1||0|-16.5
2116 Awire|net@4|||0|conn@1|a|3.5|0|pin@2||0|0
2117 Ed||D5G2;|conn@1|y|B
2118 Eg||D5G2;|conn@2|a|I
2119 Es||D5G2;|conn@0|y|B
2120 X
2121
2122 # Cell NMOSxwk;1{ic}
2123 CNMOSxwk;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
2124 Ngeneric:Facet-Center|art@0||0|0||||AV
2125 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
2126 Ngeneric:Invisible-Pin|pin@1||0|-2||||
2127 NPin|pin@2||-1.25|0|1|1|RR|
2128 NPin|pin@3||-3|0|||RR|
2129 Nschematic:Bus_Pin|pin@4||-3|0|-2|-2||
2130 Nschematic:Bus_Pin|pin@5||0|2|-2|-2||
2131 NPin|pin@6||0|-2||||
2132 NPin|pin@7||-1.25|0.75|1|1||
2133 NPin|pin@8||-1.25|-0.75|1|1||
2134 NPin|pin@9||0|-0.75||||
2135 NPin|pin@10||-0.75|-0.75|1|1||
2136 NPin|pin@11||-0.75|0.75|1|1||
2137 NPin|pin@12||0|0.75||||
2138 NPin|pin@13||0|2||||
2139 AThicker|net@0|||FS900|pin@11||-0.75|0.75|pin@10||-0.75|-0.75|ART_color()I10
2140 AThicker|net@1|||FS1800|pin@3||-3|0|pin@2||-1.25|0|ART_color()I10
2141 AThicker|net@2|||FS900|pin@7||-1.25|0.75|pin@8||-1.25|-0.75|ART_color()I10
2142 AThicker|net@3|||FS900|pin@9||0|-0.75|pin@6||0|-2|ART_color()I10
2143 AThicker|net@4|||FS1800|pin@10||-0.75|-0.75|pin@9||0|-0.75|ART_color()I10
2144 AThicker|net@5|||FS0|pin@12||0|0.75|pin@11||-0.75|0.75|ART_color()I10
2145 AThicker|net@6|||FS900|pin@13||0|2|pin@12||0|0.75|ART_color()I10
2146 Ed||D5G1;|pin@5||B
2147 Eg||D5G1;|pin@4||I
2148 Es||D5G1;|pin@1||B
2149 X
2150
2151 # Cell NMOSxwk;1{sch}
2152 CNMOSxwk;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-13.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-12.25;)S1|prototype_center()I[0,0]
2153 INMOSfwk;1{ic}|NMOSfwk@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X==0 ? 0 : (@X<1) ? (1*(2-0.4)/@X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X>1 ? 3.0*@X : 3|ATTR_GEO()I0
2154 INMOSxwk;1{ic}|NMOSwk@0||23|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
2155 Ngeneric:Facet-Center|art@0||0|0||||AV
2156 NOff-Page|conn@0||6|-16.5||||
2157 NOff-Page|conn@1||4.5|0||||
2158 NOff-Page|conn@2||-10|-8||||
2159 NWire_Pin|pin@0||0|-16.5||||
2160 NWire_Pin|pin@1||0|0||||
2161 Ngeneric:Invisible-Pin|pin@2||2|11.5|||||ART_message(D5G6;)SNMOSxwk
2162 Ngeneric:Invisible-Pin|pin@3||1|5.5|||||ART_message(D5G2;)S3-terminal standard threshold weak strength based NMOS device
2163 Awire|net@0|||2700|pin@0||0|-16.5|NMOSfwk@0|s|0|-10
2164 Awire|net@1|||900|pin@1||0|0|NMOSfwk@0|d|0|-6
2165 Awire|net@2|||1800|conn@2|y|-8|-8|NMOSfwk@0|g|-3|-8
2166 Awire|net@3|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
2167 Awire|net@4|||1800|pin@1||0|0|conn@1|a|2.5|0
2168 Ed||D5G2;|conn@1|y|B
2169 Eg||D5G2;|conn@2|a|I
2170 Es||D5G2;|conn@0|y|B
2171 X
2172
2173 # Cell NMOSxwk_high;1{ic}
2174 CNMOSxwk_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
2175 Ngeneric:Facet-Center|art@0||0|0||||AV
2176 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
2177 Ngeneric:Invisible-Pin|pin@1||0|-2||||
2178 NPin|pin@2||-1.75|0|1|1|RR|
2179 NPin|pin@3||-3|0|||RR|
2180 Nschematic:Bus_Pin|pin@4||-3|0|-2|-2||
2181 Nschematic:Bus_Pin|pin@5||0|2|-2|-2||
2182 NPin|pin@6||0|-2||||
2183 NPin|pin@7||-1.75|0.75|1|1||
2184 NPin|pin@8||-1.75|-0.75|1|1||
2185 NPin|pin@9||0|-0.75||||
2186 NPin|pin@10||-0.75|-0.75|1|1||
2187 NPin|pin@11||-0.75|0.75|1|1||
2188 NPin|pin@12||0|0.75||||
2189 NPin|pin@13||0|2||||
2190 AThicker|net@0|||FS900|pin@11||-0.75|0.75|pin@10||-0.75|-0.75|ART_color()I10
2191 AThicker|net@1|||FS1800|pin@3||-3|0|pin@2||-1.75|0|ART_color()I10
2192 AThicker|net@2|||FS900|pin@7||-1.75|0.75|pin@8||-1.75|-0.75|ART_color()I10
2193 AThicker|net@3|||FS900|pin@9||0|-0.75|pin@6||0|-2|ART_color()I10
2194 AThicker|net@4|||FS1800|pin@10||-0.75|-0.75|pin@9||0|-0.75|ART_color()I10
2195 AThicker|net@5|||FS0|pin@12||0|0.75|pin@11||-0.75|0.75|ART_color()I10
2196 AThicker|net@6|||FS900|pin@13||0|2|pin@12||0|0.75|ART_color()I10
2197 Ed||D5G1;|pin@5||B
2198 Eg||D5G1;|pin@4||I
2199 Es||D5G1;|pin@1||B
2200 X
2201
2202 # Cell NMOSxwk_high;1{sch}
2203 CNMOSxwk_high;1{sch}||schematic|1021415734000|1158100946251||ATTR_Delay(D5G1;HNPX-8.5;Y-13.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-12.25;)S1|prototype_center()I[0,0]
2204 INMOSfwk_high;1{ic}|NMOSfwk@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X==0 ? 0 : (@X<1) ? (1*(2-0.4)/@X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X>1 ? 3.0*@X : 3|ATTR_GEO()I0
2205 INMOSxwk_high;1{ic}|NMOSwk@0||23|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
2206 Ngeneric:Facet-Center|art@0||0|0||||AV
2207 NOff-Page|conn@0||6|-16.5||||
2208 NOff-Page|conn@1||4.5|0||||
2209 NOff-Page|conn@2||-10|-8||||
2210 NWire_Pin|pin@0||0|-16.5||||
2211 NWire_Pin|pin@1||0|0||||
2212 Ngeneric:Invisible-Pin|pin@2||2|11.5|||||ART_message(D5G6;)SNMOSxwk_high
2213 Ngeneric:Invisible-Pin|pin@3||1|5.5|||||ART_message(D5G2;)S3-terminal high-threshold weak strength based NMOS device
2214 Awire|net@0|||2700|pin@0||0|-16.5|NMOSfwk@0|s|0|-10
2215 Awire|net@1|||900|pin@1||0|0|NMOSfwk@0|d|0|-6
2216 Awire|net@2|||1800|conn@2|y|-8|-8|NMOSfwk@0|g|-3|-8
2217 Awire|net@3|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
2218 Awire|net@4|||1800|pin@1||0|0|conn@1|a|2.5|0
2219 Ed||D5G2;|conn@1|y|B
2220 Eg||D5G2;|conn@2|a|I
2221 Es||D5G2;|conn@0|y|B
2222 X
2223
2224 # Cell NMOSxwk_low;1{ic}
2225 CNMOSxwk_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
2226 Ngeneric:Facet-Center|art@0||0|0||||AV
2227 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
2228 Ngeneric:Invisible-Pin|pin@1||0|-2||||
2229 NPin|pin@2||-1|0|1|1|RR|
2230 NPin|pin@3||-2.5|0|||RR|
2231 Nschematic:Bus_Pin|pin@4||-2.5|0|-2|-2||
2232 Nschematic:Bus_Pin|pin@5||0|2|-2|-2||
2233 NPin|pin@6||0|-2||||
2234 NPin|pin@9||0|-0.75||||
2235 NPin|pin@10||-0.75|-0.75|1|1||
2236 NPin|pin@11||-0.75|0.75|1|1||
2237 NPin|pin@12||0|0.75||||
2238 NPin|pin@13||0|2||||
2239 NPin|pin@14||-1|-0.75|1|1||
2240 NPin|pin@15||-1|0.75|1|1||
2241 AThicker|net@0|||FS900|pin@11||-0.75|0.75|pin@10||-0.75|-0.75|ART_color()I10
2242 AThicker|net@1|||FS1800|pin@3||-2.5|0|pin@2||-1|0|ART_color()I10
2243 AThicker|net@3|||FS900|pin@9||0|-0.75|pin@6||0|-2|ART_color()I10
2244 AThicker|net@4|||FS1800|pin@10||-0.75|-0.75|pin@9||0|-0.75|ART_color()I10
2245 AThicker|net@5|||FS0|pin@12||0|0.75|pin@11||-0.75|0.75|ART_color()I10
2246 AThicker|net@6|||FS900|pin@13||0|2|pin@12||0|0.75|ART_color()I10
2247 AThicker|net@7|||FS900|pin@15||-1|0.75|pin@14||-1|-0.75|ART_color()I10
2248 Ed||D5G1;|pin@5||B
2249 Eg||D5G1;|pin@4||I
2250 Es||D5G1;|pin@1||B
2251 X
2252
2253 # Cell NMOSxwk_low;1{sch}
2254 CNMOSxwk_low;1{sch}||schematic|1021415734000|1158100950827||ATTR_Delay(D5G1;HNPX-8.5;Y-13.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-12.25;)S1|prototype_center()I[0,0]
2255 INMOSfwk_low;1{ic}|NMOSfwk@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X==0 ? 0 : (@X<1) ? (1*(2-0.4)/@X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X>1 ? 3.0*@X : 3|ATTR_GEO()I0
2256 INMOSxwk_low;1{ic}|NMOSwk@0||23|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
2257 Ngeneric:Facet-Center|art@0||0|0||||AV
2258 NOff-Page|conn@0||6|-16.5||||
2259 NOff-Page|conn@1||4.5|0||||
2260 NOff-Page|conn@2||-10|-8||||
2261 NWire_Pin|pin@0||0|-16.5||||
2262 NWire_Pin|pin@1||0|0||||
2263 Ngeneric:Invisible-Pin|pin@2||2|11.5|||||ART_message(D5G6;)SNMOSxwk_low
2264 Ngeneric:Invisible-Pin|pin@3||1|5.5|||||ART_message(D5G2;)S3-terminal low-threshold weak strength based NMOS device
2265 Awire|net@0|||2700|pin@0||0|-16.5|NMOSfwk@0|s|0|-10
2266 Awire|net@1|||900|pin@1||0|0|NMOSfwk@0|d|0|-6
2267 Awire|net@2|||1800|conn@2|y|-8|-8|NMOSfwk@0|g|-2.5|-8
2268 Awire|net@3|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
2269 Awire|net@4|||1800|pin@1||0|0|conn@1|a|2.5|0
2270 Ed||D5G2;|conn@1|y|B
2271 Eg||D5G2;|conn@2|a|I
2272 Es||D5G2;|conn@0|y|B
2273 X
2274
2275 # Cell NMOSxwk_native;1{ic}
2276 CNMOSxwk_native;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[0,-8000]
2277 Ngeneric:Facet-Center|art@0||0|0||||AV
2278 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
2279 Ngeneric:Invisible-Pin|pin@1||0|-2||||
2280 NPin|pin@2||-0.75|0|1|1|RR|
2281 NPin|pin@3||-2.5|0|||RR|
2282 Nschematic:Bus_Pin|pin@4||-2.5|0|-2|-2||
2283 Nschematic:Bus_Pin|pin@5||0|2|-2|-2||
2284 NPin|pin@6||0|-2||||
2285 NPin|pin@9||0|-0.75||||
2286 NPin|pin@10||-0.75|-0.75|1|1||
2287 NPin|pin@11||-0.75|0.75|1|1||
2288 NPin|pin@12||0|0.75||||
2289 NPin|pin@13||0|2||||
2290 AThicker|net@0|||FS900|pin@11||-0.75|0.75|pin@10||-0.75|-0.75|ART_color()I10
2291 AThicker|net@1|||FS1800|pin@3||-2.5|0|pin@2||-0.75|0|ART_color()I10
2292 AThicker|net@3|||FS900|pin@9||0|-0.75|pin@6||0|-2|ART_color()I10
2293 AThicker|net@4|||FS1800|pin@10||-0.75|-0.75|pin@9||0|-0.75|ART_color()I10
2294 AThicker|net@5|||FS0|pin@12||0|0.75|pin@11||-0.75|0.75|ART_color()I10
2295 AThicker|net@6|||FS900|pin@13||0|2|pin@12||0|0.75|ART_color()I10
2296 Ed||D5G1;|pin@5||B
2297 Eg||D5G1;|pin@4||I
2298 Es||D5G1;|pin@1||B
2299 X
2300
2301 # Cell NMOSxwk_native;2{sch}
2302 CNMOSxwk_native;2{sch}||schematic|1021415734000|1158100953810||ATTR_Delay(D5G1;HNPX-8.5;Y-13.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y-12.25;)S1|prototype_center()I[0,0]
2303 INMOSfwk_native;1{ic}|NMOSfwk@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X==0 ? 0 : (@X<1) ? (1*(4-0.4)/@X + 0.4) : 4|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X>1 ? 10.0*@X : 10.0|ATTR_GEO()I0
2304 INMOSxwk_native;1{ic}|NMOSwk@0||23|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
2305 Ngeneric:Facet-Center|art@0||0|0||||AV
2306 NOff-Page|conn@0||6|-16.5||||
2307 NOff-Page|conn@1||4.5|0||||
2308 NOff-Page|conn@2||-10|-8||||
2309 NWire_Pin|pin@0||0|-16.5||||
2310 NWire_Pin|pin@1||0|0||||
2311 Ngeneric:Invisible-Pin|pin@2||2|11.5|||||ART_message(D5G6;)SNMOSxwk_native
2312 Ngeneric:Invisible-Pin|pin@3||1|5.5|||||ART_message(D5G2;)S3-terminal native weak strength based NMOS device
2313 Awire|net@0|||2700|pin@0||0|-16.5|NMOSfwk@0|s|0|-10
2314 Awire|net@1|||900|pin@1||0|0|NMOSfwk@0|d|0|-6
2315 Awire|net@2|||1800|conn@2|y|-8|-8|NMOSfwk@0|g|-2.5|-8
2316 Awire|net@3|||1800|pin@0||0|-16.5|conn@0|a|4|-16.5
2317 Awire|net@4|||1800|pin@1||0|0|conn@1|a|2.5|0
2318 Ed||D5G2;|conn@1|y|B
2319 Eg||D5G2;|conn@2|a|I
2320 Es||D5G2;|conn@0|y|B
2321 X
2322
2323 # Cell PMOS4f;1{ic}
2324 CPMOS4f;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,0]
2325 Ngeneric:Facet-Center|art@0||0|0||||AV
2326 NThick-Circle|art@1||-2|0|1|1|||ART_color()I74
2327 NPin|pin@0||-0.5|0.25|1|1|YRR|
2328 NPin|pin@1||-0.5|0.75|1|1|YRR|
2329 NPin|pin@2||-0.75|0.5|1|1|Y|
2330 NPin|pin@3||0|0.5||||
2331 Ngeneric:Invisible-Pin|pin@4||0|2||||
2332 Ngeneric:Invisible-Pin|pin@5||0|0.5||||
2333 Nschematic:Bus_Pin|pin@6||0|-2|-2|-2||
2334 Nschematic:Bus_Pin|pin@7||-3|0|-2|-2||
2335 NPin|pin@8||0|1||||
2336 NPin|pin@9||-0.75|1|1|1||
2337 NPin|pin@10||-0.75|-1|1|1||
2338 NPin|pin@11||0|-1||||
2339 NPin|pin@12||0|-2||||
2340 NPin|pin@13||-3|0|||RR|
2341 NPin|pin@14||-2.5|0|1|1|RR|
2342 NPin|pin@15||0|2||||
2343 NPin|pin@16||-1.5|-1|1|1||
2344 NPin|pin@17||-1.5|1|1|1||
2345 AThicker|net@0|||FS3150|pin@0||-0.5|0.25|pin@2||-0.75|0.5|ART_color()I74
2346 AThicker|net@1|||FS450|pin@1||-0.5|0.75|pin@2||-0.75|0.5|ART_color()I74
2347 AThicker|net@2|||FS0|pin@3||0|0.5|pin@2||-0.75|0.5|ART_color()I74
2348 AThicker|net@3|||FS0|pin@8||0|1|pin@9||-0.75|1|ART_color()I74
2349 AThicker|net@4|||FS1800|pin@10||-0.75|-1|pin@11||0|-1|ART_color()I74
2350 AThicker|net@5|||FS1800|pin@13||-3|0|pin@14||-2.5|0|ART_color()I74
2351 AThicker|net@6|||FS2700|pin@8||0|1|pin@15||0|2|ART_color()I74
2352 AThicker|net@7|||FS900|pin@11||0|-1|pin@12||0|-2|ART_color()I74
2353 AThicker|net@8|||FS900|pin@9||-0.75|1|pin@10||-0.75|-1|ART_color()I74
2354 AThicker|net@9|||FS900|pin@17||-1.5|1|pin@16||-1.5|-1|ART_color()I74
2355 Eb||D5G1;|pin@5||B
2356 Ed||D5G1;|pin@6||B
2357 Eg||D5G1;|pin@7||I
2358 Es||D5G1;|pin@4||B
2359 X
2360
2361 # Cell PMOS4f;1{sch}
2362 CPMOS4f;1{sch}||schematic|1021415734000|1159313503962||ATTR_Delay(D5G1;HNPX-8.5;Y-1.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y0.25;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y2;)S3|ATTR_CDL_template(D5G1;NTX2;Y-13;)SM$(node_name) $(d) $(g) $(s) $(b) pch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template(D5G1;NTX3.5;Y-9;)SM$(node_name) $(d) $(g) $(s) $(b) pch W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX2.5;Y-15;)SM$(node_name) $(d) $(g) $(s) $(b) pch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX1;Y-7;)SM$(node_name) $(d) $(g) $(s) $(b) pch W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-11;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
2363 IPMOS4f;1{ic}|PMOS4f@0||17.25|10.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
2364 Ngeneric:Facet-Center|art@0||0|0||||AV
2365 NOff-Page|conn@0||5|11.5||||
2366 NOff-Page|conn@1||5|8||||
2367 NOff-Page|conn@2||-12|7||||
2368 NOff-Page|conn@3||5|1||||
2369 NWire_Pin|pin@0||0|11.5||||
2370 NWire_Pin|pin@1||0|1||||
2371 Ngeneric:Invisible-Pin|pin@2||-1|24|||||ART_message(D5G6;)SPMOS4f
2372 Ngeneric:Invisible-Pin|pin@3||-1.5|18.5|||||ART_message(D5G2;)S4-terminal standard-threshold PMOS device
2373 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Spch
2374 Awire|net@0|||0|pmos4p@0|g|-3|7|conn@2|y|-10|7
2375 Awire|net@1|||1800|pin@0||0|11.5|conn@0|a|3|11.5
2376 Awire|net@2|||2700|pmos4p@0|s|0|9|pin@0||0|11.5
2377 Awire|net@3|||1800|pmos4p@0|b|0|8|conn@1|a|3|8
2378 Awire|net@4|||0|conn@3|a|3|1|pin@1||0|1
2379 Awire|net@5|||2700|pin@1||0|1|pmos4p@0|d|0|5
2380 Eb||D5G2;|conn@1|y|B
2381 Ed||D5G2;|conn@3|y|B
2382 Eg||D5G2;|conn@2|a|I
2383 Es||D5G2;|conn@0|y|B
2384 X
2385
2386 # Cell PMOS4f_high;1{ic}
2387 CPMOS4f_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.75;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.25;Y-0.25;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX3;Y1;)S3|prototype_center()I[0,0]
2388 Ngeneric:Facet-Center|art@0||0|0||||AV
2389 NThick-Circle|art@1||-2.5|0|1|1|||ART_color()I74
2390 NPin|pin@0||-0.5|0.25|1|1|YRR|
2391 NPin|pin@1||-0.5|0.75|1|1|YRR|
2392 NPin|pin@2||-0.75|0.5|1|1|Y|
2393 NPin|pin@3||0|0.5||||
2394 Ngeneric:Invisible-Pin|pin@4||0|2||||
2395 Ngeneric:Invisible-Pin|pin@5||0|0.5||||
2396 Nschematic:Bus_Pin|pin@6||0|-2|-2|-2||
2397 Nschematic:Bus_Pin|pin@7||-3.5|0|-2|-2||
2398 NPin|pin@8||0|1||||
2399 NPin|pin@9||-0.75|1|1|1||
2400 NPin|pin@10||-0.75|-1|1|1||
2401 NPin|pin@11||0|-1||||
2402 NPin|pin@12||0|-2||||
2403 NPin|pin@13||-3.5|0|||RR|
2404 NPin|pin@14||-3|0|1|1|RR|
2405 NPin|pin@15||0|2||||
2406 NPin|pin@16||-2|-1|1|1||
2407 NPin|pin@17||-2|1|1|1||
2408 AThicker|net@0|||FS3150|pin@0||-0.5|0.25|pin@2||-0.75|0.5|ART_color()I74
2409 AThicker|net@1|||FS450|pin@1||-0.5|0.75|pin@2||-0.75|0.5|ART_color()I74
2410 AThicker|net@2|||FS0|pin@3||0|0.5|pin@2||-0.75|0.5|ART_color()I74
2411 AThicker|net@3|||FS0|pin@8||0|1|pin@9||-0.75|1|ART_color()I74
2412 AThicker|net@4|||FS1800|pin@10||-0.75|-1|pin@11||0|-1|ART_color()I74
2413 AThicker|net@5|||FS1800|pin@13||-3.5|0|pin@14||-3|0|ART_color()I74
2414 AThicker|net@6|||FS2700|pin@8||0|1|pin@15||0|2|ART_color()I74
2415 AThicker|net@7|||FS900|pin@11||0|-1|pin@12||0|-2|ART_color()I74
2416 AThicker|net@8|||FS900|pin@9||-0.75|1|pin@10||-0.75|-1|ART_color()I74
2417 AThicker|net@9|||FS900|pin@17||-2|1|pin@16||-2|-1|ART_color()I74
2418 Eb||D5G1;|pin@5||B
2419 Ed||D5G1;|pin@6||B
2420 Eg||D5G1;|pin@7||I
2421 Es||D5G1;|pin@4||B
2422 X
2423
2424 # Cell PMOS4f_high;1{sch}
2425 CPMOS4f_high;1{sch}||schematic|1021415734000|1159313486964||ATTR_Delay(D5G1;HNPX-8.5;Y-1.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y0.25;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y2;)S3|ATTR_CDL_template(D5G1;NTX0.5;Y-15;)SM$(node_name) $(d) $(g) $(s) $(b) pch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-13;)StransistorType  VTH-P-Transistor|ATTR_SPICE_template(D5G1;NTX0.5;Y-9;)SM$(node_name) $(d) $(g) $(s) $(b) pch_hvt W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX1;Y-17;)SM$(node_name) $(d) $(g) $(s) $(b) pch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX1;Y-7;)SM$(node_name) $(d) $(g) $(s) $(b) pch_hvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-11;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
2426 IPMOS4f_high;1{ic}|PMOS4f@0||17.25|10.5|||D0G4;|ATTR_Delay(D5G1;NPX3.75;Y-2.25;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.25;Y-0.25;)S2|ATTR_W(D5FLeave alone;G1;NOLPX3;Y1;)S3
2427 Ngeneric:Facet-Center|art@0||0|0||||AV
2428 NOff-Page|conn@0||5|11.5||||
2429 NOff-Page|conn@1||5|8||||
2430 NOff-Page|conn@2||-12|7||||
2431 NOff-Page|conn@3||5|1||||
2432 NWire_Pin|pin@0||0|11.5||||
2433 NWire_Pin|pin@1||0|1||||
2434 Ngeneric:Invisible-Pin|pin@2||-1|24|||||ART_message(D5G6;)SPMOS4f_high
2435 Ngeneric:Invisible-Pin|pin@3||-1.5|18.5|||||ART_message(D5G2;)S4-terminal high-threshold PMOS device
2436 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3.5;)Spch_hvt
2437 Awire|net@0|||0|pmos4p@0|g|-3|7|conn@2|y|-10|7
2438 Awire|net@1|||1800|pin@0||0|11.5|conn@0|a|3|11.5
2439 Awire|net@2|||2700|pmos4p@0|s|0|9|pin@0||0|11.5
2440 Awire|net@3|||1800|pmos4p@0|b|0|8|conn@1|a|3|8
2441 Awire|net@4|||0|conn@3|a|3|1|pin@1||0|1
2442 Awire|net@5|||2700|pin@1||0|1|pmos4p@0|d|0|5
2443 Eb||D5G2;|conn@1|y|B
2444 Ed||D5G2;|conn@3|y|B
2445 Eg||D5G2;|conn@2|a|I
2446 Es||D5G2;|conn@0|y|B
2447 X
2448
2449 # Cell PMOS4f_io18;1{ic}
2450 CPMOS4f_io18;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S4|ATTR_W(D5FLeave alone;G1;HNOLPX3;Y1;)S3|prototype_center()I[0,0]
2451 Ngeneric:Facet-Center|art@0||0|0||||AV
2452 NThick-Circle|art@1||-2.5|0|1|1|||ART_color()I74
2453 NPin|pin@0||-0.5|0.25|1|1|YRR|
2454 NPin|pin@1||-0.5|0.75|1|1|YRR|
2455 NPin|pin@2||-0.75|0.5|1|1|Y|
2456 NPin|pin@3||0|0.5||||
2457 Ngeneric:Invisible-Pin|pin@4||0|2||||
2458 Ngeneric:Invisible-Pin|pin@5||0|0.5||||
2459 Nschematic:Bus_Pin|pin@6||0|-2|-2|-2||
2460 Nschematic:Bus_Pin|pin@7||-3.5|0|-2|-2||
2461 NPin|pin@8||0|1||||
2462 NPin|pin@9||-0.75|1|1|1||
2463 NPin|pin@10||-0.75|-1|1|1||
2464 NPin|pin@11||0|-1||||
2465 NPin|pin@12||0|-2||||
2466 NPin|pin@13||-3.5|0|||RR|
2467 NPin|pin@14||-3|0|1|1|RR|
2468 NPin|pin@15||0|2||||
2469 NPin|pin@16||-2|-1|1|1||
2470 NPin|pin@17||-2|1|1|1||
2471 Ngeneric:Invisible-Pin|pin@18||-2.25|1.75|||||ART_message(D5G1;)S1.8V
2472 AThicker|net@0|||FS3150|pin@0||-0.5|0.25|pin@2||-0.75|0.5|ART_color()I74
2473 AThicker|net@1|||FS450|pin@1||-0.5|0.75|pin@2||-0.75|0.5|ART_color()I74
2474 AThicker|net@2|||FS0|pin@3||0|0.5|pin@2||-0.75|0.5|ART_color()I74
2475 AThicker|net@3|||FS0|pin@8||0|1|pin@9||-0.75|1|ART_color()I74
2476 AThicker|net@4|||FS1800|pin@10||-0.75|-1|pin@11||0|-1|ART_color()I74
2477 AThicker|net@5|||FS1800|pin@13||-3.5|0|pin@14||-3|0|ART_color()I74
2478 AThicker|net@6|||FS2700|pin@8||0|1|pin@15||0|2|ART_color()I74
2479 AThicker|net@7|||FS900|pin@11||0|-1|pin@12||0|-2|ART_color()I74
2480 AThicker|net@8|||FS900|pin@9||-0.75|1|pin@10||-0.75|-1|ART_color()I74
2481 AThicker|net@9|||FS900|pin@17||-2|1|pin@16||-2|-1|ART_color()I74
2482 Eb||D5G1;|pin@5||B
2483 Ed||D5G1;|pin@6||B
2484 Eg||D5G1;|pin@7||I
2485 Es||D5G1;|pin@4||B
2486 X
2487
2488 # Cell PMOS4f_io18;1{sch}
2489 CPMOS4f_io18;1{sch}||schematic|1021415734000|1159313469323||ATTR_Delay(D5G1;HNPX-8.5;Y-1.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y0.25;)S4|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y2;)S3|ATTR_CDL_template(D5G1;NTX1;Y-15.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch_18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-13;)StransistorType  OD18-P-Transistor|ATTR_SPICE_template(D5G1;NTX3.5;Y-9;)SM$(node_name) $(d) $(g) $(s) $(b) pch_18 W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX1.5;Y-17.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch_18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX1;Y-7;)SM$(node_name) $(d) $(g) $(s) $(b) pch_18 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-11;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
2490 IPMOS4f_io18;1{ic}|PMOS4f@0||23.25|11.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S4|ATTR_W(D5FLeave alone;G1;NOLPX3;Y1;)S3
2491 Ngeneric:Facet-Center|art@0||0|0||||AV
2492 NOff-Page|conn@0||5|11.5||||
2493 NOff-Page|conn@1||5|8||||
2494 NOff-Page|conn@2||-12|7||||
2495 NOff-Page|conn@3||5|1||||
2496 NWire_Pin|pin@0||0|11.5||||
2497 NWire_Pin|pin@1||0|1||||
2498 Ngeneric:Invisible-Pin|pin@2||-1|27|||||ART_message(D5G6;)SPMOS4f_io18
2499 Ngeneric:Invisible-Pin|pin@3||-1.5|21.5|||||ART_message(D5G2;)S4-terminal PMOS device for 1.8V I/O pads
2500 Ngeneric:Invisible-Pin|pin@4||-1|17.5|||||ART_message(D5G2;)Sminimum length for 1.8V thick-oxide devices is 4
2501 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X2;Y-3.5;)Spch_18
2502 Awire|net@0|||0|pmos4p@0|g|-3|7|conn@2|y|-10|7
2503 Awire|net@1|||1800|pin@0||0|11.5|conn@0|a|3|11.5
2504 Awire|net@2|||2700|pmos4p@0|s|0|9|pin@0||0|11.5
2505 Awire|net@3|||1800|pmos4p@0|b|0|8|conn@1|a|3|8
2506 Awire|net@4|||0|conn@3|a|3|1|pin@1||0|1
2507 Awire|net@5|||2700|pin@1||0|1|pmos4p@0|d|0|5
2508 Eb||D5G2;|conn@1|y|B
2509 Ed||D5G2;|conn@3|y|B
2510 Eg||D5G2;|conn@2|a|I
2511 Es||D5G2;|conn@0|y|B
2512 X
2513
2514 # Cell PMOS4f_io25;1{ic}
2515 CPMOS4f_io25;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S5.6|ATTR_W(D5FLeave alone;G1;HNOLPX3;Y1;)S3|prototype_center()I[0,0]
2516 Ngeneric:Facet-Center|art@0||0|0||||AV
2517 NThick-Circle|art@1||-2.5|0|1|1|||ART_color()I74
2518 NPin|pin@0||-0.5|0.25|1|1|YRR|
2519 NPin|pin@1||-0.5|0.75|1|1|YRR|
2520 NPin|pin@2||-0.75|0.5|1|1|Y|
2521 NPin|pin@3||0|0.5||||
2522 Ngeneric:Invisible-Pin|pin@4||0|2||||
2523 Ngeneric:Invisible-Pin|pin@5||0|0.5||||
2524 Nschematic:Bus_Pin|pin@6||0|-2|-2|-2||
2525 Nschematic:Bus_Pin|pin@7||-3.5|0|-2|-2||
2526 NPin|pin@8||0|1||||
2527 NPin|pin@9||-0.75|1|1|1||
2528 NPin|pin@10||-0.75|-1|1|1||
2529 NPin|pin@11||0|-1||||
2530 NPin|pin@12||0|-2||||
2531 NPin|pin@13||-3.5|0|||RR|
2532 NPin|pin@14||-3|0|1|1|RR|
2533 NPin|pin@15||0|2||||
2534 NPin|pin@16||-2|-1|1|1||
2535 NPin|pin@17||-2|1|1|1||
2536 Ngeneric:Invisible-Pin|pin@18||-2.25|1.75|||||ART_message(D5G1;)S2.5V
2537 AThicker|net@0|||FS1350|pin@2||-0.75|0.5|pin@0||-0.5|0.25|ART_color()I74
2538 AThicker|net@1|||FS2250|pin@2||-0.75|0.5|pin@1||-0.5|0.75|ART_color()I74
2539 AThicker|net@2|||FS1800|pin@2||-0.75|0.5|pin@3||0|0.5|ART_color()I74
2540 AThicker|net@3|||FS1800|pin@9||-0.75|1|pin@8||0|1|ART_color()I74
2541 AThicker|net@4|||FS0|pin@11||0|-1|pin@10||-0.75|-1|ART_color()I74
2542 AThicker|net@5|||FS0|pin@14||-3|0|pin@13||-3.5|0|ART_color()I74
2543 AThicker|net@6|||FS900|pin@15||0|2|pin@8||0|1|ART_color()I74
2544 AThicker|net@7|||FS2700|pin@12||0|-2|pin@11||0|-1|ART_color()I74
2545 AThicker|net@8|||FS2700|pin@10||-0.75|-1|pin@9||-0.75|1|ART_color()I74
2546 AThicker|net@9|||FS2700|pin@16||-2|-1|pin@17||-2|1|ART_color()I74
2547 Eb||D5G1;|pin@5||B
2548 Ed||D5G1;|pin@6||B
2549 Eg||D5G1;|pin@7||I
2550 Es||D5G1;|pin@4||B
2551 X
2552
2553 # Cell PMOS4f_io25;1{sch}
2554 CPMOS4f_io25;1{sch}||schematic|1021415734000|1159313450692||ATTR_Delay(D5G1;HNPX-8.5;Y-1.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y0.25;)S5.6|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y2;)S3|ATTR_CDL_template(D5G1;NTX0.5;Y-15.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch_25 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-13;)StransistorType  OD25-P-Transistor|ATTR_SPICE_template(D5G1;NTX3.5;Y-9;)SM$(node_name) $(d) $(g) $(s) $(b) pch_25 W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX1;Y-17.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch_25 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX1;Y-7;)SM$(node_name) $(d) $(g) $(s) $(b) pch_25 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-11;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
2555 IPMOS4f_io25;1{ic}|PMOS4f@0||23.25|11.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S5.6|ATTR_W(D5FLeave alone;G1;NOLPX3;Y1;)S3
2556 Ngeneric:Facet-Center|art@0||0|0||||AV
2557 NOff-Page|conn@0||5|11.5||||
2558 NOff-Page|conn@1||5|8||||
2559 NOff-Page|conn@2||-12|7||||
2560 NOff-Page|conn@3||5|1||||
2561 NWire_Pin|pin@0||0|11.5||||
2562 NWire_Pin|pin@1||0|1||||
2563 Ngeneric:Invisible-Pin|pin@2||-1|27|||||ART_message(D5G6;)SPMOS4f_io25
2564 Ngeneric:Invisible-Pin|pin@3||-1.5|21.5|||||ART_message(D5G2;)S4-terminal PMOS device for 2.5V I/O pads
2565 Ngeneric:Invisible-Pin|pin@4||-1|17.5|||||ART_message(D5G2;)Sminimum length for 2.5V thick-oxide devices is 5.6
2566 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-4;)Spch_25
2567 Awire|net@0|||1800|conn@2|y|-10|7|pmos4p@0|g|-3|7
2568 Awire|net@1|||0|conn@0|a|3|11.5|pin@0||0|11.5
2569 Awire|net@2|||900|pin@0||0|11.5|pmos4p@0|s|0|9
2570 Awire|net@3|||0|conn@1|a|3|8|pmos4p@0|b|0|8
2571 Awire|net@4|||1800|pin@1||0|1|conn@3|a|3|1
2572 Awire|net@5|||900|pmos4p@0|d|0|5|pin@1||0|1
2573 Eb||D5G2;|conn@1|y|B
2574 Ed||D5G2;|conn@3|y|B
2575 Eg||D5G2;|conn@2|a|I
2576 Es||D5G2;|conn@0|y|B
2577 X
2578
2579 # Cell PMOS4f_io33;1{ic}
2580 CPMOS4f_io33;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S7.6|ATTR_W(D5FLeave alone;G1;HNOLPX3;Y1;)S3|prototype_center()I[0,0]
2581 Ngeneric:Facet-Center|art@0||0|0||||AV
2582 NThick-Circle|art@1||-2.5|0|1|1|||ART_color()I74
2583 NPin|pin@0||-0.5|0.25|1|1|YRR|
2584 NPin|pin@1||-0.5|0.75|1|1|YRR|
2585 NPin|pin@2||-0.75|0.5|1|1|Y|
2586 NPin|pin@3||0|0.5||||
2587 Ngeneric:Invisible-Pin|pin@4||0|2||||
2588 Ngeneric:Invisible-Pin|pin@5||0|0.5||||
2589 Nschematic:Bus_Pin|pin@6||0|-2|-2|-2||
2590 Nschematic:Bus_Pin|pin@7||-3.5|0|-2|-2||
2591 NPin|pin@8||0|1||||
2592 NPin|pin@9||-0.75|1|1|1||
2593 NPin|pin@10||-0.75|-1|1|1||
2594 NPin|pin@11||0|-1||||
2595 NPin|pin@12||0|-2||||
2596 NPin|pin@13||-3.5|0|||RR|
2597 NPin|pin@14||-3|0|1|1|RR|
2598 NPin|pin@15||0|2||||
2599 NPin|pin@16||-2|-1|1|1||
2600 NPin|pin@17||-2|1|1|1||
2601 Ngeneric:Invisible-Pin|pin@18||-2.25|1.75|||||ART_message(D5G1;)S3.3V
2602 AThicker|net@0|||FS3150|pin@0||-0.5|0.25|pin@2||-0.75|0.5|ART_color()I74
2603 AThicker|net@1|||FS450|pin@1||-0.5|0.75|pin@2||-0.75|0.5|ART_color()I74
2604 AThicker|net@2|||FS0|pin@3||0|0.5|pin@2||-0.75|0.5|ART_color()I74
2605 AThicker|net@3|||FS0|pin@8||0|1|pin@9||-0.75|1|ART_color()I74
2606 AThicker|net@4|||FS1800|pin@10||-0.75|-1|pin@11||0|-1|ART_color()I74
2607 AThicker|net@5|||FS1800|pin@13||-3.5|0|pin@14||-3|0|ART_color()I74
2608 AThicker|net@6|||FS2700|pin@8||0|1|pin@15||0|2|ART_color()I74
2609 AThicker|net@7|||FS900|pin@11||0|-1|pin@12||0|-2|ART_color()I74
2610 AThicker|net@8|||FS900|pin@9||-0.75|1|pin@10||-0.75|-1|ART_color()I74
2611 AThicker|net@9|||FS900|pin@17||-2|1|pin@16||-2|-1|ART_color()I74
2612 Eb||D5G1;|pin@5||B
2613 Ed||D5G1;|pin@6||B
2614 Eg||D5G1;|pin@7||I
2615 Es||D5G1;|pin@4||B
2616 X
2617
2618 # Cell PMOS4f_io33;1{sch}
2619 CPMOS4f_io33;1{sch}||schematic|1021415734000|1159313431087||ATTR_Delay(D5G1;HNPX-8.5;Y-1.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y0.25;)S7.6|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y2;)S3|ATTR_CDL_template(D5G1;NTX0.5;Y-15.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch_33 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-13;)StransistorType  OD33-P-Transistor|ATTR_SPICE_template(D5G1;NTX3.5;Y-9;)SM$(node_name) $(d) $(g) $(s) $(b) pch_33 W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX1;Y-17.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch_33 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX1;Y-7;)SM$(node_name) $(d) $(g) $(s) $(b) pch_33 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-11;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
2620 IPMOS4f_io33;1{ic}|PMOS4f@0||23.25|11.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S7.6|ATTR_W(D5FLeave alone;G1;NOLPX3;Y1;)S3
2621 Ngeneric:Facet-Center|art@0||0|0||||AV
2622 NOff-Page|conn@0||5|11.5||||
2623 NOff-Page|conn@1||5|8||||
2624 NOff-Page|conn@2||-12|7||||
2625 NOff-Page|conn@3||5|1||||
2626 NWire_Pin|pin@0||0|11.5||||
2627 NWire_Pin|pin@1||0|1||||
2628 Ngeneric:Invisible-Pin|pin@2||-1|27|||||ART_message(D5G6;)SPMOS4f_io33
2629 Ngeneric:Invisible-Pin|pin@3||-1.5|21.5|||||ART_message(D5G2;)S4-terminal PMOS device for 3.3V I/O pads
2630 Ngeneric:Invisible-Pin|pin@4||-1|17.5|||||ART_message(D5G2;)Sminimum length for 3.3V thick-oxide devices is 7.6
2631 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3.5;)Spch_33
2632 Awire|net@0|||0|pmos4p@0|g|-3|7|conn@2|y|-10|7
2633 Awire|net@1|||1800|pin@0||0|11.5|conn@0|a|3|11.5
2634 Awire|net@2|||2700|pmos4p@0|s|0|9|pin@0||0|11.5
2635 Awire|net@3|||1800|pmos4p@0|b|0|8|conn@1|a|3|8
2636 Awire|net@4|||0|conn@3|a|3|1|pin@1||0|1
2637 Awire|net@5|||2700|pin@1||0|1|pmos4p@0|d|0|5
2638 Eb||D5G2;|conn@1|y|B
2639 Ed||D5G2;|conn@3|y|B
2640 Eg||D5G2;|conn@2|a|I
2641 Es||D5G2;|conn@0|y|B
2642 X
2643
2644 # Cell PMOS4f_low;1{ic}
2645 CPMOS4f_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,0]
2646 Ngeneric:Facet-Center|art@0||0|0||||AV
2647 NThick-Circle|art@1||-1.5|0|1|1|||ART_color()I74
2648 NPin|pin@0||-0.5|0.25|1|1|YRR|
2649 NPin|pin@1||-0.5|0.75|1|1|YRR|
2650 NPin|pin@2||-0.75|0.5|1|1|Y|
2651 NPin|pin@3||0|0.5||||
2652 Ngeneric:Invisible-Pin|pin@4||0|2||||
2653 Ngeneric:Invisible-Pin|pin@5||0|0.5||||
2654 Nschematic:Bus_Pin|pin@6||0|-2|-2|-2||
2655 Nschematic:Bus_Pin|pin@7||-2.5|0|-2|-2||
2656 NPin|pin@8||0|1||||
2657 NPin|pin@9||-0.75|1|1|1||
2658 NPin|pin@10||-0.75|-1|1|1||
2659 NPin|pin@11||0|-1||||
2660 NPin|pin@12||0|-2||||
2661 NPin|pin@13||-2.5|0|||RR|
2662 NPin|pin@14||-2|0|1|1|RR|
2663 NPin|pin@15||0|2||||
2664 NPin|pin@16||-1|-1|1|1||
2665 NPin|pin@17||-1|1|1|1||
2666 AThicker|net@0|||FS3150|pin@0||-0.5|0.25|pin@2||-0.75|0.5|ART_color()I74
2667 AThicker|net@1|||FS450|pin@1||-0.5|0.75|pin@2||-0.75|0.5|ART_color()I74
2668 AThicker|net@2|||FS0|pin@3||0|0.5|pin@2||-0.75|0.5|ART_color()I74
2669 AThicker|net@3|||FS0|pin@8||0|1|pin@9||-0.75|1|ART_color()I74
2670 AThicker|net@4|||FS1800|pin@10||-0.75|-1|pin@11||0|-1|ART_color()I74
2671 AThicker|net@5|||FS1800|pin@13||-2.5|0|pin@14||-2|0|ART_color()I74
2672 AThicker|net@6|||FS2700|pin@8||0|1|pin@15||0|2|ART_color()I74
2673 AThicker|net@7|||FS900|pin@11||0|-1|pin@12||0|-2|ART_color()I74
2674 AThicker|net@8|||FS900|pin@9||-0.75|1|pin@10||-0.75|-1|ART_color()I74
2675 AThicker|net@9|||FS900|pin@17||-1|1|pin@16||-1|-1|ART_color()I74
2676 Eb||D5G1;|pin@5||B
2677 Ed||D5G1;|pin@6||B
2678 Eg||D5G1;|pin@7||I
2679 Es||D5G1;|pin@4||B
2680 X
2681
2682 # Cell PMOS4f_low;1{sch}
2683 CPMOS4f_low;1{sch}||schematic|1021415734000|1158015601561||ATTR_Delay(D5G1;HNPX-8.5;Y-1.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y0.25;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y2;)S3|ATTR_CDL_template(D5G1;NTX1;Y-15;)SM$(node_name) $(d) $(g) $(s) $(b) pch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-13;)StransistorType  VTL-P-Transistor|ATTR_SPICE_template(D5G1;NTX3.5;Y-9;)SM$(node_name) $(d) $(g) $(s) $(b) pch_lvt W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX1.5;Y-17;)SM$(node_name) $(d) $(g) $(s) $(b) pch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX1;Y-7;)SM$(node_name) $(d) $(g) $(s) $(b) pch_lvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-11;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
2684 IPMOS4f_low;1{ic}|PMOS4f@0||17.25|10.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
2685 Ngeneric:Facet-Center|art@0||0|0||||AV
2686 NOff-Page|conn@0||5|11.5||||
2687 NOff-Page|conn@1||5|8||||
2688 NOff-Page|conn@2||-12|7||||
2689 NOff-Page|conn@3||5|1||||
2690 NWire_Pin|pin@0||0|11.5||||
2691 NWire_Pin|pin@1||0|1||||
2692 Ngeneric:Invisible-Pin|pin@2||-1|24|||||ART_message(D5G6;)SPMOS4f_low
2693 Ngeneric:Invisible-Pin|pin@3||-1.5|18.5|||||ART_message(D5G2;)S4-terminal low-threshold PMOS device
2694 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Spch_lvt
2695 Awire|net@0|||0|pmos4p@0|g|-3|7|conn@2|y|-10|7
2696 Awire|net@1|||1800|pin@0||0|11.5|conn@0|a|3|11.5
2697 Awire|net@2|||2700|pmos4p@0|s|0|9|pin@0||0|11.5
2698 Awire|net@3|||1800|pmos4p@0|b|0|8|conn@1|a|3|8
2699 Awire|net@4|||0|conn@3|a|3|1|pin@1||0|1
2700 Awire|net@5|||2700|pin@1||0|1|pmos4p@0|d|0|5
2701 Eb||D5G2;|conn@1|y|B
2702 Ed||D5G2;|conn@3|y|B
2703 Eg||D5G2;|conn@2|a|I
2704 Es||D5G2;|conn@0|y|B
2705 X
2706
2707 # Cell PMOS4fwk;1{ic}
2708 CPMOS4fwk;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,0]
2709 Ngeneric:Facet-Center|art@0||0|0||||AV
2710 NThick-Circle|art@1||-1.5|0|0.5|0.5|RR||ART_color()I74
2711 Nschematic:Bus_Pin|pin@0||0|0.5||||
2712 NPin|pin@1||-0.75|0.5|1|1|Y|
2713 NPin|pin@2||0|0.5||||
2714 NPin|pin@3||-0.5|0.25|1|1|YRR|
2715 NPin|pin@4||-0.75|0.5|1|1|Y|
2716 NPin|pin@5||-0.5|0.75|1|1|YRR|
2717 NPin|pin@6||-0.75|0.5|1|1|Y|
2718 NPin|pin@7||-1.25|-0.75|1|1|Y|
2719 NPin|pin@8||-1.25|0.75|1|1|Y|
2720 NPin|pin@9||0|2||||
2721 NPin|pin@10||-1.75|0|1|1|RRR|
2722 NPin|pin@11||-3|0|||RR|
2723 NPin|pin@12||0|-2||||
2724 NPin|pin@13||0|-0.75||||
2725 NPin|pin@14||-0.75|-0.75|1|1||
2726 NPin|pin@15||-0.75|0.75|1|1||
2727 NPin|pin@16||0|0.75||||
2728 Nschematic:Bus_Pin|pin@17||-3|0|-2|-2||
2729 Nschematic:Bus_Pin|pin@18||0|-2|-2|-2||
2730 Ngeneric:Invisible-Pin|pin@19||0|2||||
2731 Ngeneric:Invisible-Pin|pin@20||-0.5|0|||||ART_message(D5G1;)S[wk]
2732 AThicker|net@0|||FS0|pin@2||0|0.5|pin@1||-0.75|0.5|ART_color()I74
2733 AThicker|net@1|||FS3150|pin@3||-0.5|0.25|pin@4||-0.75|0.5|ART_color()I74
2734 AThicker|net@2|||FS450|pin@5||-0.5|0.75|pin@6||-0.75|0.5|ART_color()I74
2735 AThicker|net@3|||FS2700|pin@7||-1.25|-0.75|pin@8||-1.25|0.75|ART_color()I74
2736 AThicker|net@4|||FS900|pin@15||-0.75|0.75|pin@14||-0.75|-0.75|ART_color()I74
2737 AThicker|net@5|||FS900|pin@13||0|-0.75|pin@12||0|-2|ART_color()I74
2738 AThicker|net@6|||FS2700|pin@16||0|0.75|pin@9||0|2|ART_color()I74
2739 AThicker|net@7|||FS1800|pin@11||-3|0|pin@10||-1.75|0|ART_color()I74
2740 AThicker|net@8|||FS1800|pin@14||-0.75|-0.75|pin@13||0|-0.75|ART_color()I74
2741 AThicker|net@9|||FS0|pin@16||0|0.75|pin@15||-0.75|0.75|ART_color()I74
2742 Eb||D5G1;|pin@0||B
2743 Ed||D8G1;|pin@18||B
2744 Eg||D6G1;|pin@17||I
2745 Es||D2G1;|pin@19||B
2746 X
2747
2748 # Cell PMOS4fwk;1{sch}
2749 CPMOS4fwk;1{sch}||schematic|1021415734000|1159313551113||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y3;)S3|ATTR_CDL_template(D5G1;NTX-2;Y-12.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template(D5G1;NTX-2;Y-8;)SM$(node_name) $(d) $(g) $(s) $(b) pch W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-1.5;Y-14.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-5.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-2.5;Y-10;)Srtranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
2750 IPMOS4fwk;1{ic}|PMOS4fwk@0||23.25|13.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
2751 Ngeneric:Facet-Center|art@0||0|0||||AV
2752 NOff-Page|conn@0||5|8||||
2753 NOff-Page|conn@1||5|1||||
2754 NOff-Page|conn@2||-8|7||||
2755 NOff-Page|conn@3||5|11.5||||
2756 Ngeneric:Invisible-Pin|pin@0||-1.5|19.5|||||ART_message(D5G2;)S4-terminal standard threshold weak PMOS device
2757 Ngeneric:Invisible-Pin|pin@1||-1|26|||||ART_message(D5G6;)SPMOS4fwk
2758 NWire_Pin|pin@2||0|1||||
2759 NWire_Pin|pin@3||0|11.5||||
2760 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X2;Y-3;)Spch|SIM_weak_node(D5G1;)SWeak
2761 Awire|net@0|||1800|pmos4p@0|b|0|8|conn@0|a|3|8
2762 Awire|net@1|||1800|conn@2|y|-6|7|pmos4p@0|g|-3|7
2763 Awire|net@2|||2700|pin@2||0|1|pmos4p@0|d|0|5
2764 Awire|net@3|||0|conn@1|a|3|1|pin@2||0|1
2765 Awire|net@4|||2700|pmos4p@0|s|0|9|pin@3||0|11.5
2766 Awire|net@5|||1800|pin@3||0|11.5|conn@3|a|3|11.5
2767 Eb||D5G2;|conn@0|y|B
2768 Ed||D5G2;|conn@1|y|B
2769 Eg||D5G2;|conn@2|a|I
2770 Es||D5G2;|conn@3|y|B
2771 X
2772
2773 # Cell PMOS4fwk_high;1{ic}
2774 CPMOS4fwk_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,0]
2775 Ngeneric:Facet-Center|art@0||0|0||||AV
2776 NThick-Circle|art@1||-1.75|0|0.5|0.5|RR||ART_color()I74
2777 Nschematic:Bus_Pin|pin@0||0|0.5||||
2778 NPin|pin@1||-0.75|0.5|1|1|Y|
2779 NPin|pin@2||0|0.5||||
2780 NPin|pin@3||-0.5|0.25|1|1|YRR|
2781 NPin|pin@4||-0.75|0.5|1|1|Y|
2782 NPin|pin@5||-0.5|0.75|1|1|YRR|
2783 NPin|pin@6||-0.75|0.5|1|1|Y|
2784 NPin|pin@7||-1.5|-0.75|1|1|Y|
2785 NPin|pin@8||-1.5|0.75|1|1|Y|
2786 NPin|pin@9||0|2||||
2787 NPin|pin@10||-2|0|1|1|RRR|
2788 NPin|pin@11||-3|0|||RR|
2789 NPin|pin@12||0|-2||||
2790 NPin|pin@13||0|-0.75||||
2791 NPin|pin@14||-0.75|-0.75|1|1||
2792 NPin|pin@15||-0.75|0.75|1|1||
2793 NPin|pin@16||0|0.75||||
2794 Nschematic:Bus_Pin|pin@17||-3|0|-2|-2||
2795 Nschematic:Bus_Pin|pin@18||0|-2|-2|-2||
2796 Ngeneric:Invisible-Pin|pin@19||0|2||||
2797 Ngeneric:Invisible-Pin|pin@20||-0.5|0|||||ART_message(D5G1;)S[wk]
2798 AThicker|net@0|||FS0|pin@2||0|0.5|pin@1||-0.75|0.5|ART_color()I74
2799 AThicker|net@1|||FS3150|pin@3||-0.5|0.25|pin@4||-0.75|0.5|ART_color()I74
2800 AThicker|net@2|||FS450|pin@5||-0.5|0.75|pin@6||-0.75|0.5|ART_color()I74
2801 AThicker|net@3|||FS2700|pin@7||-1.5|-0.75|pin@8||-1.5|0.75|ART_color()I74
2802 AThicker|net@4|||FS900|pin@15||-0.75|0.75|pin@14||-0.75|-0.75|ART_color()I74
2803 AThicker|net@5|||FS900|pin@13||0|-0.75|pin@12||0|-2|ART_color()I74
2804 AThicker|net@6|||FS2700|pin@16||0|0.75|pin@9||0|2|ART_color()I74
2805 AThicker|net@7|||FS1800|pin@11||-3|0|pin@10||-2|0|ART_color()I74
2806 AThicker|net@8|||FS1800|pin@14||-0.75|-0.75|pin@13||0|-0.75|ART_color()I74
2807 AThicker|net@9|||FS0|pin@16||0|0.75|pin@15||-0.75|0.75|ART_color()I74
2808 Eb||D5G1;|pin@0||B
2809 Ed||D8G1;|pin@18||B
2810 Eg||D6G1;|pin@17||I
2811 Es||D2G1;|pin@19||B
2812 X
2813
2814 # Cell PMOS4fwk_high;1{sch}
2815 CPMOS4fwk_high;1{sch}||schematic|1021415734000|1159313533312||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y3;)S3|ATTR_CDL_template(D5G1;NTX-0.5;Y-14;)SM$(node_name) $(d) $(g) $(s) $(b) pch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTY-12;)StransistorType  VTH-P-Transistor|ATTR_SPICE_template(D5G1;NTX1.5;Y-8;)SM$(node_name) $(d) $(g) $(s) $(b) pch_hvt W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTY-16;)SM$(node_name) $(d) $(g) $(s) $(b) pch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-5.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch_hvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-3;Y-10;)Srtranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
2816 IPMOS4fwk_high;1{ic}|PMOS4fwk@0||23.25|13.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
2817 Ngeneric:Facet-Center|art@0||0|0||||AV
2818 NOff-Page|conn@0||5|8||||
2819 NOff-Page|conn@1||5|1||||
2820 NOff-Page|conn@2||-8|7||||
2821 NOff-Page|conn@3||5|11.5||||
2822 Ngeneric:Invisible-Pin|pin@0||-1.5|19.5|||||ART_message(D5G2;)S4-terminal high-threshold weak PMOS device
2823 Ngeneric:Invisible-Pin|pin@1||-1|26|||||ART_message(D5G6;)SPMOS4wk_high
2824 NWire_Pin|pin@2||0|1||||
2825 NWire_Pin|pin@3||0|11.5||||
2826 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3.5;)Spch_hvt|SIM_weak_node(D5G1;)SWeak
2827 Awire|net@0|||1800|pmos4p@0|b|0|8|conn@0|a|3|8
2828 Awire|net@1|||1800|conn@2|y|-6|7|pmos4p@0|g|-3|7
2829 Awire|net@2|||2700|pin@2||0|1|pmos4p@0|d|0|5
2830 Awire|net@3|||0|conn@1|a|3|1|pin@2||0|1
2831 Awire|net@4|||2700|pmos4p@0|s|0|9|pin@3||0|11.5
2832 Awire|net@5|||1800|pin@3||0|11.5|conn@3|a|3|11.5
2833 Eb||D5G2;|conn@0|y|B
2834 Ed||D5G2;|conn@1|y|B
2835 Eg||D5G2;|conn@2|a|I
2836 Es||D5G2;|conn@3|y|B
2837 X
2838
2839 # Cell PMOS4fwk_low;1{ic}
2840 CPMOS4fwk_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[0,0]
2841 Ngeneric:Facet-Center|art@0||0|0||||AV
2842 NThick-Circle|art@1||-1.25|0|0.5|0.5|RR||ART_color()I74
2843 Nschematic:Bus_Pin|pin@0||0|0.5||||
2844 NPin|pin@1||-0.75|0.5|1|1|Y|
2845 NPin|pin@2||0|0.5||||
2846 NPin|pin@3||-0.5|0.25|1|1|YRR|
2847 NPin|pin@4||-0.75|0.5|1|1|Y|
2848 NPin|pin@5||-0.5|0.75|1|1|YRR|
2849 NPin|pin@6||-0.75|0.5|1|1|Y|
2850 NPin|pin@7||-1|-0.75|1|1|Y|
2851 NPin|pin@8||-1|0.75|1|1|Y|
2852 NPin|pin@9||0|2||||
2853 NPin|pin@10||-1.5|0|1|1|RRR|
2854 NPin|pin@11||-2.5|0|||RR|
2855 NPin|pin@12||0|-2||||
2856 NPin|pin@13||0|-0.75||||
2857 NPin|pin@14||-0.75|-0.75|1|1||
2858 NPin|pin@15||-0.75|0.75|1|1||
2859 NPin|pin@16||0|0.75||||
2860 Nschematic:Bus_Pin|pin@17||-2.5|0|-2|-2||
2861 Nschematic:Bus_Pin|pin@18||0|-2|-2|-2||
2862 Ngeneric:Invisible-Pin|pin@19||0|2||||
2863 Ngeneric:Invisible-Pin|pin@20||-0.5|0|||||ART_message(D5G1;)S[wk]
2864 AThicker|net@0|||FS0|pin@2||0|0.5|pin@1||-0.75|0.5|ART_color()I74
2865 AThicker|net@1|||FS3150|pin@3||-0.5|0.25|pin@4||-0.75|0.5|ART_color()I74
2866 AThicker|net@2|||FS450|pin@5||-0.5|0.75|pin@6||-0.75|0.5|ART_color()I74
2867 AThicker|net@3|||FS2700|pin@7||-1|-0.75|pin@8||-1|0.75|ART_color()I74
2868 AThicker|net@4|||FS900|pin@15||-0.75|0.75|pin@14||-0.75|-0.75|ART_color()I74
2869 AThicker|net@5|||FS900|pin@13||0|-0.75|pin@12||0|-2|ART_color()I74
2870 AThicker|net@6|||FS2700|pin@16||0|0.75|pin@9||0|2|ART_color()I74
2871 AThicker|net@7|||FS1800|pin@11||-2.5|0|pin@10||-1.5|0|ART_color()I74
2872 AThicker|net@8|||FS1800|pin@14||-0.75|-0.75|pin@13||0|-0.75|ART_color()I74
2873 AThicker|net@9|||FS0|pin@16||0|0.75|pin@15||-0.75|0.75|ART_color()I74
2874 Eb||D5G1;|pin@0||B
2875 Ed||D8G1;|pin@18||B
2876 Eg||D6G1;|pin@17||I
2877 Es||D2G1;|pin@19||B
2878 X
2879
2880 # Cell PMOS4fwk_low;1{sch}
2881 CPMOS4fwk_low;1{sch}||schematic|1021415734000|1159313568663||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y3;)S3|ATTR_CDL_template(D5G1;NTX-2;Y-14.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-2;Y-12;)StransistorType  VTL-P-Transistor|ATTR_SPICE_template(D5G1;NTX-2.5;Y-8;)SM$(node_name) $(d) $(g) $(s) $(b) pch_lvt W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-1.5;Y-16.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX-2;Y-5.5;)SM$(node_name) $(d) $(g) $(s) $(b) pch_lvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-3;Y-10;)Srtranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
2882 IPMOS4fwk_low;1{ic}|PMOS4fwk@0||23.25|13.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
2883 Ngeneric:Facet-Center|art@0||0|0||||AV
2884 NOff-Page|conn@0||5|8||||
2885 NOff-Page|conn@1||5|1||||
2886 NOff-Page|conn@2||-8|7||||
2887 NOff-Page|conn@3||5|11.5||||
2888 Ngeneric:Invisible-Pin|pin@0||-1.5|19.5|||||ART_message(D5G2;)S4-terminal low-threshold weak PMOS device
2889 Ngeneric:Invisible-Pin|pin@1||-1|26|||||ART_message(D5G6;)SPMOS4fwk_low
2890 NWire_Pin|pin@2||0|1||||
2891 NWire_Pin|pin@3||0|11.5||||
2892 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Spch_lvt|SIM_weak_node(D5G1;)SWeak
2893 Awire|net@0|||1800|pmos4p@0|b|0|8|conn@0|a|3|8
2894 Awire|net@1|||1800|conn@2|y|-6|7|pmos4p@0|g|-3|7
2895 Awire|net@2|||2700|pin@2||0|1|pmos4p@0|d|0|5
2896 Awire|net@3|||0|conn@1|a|3|1|pin@2||0|1
2897 Awire|net@4|||2700|pmos4p@0|s|0|9|pin@3||0|11.5
2898 Awire|net@5|||1800|pin@3||0|11.5|conn@3|a|3|11.5
2899 Eb||D5G2;|conn@0|y|B
2900 Ed||D5G2;|conn@1|y|B
2901 Eg||D5G2;|conn@2|a|I
2902 Es||D5G2;|conn@3|y|B
2903 X
2904
2905 # Cell PMOS4x;1{ic}
2906 CPMOS4x;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[-8000,16000]
2907 Ngeneric:Facet-Center|art@0||0|0||||AV
2908 NThick-Circle|art@1||-2|0|1|1|RR||ART_color()I10
2909 NPin|pin@0||0|0.5||||
2910 NPin|pin@1||-0.75|0.5|1|1|Y|
2911 NPin|pin@2||-0.75|0.5|1|1|Y|
2912 NPin|pin@3||-0.5|0.25|1|1|YRR|
2913 NPin|pin@4||-0.75|0.5|1|1|Y|
2914 NPin|pin@5||-0.5|0.75|1|1|YRR|
2915 Nschematic:Bus_Pin|pin@6||0|0.5||||
2916 NPin|pin@7||-1.5|-1|1|1|Y|
2917 NPin|pin@8||-1.5|1|1|1|Y|
2918 NPin|pin@9||0|2||||
2919 NPin|pin@10||-2.5|0|1|1|RRR|
2920 NPin|pin@11||-3|0|||RR|
2921 NPin|pin@12||0|-2||||
2922 NPin|pin@13||0|-1||||
2923 NPin|pin@14||-0.75|-1|1|1||
2924 NPin|pin@15||-0.75|1|1|1||
2925 NPin|pin@16||0|1||||
2926 Nschematic:Bus_Pin|pin@17||-3|0|-2|-2||
2927 Nschematic:Bus_Pin|pin@18||0|-2|-2|-2||
2928 Ngeneric:Invisible-Pin|pin@19||0|2||||
2929 AThicker|net@0|||FS3150|pin@3||-0.5|0.25|pin@2||-0.75|0.5|ART_color()I10
2930 AThicker|net@1|||FS450|pin@5||-0.5|0.75|pin@4||-0.75|0.5|ART_color()I10
2931 AThicker|net@2|||FS0|pin@0||0|0.5|pin@1||-0.75|0.5|ART_color()I10
2932 AThicker|net@3|||FS2700|pin@7||-1.5|-1|pin@8||-1.5|1|ART_color()I10
2933 AThicker|net@4|||FS900|pin@15||-0.75|1|pin@14||-0.75|-1|ART_color()I10
2934 AThicker|net@5|||FS900|pin@13||0|-1|pin@12||0|-2|ART_color()I10
2935 AThicker|net@6|||FS2700|pin@16||0|1|pin@9||0|2|ART_color()I10
2936 AThicker|net@7|||FS1800|pin@11||-3|0|pin@10||-2.5|0|ART_color()I10
2937 AThicker|net@8|||FS1800|pin@14||-0.75|-1|pin@13||0|-1|ART_color()I10
2938 AThicker|net@9|||FS0|pin@16||0|1|pin@15||-0.75|1|ART_color()I10
2939 Epower|b|D5G1;|pin@6||P
2940 Ed||D8G1;|pin@18||B
2941 Eg||D6G1;|pin@17||I
2942 Es||D2G1;|pin@19||B
2943 X
2944
2945 # Cell PMOS4x;1{sch}
2946 CPMOS4x;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S1|prototype_center()I[0,0]
2947 IPMOS4x;1{ic}|PMOS4@0||18.75|14|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
2948 IPMOS4f;1{ic}|PMOS4f@0||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : @X < 0.5 ? (0.5 * (2 - 0.4) / @X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 0.5 ? 6.0*@X : 3
2949 Ngeneric:Facet-Center|art@0||0|0||||AV
2950 NOff-Page|conn@0||12.5|7.5|||YRR|
2951 NOff-Page|conn@1||5|1||||
2952 NOff-Page|conn@2||-17.5|7||||
2953 NOff-Page|conn@3||5|11.5||||
2954 Ngeneric:Invisible-Pin|pin@0||-0.5|18.5|||||ART_message(D5G2;)S[4 terminal strength-based PMOS device]
2955 Ngeneric:Invisible-Pin|pin@1||-0.5|23.5|||||ART_message(D5G6;)SPMOS4x
2956 NWire_Pin|pin@2||0|1||||
2957 NWire_Pin|pin@3||0|11.5||||
2958 Awire|net@0|||1800|PMOS4f@0|b|0|7.5|conn@0|y|10.5|7.5
2959 Awire|net@1|||900|pin@3||0|11.5|PMOS4f@0|s|0|9
2960 Awire|net@2|||0|PMOS4f@0|g|-3|7|conn@2|y|-15.5|7
2961 Awire|net@3|||2700|pin@2||0|1|PMOS4f@0|d|0|5
2962 Awire|net@4|||0|conn@1|a|3|1|pin@2||0|1
2963 Awire|net@5|||1800|pin@3||0|11.5|conn@3|a|3|11.5
2964 Epower|b|D4G2;|conn@0|a|P
2965 Ed||D5G2;|conn@1|y|B
2966 Eg||D5G2;|conn@2|a|I
2967 Es||D5G2;|conn@3|y|B
2968 X
2969
2970 # Cell PMOS4x_io18;1{ic}
2971 CPMOS4x_io18;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[-8000,16000]
2972 Ngeneric:Facet-Center|art@0||0|0||||AV
2973 NThick-Circle|art@1||-2.5|0|1|1|RR||ART_color()I10
2974 Ngeneric:Invisible-Pin|pin@0||0|2||||
2975 Nschematic:Bus_Pin|pin@1||0|-2|-2|-2||
2976 Nschematic:Bus_Pin|pin@2||-3.5|0|-2|-2||
2977 NPin|pin@3||0|1||||
2978 NPin|pin@4||-0.75|1|1|1||
2979 NPin|pin@5||-0.75|-1|1|1||
2980 NPin|pin@6||0|-1||||
2981 NPin|pin@7||0|-2||||
2982 NPin|pin@8||-3.5|0|||RR|
2983 NPin|pin@9||-3|0|1|1|RRR|
2984 NPin|pin@10||0|2||||
2985 NPin|pin@11||-2|1|1|1|Y|
2986 NPin|pin@12||-2|-1|1|1|Y|
2987 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S1.8V
2988 Nschematic:Bus_Pin|pin@14||0|0.5|-2|-2||
2989 NPin|pin@15||0|0.5|1|1||
2990 NPin|pin@16||-0.75|0.5|1|1||
2991 NPin|pin@17||-0.5|0.75|1|1||
2992 NPin|pin@18||-0.5|0.25|1|1||
2993 AThicker|net@0|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I10
2994 AThicker|net@1|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I10
2995 AThicker|net@2|||FS1800|pin@8||-3.5|0|pin@9||-3|0|ART_color()I10
2996 AThicker|net@3|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I10
2997 AThicker|net@4|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I10
2998 AThicker|net@5|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I10
2999 AThicker|net@6|||FS2700|pin@12||-2|-1|pin@11||-2|1|ART_color()I10
3000 AThicker|net@7|||FS0|pin@15||0|0.5|pin@16||-0.75|0.5|ART_color()I10
3001 AThicker|net@9|||FS2250|pin@16||-0.75|0.5|pin@17||-0.5|0.75|ART_color()I10
3002 AThicker|net@10|||FS1350|pin@16||-0.75|0.5|pin@18||-0.5|0.25|ART_color()I10
3003 Eb||D8G1;Y-0.5;|pin@14||B
3004 Ed||D8G1;|pin@1||B
3005 Eg||D6G1;|pin@2||I
3006 Es||D2G1;|pin@0||B
3007 X
3008
3009 # Cell PMOS4x_io18;1{sch}
3010 CPMOS4x_io18;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S1|prototype_center()I[0,0]
3011 IPMOS4x_io18;1{ic}|PMOS@0||18.5|13|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
3012 IPMOS4f_io18;1{ic}|PMOSf@0||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : @X < 0.5 ? (0.5 * (4 - 0.4) / @X + 0.4) : 4|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 0.5 ? 6.0*@X : 3
3013 Ngeneric:Facet-Center|art@0||0|0||||AV
3014 NOff-Page|conn@0||5|11.5||||
3015 NOff-Page|conn@1||-9.5|7||||
3016 NOff-Page|conn@2||5|1||||
3017 NOff-Page|conn@3||5|7.5||||
3018 NWire_Pin|pin@1||0|11.5||||
3019 NWire_Pin|pin@2||0|1||||
3020 Ngeneric:Invisible-Pin|pin@3||-0.5|23.5|||||ART_message(D5G6;)SPMOS4x_io18
3021 Ngeneric:Invisible-Pin|pin@4||-0.5|18.5|||||ART_message(D5G2;)S4 terminal strength-based PMOS device for 1.8V I/O pads
3022 Awire|net@0|||0|PMOSf@0|g|-3.5|7|conn@1|y|-7.5|7
3023 Awire|net@1|||900|pin@1||0|11.5|PMOSf@0|s|0|9
3024 Awire|net@2|||2700|pin@2||0|1|PMOSf@0|d|0|5
3025 Awire|net@3|||1800|pin@1||0|11.5|conn@0|a|3|11.5
3026 Awire|net@4|||0|conn@2|a|3|1|pin@2||0|1
3027 Awire|net@8|||0|conn@3|a|3|7.5|PMOSf@0|b|0|7.5
3028 Eb||D5G2;|conn@3|y|B
3029 Ed||D5G2;|conn@2|y|B
3030 Eg||D5G2;|conn@1|a|I
3031 Es||D5G2;|conn@0|y|B
3032 X
3033
3034 # Cell PMOS4x_io25;1{ic}
3035 CPMOS4x_io25;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[-8000,16000]
3036 Ngeneric:Facet-Center|art@0||0|0||||AV
3037 NThick-Circle|art@1||-2.5|0|1|1|RR||ART_color()I10
3038 Ngeneric:Invisible-Pin|pin@0||0|2||||
3039 Nschematic:Bus_Pin|pin@1||0|-2|-2|-2||
3040 Nschematic:Bus_Pin|pin@2||-3.5|0|-2|-2||
3041 NPin|pin@3||0|1||||
3042 NPin|pin@4||-0.75|1|1|1||
3043 NPin|pin@5||-0.75|-1|1|1||
3044 NPin|pin@6||0|-1||||
3045 NPin|pin@7||0|-2||||
3046 NPin|pin@8||-3.5|0|||RR|
3047 NPin|pin@9||-3|0|1|1|RRR|
3048 NPin|pin@10||0|2||||
3049 NPin|pin@11||-2|1|1|1|Y|
3050 NPin|pin@12||-2|-1|1|1|Y|
3051 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S2.5V
3052 Nschematic:Bus_Pin|pin@14||0|0.5|-2|-2||
3053 NPin|pin@15||0|0.5|1|1||
3054 NPin|pin@16||-0.75|0.5|1|1||
3055 NPin|pin@17||-0.5|0.75|1|1||
3056 NPin|pin@18||-0.5|0.25|1|1||
3057 AThicker|net@0|||FS1800|pin@4||-0.75|1|pin@3||0|1|ART_color()I10
3058 AThicker|net@1|||FS0|pin@6||0|-1|pin@5||-0.75|-1|ART_color()I10
3059 AThicker|net@2|||FS0|pin@9||-3|0|pin@8||-3.5|0|ART_color()I10
3060 AThicker|net@3|||FS900|pin@10||0|2|pin@3||0|1|ART_color()I10
3061 AThicker|net@4|||FS2700|pin@7||0|-2|pin@6||0|-1|ART_color()I10
3062 AThicker|net@5|||FS2700|pin@5||-0.75|-1|pin@4||-0.75|1|ART_color()I10
3063 AThicker|net@6|||FS900|pin@11||-2|1|pin@12||-2|-1|ART_color()I10
3064 AThicker|net@7|||FS1800|pin@16||-0.75|0.5|pin@15||0|0.5|ART_color()I10
3065 AThicker|net@9|||FS450|pin@17||-0.5|0.75|pin@16||-0.75|0.5|ART_color()I10
3066 AThicker|net@10|||FS3150|pin@18||-0.5|0.25|pin@16||-0.75|0.5|ART_color()I10
3067 Eb||D8G1;Y-0.5;|pin@14||B
3068 Ed||D8G1;|pin@1||B
3069 Eg||D6G1;|pin@2||I
3070 Es||D2G1;|pin@0||B
3071 X
3072
3073 # Cell PMOS4x_io25;1{sch}
3074 CPMOS4x_io25;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S1|prototype_center()I[0,0]
3075 IPMOS4x_io25;1{ic}|PMOS@0||18.5|13|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
3076 IPMOS4f_io25;1{ic}|PMOSf@0||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : @X < 0.5 ? (0.5 * (5.6 - 0.4) / @X + 0.4) : 5.6|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 0.5 ? 6.0*@X : 3
3077 Ngeneric:Facet-Center|art@0||0|0||||AV
3078 NOff-Page|conn@0||7|11.5||||
3079 NOff-Page|conn@1||-9.5|7||||
3080 NOff-Page|conn@2||7|1||||
3081 NOff-Page|conn@3||7|7.5||||
3082 NWire_Pin|pin@1||0|11.5||||
3083 NWire_Pin|pin@2||0|1||||
3084 Ngeneric:Invisible-Pin|pin@3||-0.5|23.5|||||ART_message(D5G6;)SPMOS4x_io25
3085 Ngeneric:Invisible-Pin|pin@4||-0.5|18.5|||||ART_message(D5G2;)S4 terminal strength-based PMOS device for 2.5V I/O pads
3086 Awire|net@0|||0|PMOSf@0|g|-3.5|7|conn@1|y|-7.5|7
3087 Awire|net@1|||900|pin@1||0|11.5|PMOSf@0|s|0|9
3088 Awire|net@2|||2700|pin@2||0|1|PMOSf@0|d|0|5
3089 Awire|net@3|||0|conn@0|a|5|11.5|pin@1||0|11.5
3090 Awire|net@4|||1800|pin@2||0|1|conn@2|a|5|1
3091 Awire|net@8|||0|conn@3|a|5|7.5|PMOSf@0|b|0|7.5
3092 Eb||D5G2;|conn@3|y|B
3093 Ed||D5G2;|conn@2|y|B
3094 Eg||D5G2;|conn@1|a|I
3095 Es||D5G2;|conn@0|y|B
3096 X
3097
3098 # Cell PMOS4x_io33;1{ic}
3099 CPMOS4x_io33;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[-8000,16000]
3100 Ngeneric:Facet-Center|art@0||0|0||||AV
3101 NThick-Circle|art@1||-2.5|0|1|1|RR||ART_color()I10
3102 Ngeneric:Invisible-Pin|pin@0||0|2||||
3103 Nschematic:Bus_Pin|pin@1||0|-2|-2|-2||
3104 Nschematic:Bus_Pin|pin@2||-3.5|0|-2|-2||
3105 NPin|pin@3||0|1||||
3106 NPin|pin@4||-0.75|1|1|1||
3107 NPin|pin@5||-0.75|-1|1|1||
3108 NPin|pin@6||0|-1||||
3109 NPin|pin@7||0|-2||||
3110 NPin|pin@8||-3.5|0|||RR|
3111 NPin|pin@9||-3|0|1|1|RRR|
3112 NPin|pin@10||0|2||||
3113 NPin|pin@11||-2|1|1|1|Y|
3114 NPin|pin@12||-2|-1|1|1|Y|
3115 Ngeneric:Invisible-Pin|pin@13||-2.25|1.75|||||ART_message(D5G1;)S3.3V
3116 Nschematic:Bus_Pin|pin@14||0|0.5|-2|-2||
3117 NPin|pin@15||0|0.5|1|1||
3118 NPin|pin@16||-0.75|0.5|1|1||
3119 NPin|pin@17||-0.5|0.75|1|1||
3120 NPin|pin@18||-0.5|0.25|1|1||
3121 AThicker|net@0|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I10
3122 AThicker|net@1|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I10
3123 AThicker|net@2|||FS1800|pin@8||-3.5|0|pin@9||-3|0|ART_color()I10
3124 AThicker|net@3|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I10
3125 AThicker|net@4|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I10
3126 AThicker|net@5|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I10
3127 AThicker|net@6|||FS2700|pin@12||-2|-1|pin@11||-2|1|ART_color()I10
3128 AThicker|net@7|||FS0|pin@15||0|0.5|pin@16||-0.75|0.5|ART_color()I10
3129 AThicker|net@9|||FS2250|pin@16||-0.75|0.5|pin@17||-0.5|0.75|ART_color()I10
3130 AThicker|net@10|||FS1350|pin@16||-0.75|0.5|pin@18||-0.5|0.25|ART_color()I10
3131 Eb||D8G1;Y-0.5;|pin@14||B
3132 Ed||D8G1;|pin@1||B
3133 Eg||D6G1;|pin@2||I
3134 Es||D2G1;|pin@0||B
3135 X
3136
3137 # Cell PMOS4x_io33;1{sch}
3138 CPMOS4x_io33;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S1|prototype_center()I[0,0]
3139 IPMOS4x_io33;1{ic}|PMOS@0||18.5|13|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
3140 IPMOS4f_io33;1{ic}|PMOSf@0||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : @X < 0.5 ? (0.5 * (7.6 - 0.4) / @X + 0.4) : 7.6|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 0.5 ? 6.0*@X : 3
3141 Ngeneric:Facet-Center|art@0||0|0||||AV
3142 NOff-Page|conn@0||7|11.5||||
3143 NOff-Page|conn@1||-9.5|7||||
3144 NOff-Page|conn@2||7|1||||
3145 NOff-Page|conn@3||7|7.5||||
3146 NWire_Pin|pin@1||0|11.5||||
3147 NWire_Pin|pin@2||0|1||||
3148 Ngeneric:Invisible-Pin|pin@3||-0.5|23.5|||||ART_message(D5G6;)SPMOS4x_io33
3149 Ngeneric:Invisible-Pin|pin@4||-0.5|18.5|||||ART_message(D5G2;)S4 terminal strength-based PMOS device for 3.3V I/O pads
3150 Awire|net@0|||0|PMOSf@0|g|-3.5|7|conn@1|y|-7.5|7
3151 Awire|net@1|||900|pin@1||0|11.5|PMOSf@0|s|0|9
3152 Awire|net@2|||2700|pin@2||0|1|PMOSf@0|d|0|5
3153 Awire|net@3|||1800|pin@1||0|11.5|conn@0|a|5|11.5
3154 Awire|net@4|||0|conn@2|a|5|1|pin@2||0|1
3155 Awire|net@8|||0|conn@3|a|5|7.5|PMOSf@0|b|0|7.5
3156 Eb||D5G2;|conn@3|y|B
3157 Ed||D5G2;|conn@2|y|B
3158 Eg||D5G2;|conn@1|a|I
3159 Es||D5G2;|conn@0|y|B
3160 X
3161
3162 # Cell PMOS4xwk;1{ic}
3163 CPMOS4xwk;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5G1.5;HNPX3.5;Y0.5;)I1|prototype_center()I[-8000,16000]
3164 Ngeneric:Facet-Center|art@0||0|0||||AV
3165 NThick-Circle|art@1||-1.5|0|0.5|0.5|RR||ART_color()I10
3166 NPin|pin@0||-0.5|0.25|1|1|YRR|
3167 NPin|pin@1||-0.75|0.5|1|1|Y|
3168 NPin|pin@2||-0.5|0.75|1|1|YRR|
3169 NPin|pin@3||-0.75|0.5|1|1|Y|
3170 NPin|pin@4||-0.75|0.5|1|1|Y|
3171 NPin|pin@5||0|0.5||||
3172 Nschematic:Bus_Pin|pin@6||0|0.5||||
3173 Ngeneric:Invisible-Pin|pin@7||0|2||||
3174 Nschematic:Bus_Pin|pin@8||0|-2|-2|-2||
3175 Nschematic:Bus_Pin|pin@9||-3|0|-2|-2||
3176 NPin|pin@10||0|0.75||||
3177 NPin|pin@11||-0.75|0.75|1|1||
3178 NPin|pin@12||-0.75|-0.75|1|1||
3179 NPin|pin@13||0|-0.75||||
3180 NPin|pin@14||0|-2||||
3181 NPin|pin@15||-3|0|||RR|
3182 NPin|pin@16||-1.75|0|1|1|RRR|
3183 NPin|pin@17||0|2||||
3184 NPin|pin@18||-1.25|0.75|1|1|Y|
3185 NPin|pin@19||-1.25|-0.75|1|1|Y|
3186 Ngeneric:Invisible-Pin|pin@20||-0.5|0|||||ART_message(D5G1;)S[wk]
3187 AThicker|net@0|||FS3150|pin@0||-0.5|0.25|pin@1||-0.75|0.5|ART_color()I10
3188 AThicker|net@1|||FS0|pin@5||0|0.5|pin@4||-0.75|0.5|ART_color()I10
3189 AThicker|net@2|||FS450|pin@2||-0.5|0.75|pin@3||-0.75|0.5|ART_color()I10
3190 AThicker|net@3|||FS0|pin@10||0|0.75|pin@11||-0.75|0.75|ART_color()I10
3191 AThicker|net@4|||FS1800|pin@12||-0.75|-0.75|pin@13||0|-0.75|ART_color()I10
3192 AThicker|net@5|||FS1800|pin@15||-3|0|pin@16||-1.75|0|ART_color()I10
3193 AThicker|net@6|||FS2700|pin@10||0|0.75|pin@17||0|2|ART_color()I10
3194 AThicker|net@7|||FS900|pin@13||0|-0.75|pin@14||0|-2|ART_color()I10
3195 AThicker|net@8|||FS900|pin@11||-0.75|0.75|pin@12||-0.75|-0.75|ART_color()I10
3196 AThicker|net@9|||FS2700|pin@19||-1.25|-0.75|pin@18||-1.25|0.75|ART_color()I10
3197 Ed||D8G1;|pin@8||B
3198 Eg||D6G1;|pin@9||I
3199 Epower||D5G1;|pin@6||P
3200 Es||D2G1;|pin@7||B
3201 X
3202
3203 # Cell PMOS4xwk;1{sch}
3204 CPMOS4xwk;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_X(D5G1;HNPX-8.5;Y1.25;)I1|prototype_center()I[0,0]
3205 IPMOS4fwk;1{ic}|PMOS4fwk@0||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5G1;NOJPX3.5;)S@X == 0 ? 0 : @X < 0.5 ? (0.5 * (2 - 0.4) / @X + 0.4) : 2|ATTR_W(D6G1;NOJPX2;Y1;)S@X > 0.5 ? 6.0*@X : 3
3206 IPMOS4xwk;1{ic}|PMOS4wk@0||23.25|15.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
3207 Ngeneric:Facet-Center|art@0||0|0||||AV
3208 NOff-Page|conn@0||9.5|7.5|||YRR|
3209 NOff-Page|conn@1||5|11.5||||
3210 NOff-Page|conn@2||-8|7||||
3211 NOff-Page|conn@3||5|1||||
3212 NWire_Pin|pin@0||0|11.5||||
3213 NWire_Pin|pin@1||0|1||||
3214 Ngeneric:Invisible-Pin|pin@2||-0.5|23.5|||||ART_message(D5G6;)S[PMOS4wk]
3215 Ngeneric:Invisible-Pin|pin@3||-0.5|18.5|||||ART_message(D5G2;)S[4 terminal weak PMOS device]
3216 Awire|net@0|||1800|PMOS4fwk@0|b|0|7.5|conn@0|y|7.5|7.5
3217 Awire|net@1|||900|pin@0||0|11.5|PMOS4fwk@0|s|0|9
3218 Awire|net@2|||1800|conn@2|y|-6|7|PMOS4fwk@0|g|-3|7
3219 Awire|net@3|||2700|pin@1||0|1|PMOS4fwk@0|d|0|5
3220 Awire|net@4|||1800|pin@0||0|11.5|conn@1|a|3|11.5
3221 Awire|net@5|||0|conn@3|a|3|1|pin@1||0|1
3222 Ed||D5G2;|conn@3|y|B
3223 Eg||D5G2;|conn@2|a|I
3224 Epower||D4G2;|conn@0|a|P
3225 Es||D5G2;|conn@1|y|B
3226 X
3227
3228 # Cell PMOSf;1{ic}
3229 CPMOSf;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[-8000,16000]
3230 Ngeneric:Facet-Center|art@0||0|0||||AV
3231 NThick-Circle|art@1||-2|0|1|1|RR||ART_color()I74
3232 Ngeneric:Invisible-Pin|pin@0||0|2||||
3233 Nschematic:Bus_Pin|pin@1||0|-2|-2|-2||
3234 Nschematic:Bus_Pin|pin@2||-3|0|-2|-2||
3235 NPin|pin@3||0|1||||
3236 NPin|pin@4||-0.75|1|1|1||
3237 NPin|pin@5||-0.75|-1|1|1||
3238 NPin|pin@6||0|-1||||
3239 NPin|pin@7||0|-2||||
3240 NPin|pin@8||-3|0|||RR|
3241 NPin|pin@9||-2.5|0|1|1|RRR|
3242 NPin|pin@10||0|2||||
3243 NPin|pin@11||-1.5|1|1|1|Y|
3244 NPin|pin@12||-1.5|-1|1|1|Y|
3245 AThicker|net@0|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I74
3246 AThicker|net@1|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I74
3247 AThicker|net@2|||FS1800|pin@8||-3|0|pin@9||-2.5|0|ART_color()I74
3248 AThicker|net@3|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I74
3249 AThicker|net@4|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I74
3250 AThicker|net@5|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I74
3251 AThicker|net@6|||FS2700|pin@12||-1.5|-1|pin@11||-1.5|1|ART_color()I74
3252 Ed||D8G1;|pin@1||B
3253 Eg||D6G1;|pin@2||I
3254 Es||D2G1;|pin@0||B
3255 X
3256
3257 # Cell PMOSf;1{sch}
3258 CPMOSf;1{sch}||schematic|1021415734000|1159313495771||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y3;)S3|ATTR_CDL_template(D5G1;NTX1.5;Y-15;)SM$(node_name) $(d) $(g) $(s) vdd pch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template(D5G1;NTX2.5;Y-10.5;)SM$(node_name) $(d) $(g) $(s) vdd pch W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)'  DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX2;Y-17;)SM$(node_name) $(d) $(g) $(s) vdd pch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX1;Y-8;)SM$(node_name) $(d) $(g) $(s) vdd pch W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX2.5;Y-12.5;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
3259 IPMOSf;1{ic}|PMOSf@0||26.75|20.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
3260 Ngeneric:Facet-Center|art@0||0|0||||AV
3261 NOff-Page|conn@0||8|12.5||||
3262 NOff-Page|conn@1||-14|7||||
3263 NOff-Page|conn@2||8.5|0||||
3264 NWire_Pin|pin@0||0|12.5||||
3265 NWire_Pin|pin@1||0|0||||
3266 Ngeneric:Invisible-Pin|pin@2||-0.5|23.5|||||ART_message(D5G6;)S[PMOSf]
3267 Ngeneric:Invisible-Pin|pin@3||-0.5|18.5|||||ART_message(D5G2;)S3-terminal standard threshold PMOS device
3268 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X2;Y-3;)Spch
3269 NPower|pwr@0||6|8||||
3270 Awire|net@0|||0|conn@2|a|6.5|0|pin@1||0|0
3271 Awire|net@1|||0|pmos4p@0|g|-3|7|conn@1|y|-12|7
3272 Awire|net@2|||0|conn@0|a|6|12.5|pin@0||0|12.5
3273 Awire|net@3|||2700|pmos4p@0|s|0|9|pin@0||0|12.5
3274 Awire|net@4|||2700|pin@1||0|0|pmos4p@0|d|0|5
3275 Awire|net@5|||1800|pmos4p@0|b|0|8|pwr@0||6|8
3276 Ed||D5G2;|conn@2|y|B
3277 Eg||D5G2;|conn@1|a|I
3278 Es||D5G2;|conn@0|y|B
3279 X
3280
3281 # Cell PMOSf_high;1{ic}
3282 CPMOSf_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[-8000,16000]
3283 Ngeneric:Facet-Center|art@0||0|0||||AV
3284 NThick-Circle|art@1||-2.5|0|1|1|RR||ART_color()I74
3285 Ngeneric:Invisible-Pin|pin@0||0|2||||
3286 Nschematic:Bus_Pin|pin@1||0|-2|-2|-2||
3287 Nschematic:Bus_Pin|pin@2||-3.5|0|-2|-2||
3288 NPin|pin@3||0|1||||
3289 NPin|pin@4||-0.75|1|1|1||
3290 NPin|pin@5||-0.75|-1|1|1||
3291 NPin|pin@6||0|-1||||
3292 NPin|pin@7||0|-2||||
3293 NPin|pin@8||-3.5|0|||RR|
3294 NPin|pin@9||-3|0|1|1|RRR|
3295 NPin|pin@10||0|2||||
3296 NPin|pin@11||-2|1|1|1|Y|
3297 NPin|pin@12||-2|-1|1|1|Y|
3298 AThicker|net@0|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I74
3299 AThicker|net@1|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I74
3300 AThicker|net@2|||FS1800|pin@8||-3.5|0|pin@9||-3|0|ART_color()I74
3301 AThicker|net@3|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I74
3302 AThicker|net@4|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I74
3303 AThicker|net@5|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I74
3304 AThicker|net@6|||FS2700|pin@12||-2|-1|pin@11||-2|1|ART_color()I74
3305 Ed||D8G1;|pin@1||B
3306 Eg||D6G1;|pin@2||I
3307 Es||D2G1;|pin@0||B
3308 X
3309
3310 # Cell PMOSf_high;1{sch}
3311 CPMOSf_high;1{sch}||schematic|1021415734000|1159313478011||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y3;)S3|ATTR_CDL_template(D5G1;NTX-3.5;Y-16.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-3;Y-14.5;)StransistorType  VTH-P-Transistor|ATTR_SPICE_template(D5G1;NTX1.5;Y-10.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_hvt W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)'  DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-3;Y-18.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX0.5;Y-8.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_hvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-3.5;Y-12.5;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
3312 IPMOSf_high;1{ic}|PMOSf@0||26.75|20.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
3313 Ngeneric:Facet-Center|art@0||0|0||||AV
3314 NOff-Page|conn@0||8|12.5||||
3315 NOff-Page|conn@1||-14|7||||
3316 NOff-Page|conn@2||8.5|0||||
3317 NWire_Pin|pin@0||0|12.5||||
3318 NWire_Pin|pin@1||0|0||||
3319 Ngeneric:Invisible-Pin|pin@2||-0.5|23.5|||||ART_message(D5G6;)SPMOSf_high
3320 Ngeneric:Invisible-Pin|pin@3||-0.5|18.5|||||ART_message(D5G2;)S3-terminal high-threshold PMOS device
3321 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1;Y-3;)Spch_hvt
3322 NPower|pwr@0||6|8||||
3323 Awire|net@0|||0|conn@2|a|6.5|0|pin@1||0|0
3324 Awire|net@1|||0|pmos4p@0|g|-3|7|conn@1|y|-12|7
3325 Awire|net@2|||0|conn@0|a|6|12.5|pin@0||0|12.5
3326 Awire|net@3|||2700|pmos4p@0|s|0|9|pin@0||0|12.5
3327 Awire|net@4|||2700|pin@1||0|0|pmos4p@0|d|0|5
3328 Awire|net@5|||1800|pmos4p@0|b|0|8|pwr@0||6|8
3329 Ed||D5G2;|conn@2|y|B
3330 Eg||D5G2;|conn@1|a|I
3331 Es||D5G2;|conn@0|y|B
3332 X
3333
3334 # Cell PMOSf_io18;1{ic}
3335 CPMOSf_io18;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S4|ATTR_W(D5FLeave alone;G1;HNOLPX3;Y1;)S3|prototype_center()I[0,0]
3336 Ngeneric:Facet-Center|art@0||0|0||||AV
3337 NThick-Circle|art@1||-2.5|0|1|1|||ART_color()I74
3338 Ngeneric:Invisible-Pin|pin@4||0|2||||
3339 Nschematic:Bus_Pin|pin@6||0|-2|-2|-2||
3340 Nschematic:Bus_Pin|pin@7||-3.5|0|-2|-2||
3341 NPin|pin@8||0|1||||
3342 NPin|pin@9||-0.75|1|1|1||
3343 NPin|pin@10||-0.75|-1|1|1||
3344 NPin|pin@11||0|-1||||
3345 NPin|pin@12||0|-2||||
3346 NPin|pin@13||-3.5|0|||RR|
3347 NPin|pin@14||-3|0|1|1|RR|
3348 NPin|pin@15||0|2||||
3349 NPin|pin@16||-2|-1|1|1||
3350 NPin|pin@17||-2|1|1|1||
3351 Ngeneric:Invisible-Pin|pin@18||-2.25|1.75|||||ART_message(D5G1;)S1.8V
3352 AThicker|net@3|||FS1800|pin@9||-0.75|1|pin@8||0|1|ART_color()I74
3353 AThicker|net@4|||FS0|pin@11||0|-1|pin@10||-0.75|-1|ART_color()I74
3354 AThicker|net@5|||FS0|pin@14||-3|0|pin@13||-3.5|0|ART_color()I74
3355 AThicker|net@6|||FS900|pin@15||0|2|pin@8||0|1|ART_color()I74
3356 AThicker|net@7|||FS2700|pin@12||0|-2|pin@11||0|-1|ART_color()I74
3357 AThicker|net@8|||FS2700|pin@10||-0.75|-1|pin@9||-0.75|1|ART_color()I74
3358 AThicker|net@9|||FS2700|pin@16||-2|-1|pin@17||-2|1|ART_color()I74
3359 Ed||D5G1;|pin@6||B
3360 Eg||D5G1;|pin@7||I
3361 Es||D5G1;|pin@4||B
3362 X
3363
3364 # Cell PMOSf_io18;1{sch}
3365 CPMOSf_io18;1{sch}||schematic|1021415734000|1159313459905||ATTR_Delay(D5G1;HNPX-8.5;Y-1.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y0.25;)S4|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y2;)S3|ATTR_CDL_template(D5G1;NTX1.5;Y-15.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-13;)StransistorType  OD18-P-Transistor|ATTR_SPICE_template(D5G1;NTX3.5;Y-9;)SM$(node_name) $(d) $(g) $(s) vdd pch_18 W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX2;Y-17.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX1;Y-7;)SM$(node_name) $(d) $(g) $(s) vdd pch_18 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-11;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
3366 IPMOSf_io18;1{ic}|PMOS4f@0||23.25|11.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S4|ATTR_W(D5FLeave alone;G1;NOLPX3;Y1;)S3
3367 Ngeneric:Facet-Center|art@0||0|0||||AV
3368 NOff-Page|conn@0||5|11.5||||
3369 NOff-Page|conn@2||-12|7||||
3370 NOff-Page|conn@3||5|1||||
3371 NWire_Pin|pin@0||0|11.5||||
3372 NWire_Pin|pin@1||0|1||||
3373 Ngeneric:Invisible-Pin|pin@2||-1|27|||||ART_message(D5G6;)SPMOSf_io18
3374 Ngeneric:Invisible-Pin|pin@3||-1.5|21.5|||||ART_message(D5G2;)S3-terminal PMOS device for 1.8V I/O pads
3375 Ngeneric:Invisible-Pin|pin@4||-1|17.5|||||ART_message(D5G2;)Sminimum length for 1.8V thick-oxide devices is 4
3376 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3.5;)Spch_18
3377 NPower|pwr@0||7|8||||
3378 Awire|net@0|||1800|conn@2|y|-10|7|pmos4p@0|g|-3|7
3379 Awire|net@1|||0|conn@0|a|3|11.5|pin@0||0|11.5
3380 Awire|net@2|||900|pin@0||0|11.5|pmos4p@0|s|0|9
3381 Awire|net@4|||1800|pin@1||0|1|conn@3|a|3|1
3382 Awire|net@5|||900|pmos4p@0|d|0|5|pin@1||0|1
3383 Awire|net@6|||0|pwr@0||7|8|pmos4p@0|b|0|8
3384 Ed||D5G2;|conn@3|y|B
3385 Eg||D5G2;|conn@2|a|I
3386 Es||D5G2;|conn@0|y|B
3387 X
3388
3389 # Cell PMOSf_io25;1{ic}
3390 CPMOSf_io25;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S5.6|ATTR_W(D5FLeave alone;G1;HNOLPX3;Y1;)S3|prototype_center()I[0,0]
3391 Ngeneric:Facet-Center|art@0||0|0||||AV
3392 NThick-Circle|art@1||-2.5|0|1|1|||ART_color()I74
3393 Ngeneric:Invisible-Pin|pin@4||0|2||||
3394 Nschematic:Bus_Pin|pin@6||0|-2|-2|-2||
3395 Nschematic:Bus_Pin|pin@7||-3.5|0|-2|-2||
3396 NPin|pin@8||0|1||||
3397 NPin|pin@9||-0.75|1|1|1||
3398 NPin|pin@10||-0.75|-1|1|1||
3399 NPin|pin@11||0|-1||||
3400 NPin|pin@12||0|-2||||
3401 NPin|pin@13||-3.5|0|||RR|
3402 NPin|pin@14||-3|0|1|1|RR|
3403 NPin|pin@15||0|2||||
3404 NPin|pin@16||-2|-1|1|1||
3405 NPin|pin@17||-2|1|1|1||
3406 Ngeneric:Invisible-Pin|pin@18||-2.25|1.75|||||ART_message(D5G1;)S2.5V
3407 AThicker|net@3|||FS0|pin@8||0|1|pin@9||-0.75|1|ART_color()I74
3408 AThicker|net@4|||FS1800|pin@10||-0.75|-1|pin@11||0|-1|ART_color()I74
3409 AThicker|net@5|||FS1800|pin@13||-3.5|0|pin@14||-3|0|ART_color()I74
3410 AThicker|net@6|||FS2700|pin@8||0|1|pin@15||0|2|ART_color()I74
3411 AThicker|net@7|||FS900|pin@11||0|-1|pin@12||0|-2|ART_color()I74
3412 AThicker|net@8|||FS900|pin@9||-0.75|1|pin@10||-0.75|-1|ART_color()I74
3413 AThicker|net@9|||FS900|pin@17||-2|1|pin@16||-2|-1|ART_color()I74
3414 Ed||D5G1;|pin@6||B
3415 Eg||D5G1;|pin@7||I
3416 Es||D5G1;|pin@4||B
3417 X
3418
3419 # Cell PMOSf_io25;1{sch}
3420 CPMOSf_io25;1{sch}||schematic|1021415734000|1159313441380||ATTR_Delay(D5G1;HNPX-8.5;Y-1.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y0.25;)S5.6|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y2;)S3|ATTR_CDL_template(D5G1;NTX2.5;Y-15.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_25 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-13;)StransistorType  OD25-P-Transistor|ATTR_SPICE_template(D5G1;NTX3.5;Y-9;)SM$(node_name) $(d) $(g) $(s) vdd pch_25 W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX3;Y-17.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_25 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX1;Y-7;)SM$(node_name) $(d) $(g) $(s) vdd pch_25 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-11;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
3421 IPMOSf_io25;1{ic}|PMOS4f@0||23.25|11.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S5.6|ATTR_W(D5FLeave alone;G1;NOLPX3;Y1;)S3
3422 Ngeneric:Facet-Center|art@0||0|0||||AV
3423 NOff-Page|conn@0||5|11.5||||
3424 NOff-Page|conn@2||-12|7||||
3425 NOff-Page|conn@3||5|1||||
3426 NWire_Pin|pin@0||0|11.5||||
3427 NWire_Pin|pin@1||0|1||||
3428 Ngeneric:Invisible-Pin|pin@2||-1|27|||||ART_message(D5G6;)SPMOSf_io25
3429 Ngeneric:Invisible-Pin|pin@3||-1.5|21.5|||||ART_message(D5G2;)S3-terminal PMOS device for 2.5V I/O pads
3430 Ngeneric:Invisible-Pin|pin@4||-1|17.5|||||ART_message(D5G2;)Sminimum length for 2.5V thick-oxide devices is 5.6
3431 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3.5;)Spch_25
3432 NPower|pwr@0||7|8||||
3433 Awire|net@0|||0|pmos4p@0|g|-3|7|conn@2|y|-10|7
3434 Awire|net@1|||1800|pin@0||0|11.5|conn@0|a|3|11.5
3435 Awire|net@2|||2700|pmos4p@0|s|0|9|pin@0||0|11.5
3436 Awire|net@4|||0|conn@3|a|3|1|pin@1||0|1
3437 Awire|net@5|||2700|pin@1||0|1|pmos4p@0|d|0|5
3438 Awire|net@6|||0|pwr@0||7|8|pmos4p@0|b|0|8
3439 Ed||D5G2;|conn@3|y|B
3440 Eg||D5G2;|conn@2|a|I
3441 Es||D5G2;|conn@0|y|B
3442 X
3443
3444 # Cell PMOSf_io33;1{ic}
3445 CPMOSf_io33;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S7.6|ATTR_W(D5FLeave alone;G1;HNOLPX3;Y1;)S3|prototype_center()I[0,0]
3446 Ngeneric:Facet-Center|art@0||0|0||||AV
3447 NThick-Circle|art@1||-2.5|0|1|1|||ART_color()I74
3448 Ngeneric:Invisible-Pin|pin@4||0|2||||
3449 Nschematic:Bus_Pin|pin@6||0|-2|-2|-2||
3450 Nschematic:Bus_Pin|pin@7||-3.5|0|-2|-2||
3451 NPin|pin@8||0|1||||
3452 NPin|pin@9||-0.75|1|1|1||
3453 NPin|pin@10||-0.75|-1|1|1||
3454 NPin|pin@11||0|-1||||
3455 NPin|pin@12||0|-2||||
3456 NPin|pin@13||-3.5|0|||RR|
3457 NPin|pin@14||-3|0|1|1|RR|
3458 NPin|pin@15||0|2||||
3459 NPin|pin@16||-2|-1|1|1||
3460 NPin|pin@17||-2|1|1|1||
3461 Ngeneric:Invisible-Pin|pin@18||-2.25|1.75|||||ART_message(D5G1;)S3.3V
3462 AThicker|net@3|||FS1800|pin@9||-0.75|1|pin@8||0|1|ART_color()I74
3463 AThicker|net@4|||FS0|pin@11||0|-1|pin@10||-0.75|-1|ART_color()I74
3464 AThicker|net@5|||FS0|pin@14||-3|0|pin@13||-3.5|0|ART_color()I74
3465 AThicker|net@6|||FS900|pin@15||0|2|pin@8||0|1|ART_color()I74
3466 AThicker|net@7|||FS2700|pin@12||0|-2|pin@11||0|-1|ART_color()I74
3467 AThicker|net@8|||FS2700|pin@10||-0.75|-1|pin@9||-0.75|1|ART_color()I74
3468 AThicker|net@9|||FS2700|pin@16||-2|-1|pin@17||-2|1|ART_color()I74
3469 Ed||D5G1;|pin@6||B
3470 Eg||D5G1;|pin@7||I
3471 Es||D5G1;|pin@4||B
3472 X
3473
3474 # Cell PMOSf_io33;1{sch}
3475 CPMOSf_io33;1{sch}||schematic|1021415734000|1159313419552||ATTR_Delay(D5G1;HNPX-8.5;Y-1.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y0.25;)S7.6|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y2;)S3|ATTR_CDL_template(D5G1;NTX1;Y-15.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_33 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-13;)StransistorType  OD33-P-Transistor|ATTR_SPICE_template(D5G1;NTX3.5;Y-9;)SM$(node_name) $(d) $(g) $(s) vdd pch_33 W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX1.5;Y-17.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_33 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX1;Y-7;)SM$(node_name) $(d) $(g) $(s) vdd pch_33 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-11;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
3476 IPMOSf_io33;1{ic}|PMOS4f@0||23.25|11.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S7.6|ATTR_W(D5FLeave alone;G1;NOLPX3;Y1;)S3
3477 Ngeneric:Facet-Center|art@0||0|0||||AV
3478 NOff-Page|conn@0||5|11.5||||
3479 NOff-Page|conn@2||-12|7||||
3480 NOff-Page|conn@3||5|1||||
3481 NWire_Pin|pin@0||0|11.5||||
3482 NWire_Pin|pin@1||0|1||||
3483 Ngeneric:Invisible-Pin|pin@2||-1|27|||||ART_message(D5G6;)SPMOSf_io33
3484 Ngeneric:Invisible-Pin|pin@3||-1.5|21.5|||||ART_message(D5G2;)S3-terminal PMOS device for 3.3V I/O pads
3485 Ngeneric:Invisible-Pin|pin@4||-1|17.5|||||ART_message(D5G2;)Sminimum length for 3.3V thick-oxide devices is 7.6
3486 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3.5;)Spch_33
3487 NPower|pwr@0||7|8||||
3488 Awire|net@0|||1800|conn@2|y|-10|7|pmos4p@0|g|-3|7
3489 Awire|net@1|||0|conn@0|a|3|11.5|pin@0||0|11.5
3490 Awire|net@2|||900|pin@0||0|11.5|pmos4p@0|s|0|9
3491 Awire|net@4|||1800|pin@1||0|1|conn@3|a|3|1
3492 Awire|net@5|||900|pmos4p@0|d|0|5|pin@1||0|1
3493 Awire|net@6|||0|pwr@0||7|8|pmos4p@0|b|0|8
3494 Ed||D5G2;|conn@3|y|B
3495 Eg||D5G2;|conn@2|a|I
3496 Es||D5G2;|conn@0|y|B
3497 X
3498
3499 # Cell PMOSf_low;1{ic}
3500 CPMOSf_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[-8000,16000]
3501 Ngeneric:Facet-Center|art@0||0|0||||AV
3502 NThick-Circle|art@1||-1.5|0|1|1|RR||ART_color()I74
3503 Ngeneric:Invisible-Pin|pin@0||0|2||||
3504 Nschematic:Bus_Pin|pin@1||0|-2|-2|-2||
3505 Nschematic:Bus_Pin|pin@2||-2.5|0|-2|-2||
3506 NPin|pin@3||0|1||||
3507 NPin|pin@4||-0.75|1|1|1||
3508 NPin|pin@5||-0.75|-1|1|1||
3509 NPin|pin@6||0|-1||||
3510 NPin|pin@7||0|-2||||
3511 NPin|pin@8||-2.5|0|||RR|
3512 NPin|pin@9||-2|0|1|1|RRR|
3513 NPin|pin@10||0|2||||
3514 NPin|pin@11||-1|1|1|1|Y|
3515 NPin|pin@12||-1|-1|1|1|Y|
3516 AThicker|net@0|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I74
3517 AThicker|net@1|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I74
3518 AThicker|net@2|||FS1800|pin@8||-2.5|0|pin@9||-2|0|ART_color()I74
3519 AThicker|net@3|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I74
3520 AThicker|net@4|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I74
3521 AThicker|net@5|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I74
3522 AThicker|net@6|||FS2700|pin@12||-1|-1|pin@11||-1|1|ART_color()I74
3523 Ed||D8G1;|pin@1||B
3524 Eg||D6G1;|pin@2||I
3525 Es||D2G1;|pin@0||B
3526 X
3527
3528 # Cell PMOSf_low;1{sch}
3529 CPMOSf_low;1{sch}||schematic|1021415734000|1159313513376||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;Y3;)S3|ATTR_CDL_template(D5G1;NTX-2;Y-16.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-3;Y-14.5;)StransistorType  VTL-P-Transistor|ATTR_SPICE_template(D5G1;NTX2.5;Y-10.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)'  DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-1.5;Y-18.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX0.5;Y-8.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-3.5;Y-12.5;)Stranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
3530 IPMOSf_low;1{ic}|PMOSf@0||26.75|20.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3
3531 Ngeneric:Facet-Center|art@0||0|0||||AV
3532 NOff-Page|conn@0||8|12.5||||
3533 NOff-Page|conn@1||-14|7||||
3534 NOff-Page|conn@2||8.5|0||||
3535 NWire_Pin|pin@0||0|12.5||||
3536 NWire_Pin|pin@1||0|0||||
3537 Ngeneric:Invisible-Pin|pin@2||-0.5|23.5|||||ART_message(D5G6;)SPMOSf_low
3538 Ngeneric:Invisible-Pin|pin@3||-0.5|18.5|||||ART_message(D5G2;)S3-terminal low-threshold PMOS device
3539 N4-Port-Transistor|pmos4p@0||-2|7|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Spch_lvt
3540 NPower|pwr@0||6|8||||
3541 Awire|net@0|||0|conn@2|a|6.5|0|pin@1||0|0
3542 Awire|net@1|||0|pmos4p@0|g|-3|7|conn@1|y|-12|7
3543 Awire|net@2|||0|conn@0|a|6|12.5|pin@0||0|12.5
3544 Awire|net@3|||2700|pmos4p@0|s|0|9|pin@0||0|12.5
3545 Awire|net@4|||2700|pin@1||0|0|pmos4p@0|d|0|5
3546 Awire|net@5|||1800|pmos4p@0|b|0|8|pwr@0||6|8
3547 Ed||D5G2;|conn@2|y|B
3548 Eg||D5G2;|conn@1|a|I
3549 Es||D5G2;|conn@0|y|B
3550 X
3551
3552 # Cell PMOSfwk;1{ic}
3553 CPMOSfwk;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[-8000,16000]
3554 Ngeneric:Facet-Center|art@0||0|0||||AV
3555 NThick-Circle|art@1||-1.5|0|0.5|0.5|RR||ART_color()I74
3556 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
3557 Ngeneric:Invisible-Pin|pin@1||0|2||||
3558 Nschematic:Bus_Pin|pin@2||0|-2|-2|-2||
3559 Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
3560 NPin|pin@4||0|0.75||||
3561 NPin|pin@5||-0.75|0.75|1|1||
3562 NPin|pin@6||-0.75|-0.75|1|1||
3563 NPin|pin@7||0|-0.75||||
3564 NPin|pin@8||0|-2||||
3565 NPin|pin@9||-3|0|||RR|
3566 NPin|pin@10||-1.75|0|1|1|RRR|
3567 NPin|pin@11||0|2||||
3568 NPin|pin@12||-1.25|0.75|1|1|Y|
3569 NPin|pin@13||-1.25|-0.75|1|1|Y|
3570 AThicker|net@0|||FS0|pin@4||0|0.75|pin@5||-0.75|0.75|ART_color()I74
3571 AThicker|net@1|||FS1800|pin@6||-0.75|-0.75|pin@7||0|-0.75|ART_color()I74
3572 AThicker|net@2|||FS1800|pin@9||-3|0|pin@10||-1.75|0|ART_color()I74
3573 AThicker|net@3|||FS2700|pin@4||0|0.75|pin@11||0|2|ART_color()I74
3574 AThicker|net@4|||FS900|pin@7||0|-0.75|pin@8||0|-2|ART_color()I74
3575 AThicker|net@5|||FS900|pin@5||-0.75|0.75|pin@6||-0.75|-0.75|ART_color()I74
3576 AThicker|net@6|||FS2700|pin@13||-1.25|-0.75|pin@12||-1.25|0.75|ART_color()I74
3577 Ed||D8G1;|pin@2||B
3578 Eg||D6G1;|pin@3||I
3579 Es||D2G1;|pin@1||B
3580 X
3581
3582 # Cell PMOSfwk;1{sch}
3583 CPMOSfwk;1{sch}||schematic|1021415734000|1159313542858||ATTR_Delay(D5G1;HNPX-8.5;Y-4.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y-1.75;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;)S3|ATTR_CDL_template(D5G1;NTX-1.5;Y-17;)SM$(node_name) $(d) $(g) $(s) vdd pch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template(D5G1;NTX2;Y-12.5;)SM$(node_name) $(d) $(g) $(s) vdd pch W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX-1;Y-19;)SM$(node_name) $(d) $(g) $(s) vdd pch W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2;Y-10;)SM$(node_name) $(d) $(g) $(s) vdd pch W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-2.5;Y-14.5;)Srtranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
3584 IPMOSfwk;1{ic}|PMOSfwk@0||28.25|11.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3|ATTR_GEO(T)I0|ATTR_M(T)I1
3585 Ngeneric:Facet-Center|art@0||0|0||||AV
3586 NOff-Page|conn@0||5|8.5||||
3587 NOff-Page|conn@1||-8|4||||
3588 NOff-Page|conn@2||5|-2||||
3589 NWire_Pin|pin@0||0|8.5||||
3590 NWire_Pin|pin@1||0|-2||||
3591 Ngeneric:Invisible-Pin|pin@2||-1|22|||||ART_message(D5G6;)SPMOSfwk
3592 Ngeneric:Invisible-Pin|pin@3||-1.5|16.5|||||ART_message(D5G2;T)S3 terminal standard threshold weak PMOS device
3593 N4-Port-Transistor|pmos4p@0||-2|4|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X2;Y-2.5;)Spch|SIM_weak_node(D5G1;)SWeak
3594 NPower|pwr@0||6|5||||
3595 Awire|net@0|||1800|pin@0||0|8.5|conn@0|a|3|8.5
3596 Awire|net@1|||2700|pmos4p@0|s|0|6|pin@0||0|8.5
3597 Awire|net@2|||0|conn@2|a|3|-2|pin@1||0|-2
3598 Awire|net@3|||2700|pin@1||0|-2|pmos4p@0|d|0|2
3599 Awire|net@4|||1800|conn@1|y|-6|4|pmos4p@0|g|-3|4
3600 Awire|net@5|||1800|pmos4p@0|b|0|5|pwr@0||6|5
3601 Ed||D5G2;|conn@2|y|B
3602 Eg||D5G2;|conn@1|a|I
3603 Es||D5G2;|conn@0|y|B
3604 X
3605
3606 # Cell PMOSfwk_high;1{ic}
3607 CPMOSfwk_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[-8000,16000]
3608 Ngeneric:Facet-Center|art@0||0|0||||AV
3609 NThick-Circle|art@1||-1.75|0|0.5|0.5|RR||ART_color()I74
3610 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
3611 Ngeneric:Invisible-Pin|pin@1||0|2||||
3612 Nschematic:Bus_Pin|pin@2||0|-2|-2|-2||
3613 Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
3614 NPin|pin@4||0|0.75||||
3615 NPin|pin@5||-0.75|0.75|1|1||
3616 NPin|pin@6||-0.75|-0.75|1|1||
3617 NPin|pin@7||0|-0.75||||
3618 NPin|pin@8||0|-2||||
3619 NPin|pin@9||-3|0|||RR|
3620 NPin|pin@10||-2|0|1|1|RRR|
3621 NPin|pin@11||0|2||||
3622 NPin|pin@12||-1.5|0.75|1|1|Y|
3623 NPin|pin@13||-1.5|-0.75|1|1|Y|
3624 AThicker|net@0|||FS0|pin@4||0|0.75|pin@5||-0.75|0.75|ART_color()I74
3625 AThicker|net@1|||FS1800|pin@6||-0.75|-0.75|pin@7||0|-0.75|ART_color()I74
3626 AThicker|net@2|||FS1800|pin@9||-3|0|pin@10||-2|0|ART_color()I74
3627 AThicker|net@3|||FS2700|pin@4||0|0.75|pin@11||0|2|ART_color()I74
3628 AThicker|net@4|||FS900|pin@7||0|-0.75|pin@8||0|-2|ART_color()I74
3629 AThicker|net@5|||FS900|pin@5||-0.75|0.75|pin@6||-0.75|-0.75|ART_color()I74
3630 AThicker|net@6|||FS2700|pin@13||-1.5|-0.75|pin@12||-1.5|0.75|ART_color()I74
3631 Ed||D8G1;|pin@2||B
3632 Eg||D6G1;|pin@3||I
3633 Es||D2G1;|pin@1||B
3634 X
3635
3636 # Cell PMOSfwk_high;1{sch}
3637 CPMOSfwk_high;1{sch}||schematic|1021415734000|1159313524375||ATTR_Delay(D5G1;HNPX-8.5;Y-4.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y-1.75;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;)S3|ATTR_CDL_template(D5G1;NTX0.5;Y-19;)SM$(node_name) $(d) $(g) $(s) vdd pch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-1;Y-16.5;)StransistorType  VTH-P-Transistor|ATTR_SPICE_template(D5G1;NTX0.5;Y-12.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_hvt W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX1;Y-21;)SM$(node_name) $(d) $(g) $(s) vdd pch_hvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2;Y-10;)SM$(node_name) $(d) $(g) $(s) vdd pch_hvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-2.5;Y-14.5;)Srtranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
3638 IPMOSfwk_high;1{ic}|PMOSfwk@0||28.25|11.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3|ATTR_GEO(T)I0|ATTR_M(T)I1
3639 Ngeneric:Facet-Center|art@0||0|0||||AV
3640 NOff-Page|conn@0||5|8.5||||
3641 NOff-Page|conn@1||-8|4||||
3642 NOff-Page|conn@2||5|-2||||
3643 NWire_Pin|pin@0||0|8.5||||
3644 NWire_Pin|pin@1||0|-2||||
3645 Ngeneric:Invisible-Pin|pin@2||-1|22|||||ART_message(D5G6;)SPMOSwk_high
3646 Ngeneric:Invisible-Pin|pin@3||-1.5|16.5|||||ART_message(D5G2;T)S3 terminal high-threshold weak PMOS device
3647 N4-Port-Transistor|pmos4p@0||-2|4|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1;Y-3;)Spch_hvt|SIM_weak_node(D5G1;)SWeak
3648 NPower|pwr@0||6|5||||
3649 Awire|net@0|||1800|pin@0||0|8.5|conn@0|a|3|8.5
3650 Awire|net@1|||2700|pmos4p@0|s|0|6|pin@0||0|8.5
3651 Awire|net@2|||0|conn@2|a|3|-2|pin@1||0|-2
3652 Awire|net@3|||2700|pin@1||0|-2|pmos4p@0|d|0|2
3653 Awire|net@4|||1800|conn@1|y|-6|4|pmos4p@0|g|-3|4
3654 Awire|net@5|||1800|pmos4p@0|b|0|5|pwr@0||6|5
3655 Ed||D5G2;|conn@2|y|B
3656 Eg||D5G2;|conn@1|a|I
3657 Es||D5G2;|conn@0|y|B
3658 X
3659
3660 # Cell PMOSfwk_low;1{ic}
3661 CPMOSfwk_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;HNOLPX2;Y1;)S3|prototype_center()I[-8000,16000]
3662 Ngeneric:Facet-Center|art@0||0|0||||AV
3663 NThick-Circle|art@1||-1.25|0|0.5|0.5|RR||ART_color()I74
3664 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
3665 Ngeneric:Invisible-Pin|pin@1||0|2||||
3666 Nschematic:Bus_Pin|pin@2||0|-2|-2|-2||
3667 Nschematic:Bus_Pin|pin@3||-2.5|0|-2|-2||
3668 NPin|pin@4||0|0.75||||
3669 NPin|pin@5||-0.75|0.75|1|1||
3670 NPin|pin@6||-0.75|-0.75|1|1||
3671 NPin|pin@7||0|-0.75||||
3672 NPin|pin@8||0|-2||||
3673 NPin|pin@9||-2.5|0|||RR|
3674 NPin|pin@10||-1.5|0|1|1|RRR|
3675 NPin|pin@11||0|2||||
3676 NPin|pin@12||-1|0.75|1|1|Y|
3677 NPin|pin@13||-1|-0.75|1|1|Y|
3678 AThicker|net@0|||FS0|pin@4||0|0.75|pin@5||-0.75|0.75|ART_color()I74
3679 AThicker|net@1|||FS1800|pin@6||-0.75|-0.75|pin@7||0|-0.75|ART_color()I74
3680 AThicker|net@2|||FS1800|pin@9||-2.5|0|pin@10||-1.5|0|ART_color()I74
3681 AThicker|net@3|||FS2700|pin@4||0|0.75|pin@11||0|2|ART_color()I74
3682 AThicker|net@4|||FS900|pin@7||0|-0.75|pin@8||0|-2|ART_color()I74
3683 AThicker|net@5|||FS900|pin@5||-0.75|0.75|pin@6||-0.75|-0.75|ART_color()I74
3684 AThicker|net@6|||FS2700|pin@13||-1|-0.75|pin@12||-1|0.75|ART_color()I74
3685 Ed||D8G1;|pin@2||B
3686 Eg||D6G1;|pin@3||I
3687 Es||D2G1;|pin@1||B
3688 X
3689
3690 # Cell PMOSfwk_low;1{sch}
3691 CPMOSfwk_low;1{sch}||schematic|1021415734000|1159313559676||ATTR_Delay(D5G1;HNPX-8.5;Y-4.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y-1.75;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;)S3|ATTR_CDL_template(D5G1;NTY-19;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-16.5;)StransistorType  VTL-P-Transistor|ATTR_SPICE_template(D5G1;NTX3;Y-12.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX0.5;Y-21;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2;Y-10;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-14.5;)Srtranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
3692 IPMOSfwk_low;1{ic}|PMOSfwk@0||28.25|11.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3|ATTR_GEO(T)I0|ATTR_M(T)I1
3693 Ngeneric:Facet-Center|art@0||0|0||||AV
3694 NOff-Page|conn@0||5|8.5||||
3695 NOff-Page|conn@1||-8|4||||
3696 NOff-Page|conn@2||5|-2||||
3697 NWire_Pin|pin@0||0|8.5||||
3698 NWire_Pin|pin@1||0|-2||||
3699 Ngeneric:Invisible-Pin|pin@2||-1|22|||||ART_message(D5G6;)SPMOSfwk_low
3700 Ngeneric:Invisible-Pin|pin@3||-1.5|16.5|||||ART_message(D5G2;T)S3 terminal low-threshold weak PMOS device
3701 N4-Port-Transistor|pmos4p@0||-2|4|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Spch_lvt|SIM_weak_node(D5G1;)SWeak
3702 NPower|pwr@0||6|5||||
3703 Awire|net@0|||1800|pin@0||0|8.5|conn@0|a|3|8.5
3704 Awire|net@1|||2700|pmos4p@0|s|0|6|pin@0||0|8.5
3705 Awire|net@2|||0|conn@2|a|3|-2|pin@1||0|-2
3706 Awire|net@3|||2700|pin@1||0|-2|pmos4p@0|d|0|2
3707 Awire|net@4|||1800|conn@1|y|-6|4|pmos4p@0|g|-3|4
3708 Awire|net@5|||1800|pmos4p@0|b|0|5|pwr@0||6|5
3709 Ed||D5G2;|conn@2|y|B
3710 Eg||D5G2;|conn@1|a|I
3711 Es||D5G2;|conn@0|y|B
3712 X
3713
3714 # Cell PMOSx;1{ic}
3715 CPMOSx;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[-8000,16000]
3716 Ngeneric:Facet-Center|art@0||0|0||||AV
3717 NThick-Circle|art@1||-2|0|1|1|RR||ART_color()I10
3718 Ngeneric:Invisible-Pin|pin@0||0|2||||
3719 Nschematic:Bus_Pin|pin@1||0|-2|-2|-2||
3720 Nschematic:Bus_Pin|pin@2||-3|0|-2|-2||
3721 NPin|pin@3||0|1||||
3722 NPin|pin@4||-0.75|1|1|1||
3723 NPin|pin@5||-0.75|-1|1|1||
3724 NPin|pin@6||0|-1||||
3725 NPin|pin@7||0|-2||||
3726 NPin|pin@8||-3|0|||RR|
3727 NPin|pin@9||-2.5|0|1|1|RRR|
3728 NPin|pin@10||0|2||||
3729 NPin|pin@11||-1.5|1|1|1|Y|
3730 NPin|pin@12||-1.5|-1|1|1|Y|
3731 AThicker|net@0|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I10
3732 AThicker|net@1|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I10
3733 AThicker|net@2|||FS1800|pin@8||-3|0|pin@9||-2.5|0|ART_color()I10
3734 AThicker|net@3|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I10
3735 AThicker|net@4|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I10
3736 AThicker|net@5|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I10
3737 AThicker|net@6|||FS2700|pin@12||-1.5|-1|pin@11||-1.5|1|ART_color()I10
3738 Ed||D8G1;|pin@1||B
3739 Eg||D6G1;|pin@2||I
3740 Es||D2G1;|pin@0||B
3741 X
3742
3743 # Cell PMOSx;1{sch}
3744 CPMOSx;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S1|prototype_center()I[0,0]
3745 IPMOSx;1{ic}|PMOS@0||15.25|12.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
3746 IPMOSf;1{ic}|PMOSf@0||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : @X < 0.5 ? (0.5 * (2 - 0.4) / @X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 0.5 ? 6.0*@X : 3
3747 Ngeneric:Facet-Center|art@0||0|0||||AV
3748 NOff-Page|conn@0||5|11.5||||
3749 NOff-Page|conn@1||-9.5|7||||
3750 NOff-Page|conn@2||5|1||||
3751 NWire_Pin|pin@1||0|11.5||||
3752 NWire_Pin|pin@2||0|1||||
3753 Ngeneric:Invisible-Pin|pin@3||-0.5|23.5|||||ART_message(D5G6;)SPMOSx
3754 Ngeneric:Invisible-Pin|pin@4||-0.5|18.5|||||ART_message(D5G2;)S3 terminal standard-threshold strength-based PMOS device
3755 Awire|net@0|||0|PMOSf@0|g|-3|7|conn@1|y|-7.5|7
3756 Awire|net@1|||900|pin@1||0|11.5|PMOSf@0|s|0|9
3757 Awire|net@2|||2700|pin@2||0|1|PMOSf@0|d|0|5
3758 Awire|net@3|||1800|pin@1||0|11.5|conn@0|a|3|11.5
3759 Awire|net@4|||0|conn@2|a|3|1|pin@2||0|1
3760 Ed||D5G2;|conn@2|y|B
3761 Eg||D5G2;|conn@1|a|I
3762 Es||D5G2;|conn@0|y|B
3763 X
3764
3765 # Cell PMOSx_high;1{ic}
3766 CPMOSx_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[-8000,16000]
3767 Ngeneric:Facet-Center|art@0||0|0||||AV
3768 NThick-Circle|art@1||-2.5|0|1|1|RR||ART_color()I10
3769 Ngeneric:Invisible-Pin|pin@0||0|2||||
3770 Nschematic:Bus_Pin|pin@1||0|-2|-2|-2||
3771 Nschematic:Bus_Pin|pin@2||-3.5|0|-2|-2||
3772 NPin|pin@3||0|1||||
3773 NPin|pin@4||-0.75|1|1|1||
3774 NPin|pin@5||-0.75|-1|1|1||
3775 NPin|pin@6||0|-1||||
3776 NPin|pin@7||0|-2||||
3777 NPin|pin@8||-3.5|0|||RR|
3778 NPin|pin@9||-3|0|1|1|RRR|
3779 NPin|pin@10||0|2||||
3780 NPin|pin@11||-2|1|1|1|Y|
3781 NPin|pin@12||-2|-1|1|1|Y|
3782 AThicker|net@0|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I10
3783 AThicker|net@1|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I10
3784 AThicker|net@2|||FS1800|pin@8||-3.5|0|pin@9||-3|0|ART_color()I10
3785 AThicker|net@3|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I10
3786 AThicker|net@4|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I10
3787 AThicker|net@5|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I10
3788 AThicker|net@6|||FS2700|pin@12||-2|-1|pin@11||-2|1|ART_color()I10
3789 Ed||D8G1;|pin@1||B
3790 Eg||D6G1;|pin@2||I
3791 Es||D2G1;|pin@0||B
3792 X
3793
3794 # Cell PMOSx_high;1{sch}
3795 CPMOSx_high;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S1|prototype_center()I[0,0]
3796 IPMOSx_high;1{ic}|PMOS@0||15.25|12.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
3797 IPMOSf_high;1{ic}|PMOSf@0||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : @X < 0.5 ? (0.5 * (2 - 0.4) / @X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 0.5 ? 6.0*@X : 3
3798 Ngeneric:Facet-Center|art@0||0|0||||AV
3799 NOff-Page|conn@0||5|11.5||||
3800 NOff-Page|conn@1||-9.5|7||||
3801 NOff-Page|conn@2||5|1||||
3802 NWire_Pin|pin@1||0|11.5||||
3803 NWire_Pin|pin@2||0|1||||
3804 Ngeneric:Invisible-Pin|pin@3||-0.5|23.5|||||ART_message(D5G6;)SPMOSx_high
3805 Ngeneric:Invisible-Pin|pin@4||-0.5|18.5|||||ART_message(D5G2;)S3 terminal high-threshold strength-based PMOS device
3806 Awire|net@0|||0|PMOSf@0|g|-3.5|7|conn@1|y|-7.5|7
3807 Awire|net@1|||900|pin@1||0|11.5|PMOSf@0|s|0|9
3808 Awire|net@2|||2700|pin@2||0|1|PMOSf@0|d|0|5
3809 Awire|net@3|||1800|pin@1||0|11.5|conn@0|a|3|11.5
3810 Awire|net@4|||0|conn@2|a|3|1|pin@2||0|1
3811 Ed||D5G2;|conn@2|y|B
3812 Eg||D5G2;|conn@1|a|I
3813 Es||D5G2;|conn@0|y|B
3814 X
3815
3816 # Cell PMOSx_low;1{ic}
3817 CPMOSx_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[-8000,16000]
3818 Ngeneric:Facet-Center|art@0||0|0||||AV
3819 NThick-Circle|art@1||-1.5|0|1|1|RR||ART_color()I10
3820 Ngeneric:Invisible-Pin|pin@0||0|2||||
3821 Nschematic:Bus_Pin|pin@1||0|-2|-2|-2||
3822 Nschematic:Bus_Pin|pin@2||-2.5|0|-2|-2||
3823 NPin|pin@3||0|1||||
3824 NPin|pin@4||-0.75|1|1|1||
3825 NPin|pin@5||-0.75|-1|1|1||
3826 NPin|pin@6||0|-1||||
3827 NPin|pin@7||0|-2||||
3828 NPin|pin@8||-2.5|0|||RR|
3829 NPin|pin@9||-2|0|1|1|RRR|
3830 NPin|pin@10||0|2||||
3831 NPin|pin@11||-1|1|1|1|Y|
3832 NPin|pin@12||-1|-1|1|1|Y|
3833 AThicker|net@0|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I10
3834 AThicker|net@1|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I10
3835 AThicker|net@2|||FS1800|pin@8||-2.5|0|pin@9||-2|0|ART_color()I10
3836 AThicker|net@3|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I10
3837 AThicker|net@4|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I10
3838 AThicker|net@5|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I10
3839 AThicker|net@6|||FS2700|pin@12||-1|-1|pin@11||-1|1|ART_color()I10
3840 Ed||D8G1;|pin@1||B
3841 Eg||D6G1;|pin@2||I
3842 Es||D2G1;|pin@0||B
3843 X
3844
3845 # Cell PMOSx_low;1{sch}
3846 CPMOSx_low;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S1|prototype_center()I[0,0]
3847 IPMOSx_low;1{ic}|PMOS@0||15.25|12.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
3848 IPMOSf_low;1{ic}|PMOSf@0||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : @X < 0.5 ? (0.5 * (2 - 0.4) / @X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 0.5 ? 6.0*@X : 3
3849 Ngeneric:Facet-Center|art@0||0|0||||AV
3850 NOff-Page|conn@0||5|11.5||||
3851 NOff-Page|conn@1||-9.5|7||||
3852 NOff-Page|conn@2||5|1||||
3853 NWire_Pin|pin@1||0|11.5||||
3854 NWire_Pin|pin@2||0|1||||
3855 Ngeneric:Invisible-Pin|pin@3||-0.5|23.5|||||ART_message(D5G6;)SPMOSx_low
3856 Ngeneric:Invisible-Pin|pin@4||-0.5|18.5|||||ART_message(D5G2;)S3 terminal low_threshold strength-based PMOS device
3857 Awire|net@0|||0|PMOSf@0|g|-2.5|7|conn@1|y|-7.5|7
3858 Awire|net@1|||900|pin@1||0|11.5|PMOSf@0|s|0|9
3859 Awire|net@2|||2700|pin@2||0|1|PMOSf@0|d|0|5
3860 Awire|net@3|||1800|pin@1||0|11.5|conn@0|a|3|11.5
3861 Awire|net@4|||0|conn@2|a|3|1|pin@2||0|1
3862 Ed||D5G2;|conn@2|y|B
3863 Eg||D5G2;|conn@1|a|I
3864 Es||D5G2;|conn@0|y|B
3865 X
3866
3867 # Cell PMOSxwk;1{ic}
3868 CPMOSxwk;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[-8000,16000]
3869 Ngeneric:Facet-Center|art@0||0|0||||AV
3870 NThick-Circle|art@1||-1.5|0|0.5|0.5|RR||ART_color()I10
3871 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
3872 NPin|pin@1||-1.25|-0.75|1|1|Y|
3873 NPin|pin@2||-1.25|0.75|1|1|Y|
3874 NPin|pin@3||0|2||||
3875 NPin|pin@4||-1.75|0|1|1|RRR|
3876 NPin|pin@5||-3|0|||RR|
3877 NPin|pin@6||0|-2||||
3878 NPin|pin@7||0|-0.75||||
3879 NPin|pin@8||-0.75|-0.75|1|1||
3880 NPin|pin@9||-0.75|0.75|1|1||
3881 NPin|pin@10||0|0.75||||
3882 Nschematic:Bus_Pin|pin@11||-3|0|-2|-2||
3883 Nschematic:Bus_Pin|pin@12||0|-2|-2|-2||
3884 Ngeneric:Invisible-Pin|pin@13||0|2||||
3885 AThicker|net@0|||FS2700|pin@1||-1.25|-0.75|pin@2||-1.25|0.75|ART_color()I10
3886 AThicker|net@1|||FS900|pin@9||-0.75|0.75|pin@8||-0.75|-0.75|ART_color()I10
3887 AThicker|net@2|||FS900|pin@7||0|-0.75|pin@6||0|-2|ART_color()I10
3888 AThicker|net@3|||FS2700|pin@10||0|0.75|pin@3||0|2|ART_color()I10
3889 AThicker|net@4|||FS1800|pin@5||-3|0|pin@4||-1.75|0|ART_color()I10
3890 AThicker|net@5|||FS1800|pin@8||-0.75|-0.75|pin@7||0|-0.75|ART_color()I10
3891 AThicker|net@6|||FS0|pin@10||0|0.75|pin@9||-0.75|0.75|ART_color()I10
3892 Ed||D8G1;|pin@12||B
3893 Eg||D6G1;|pin@11||I
3894 Es||D2G1;|pin@13||B
3895 X
3896
3897 # Cell PMOSxwk;1{sch}
3898 CPMOSxwk;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S1|prototype_center()I[0,0]
3899 IPMOSfwk;1{ic}|PMOSfwk@0||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : @X < 0.5 ? (0.5 * (2 - 0.4) / @X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 0.5 ? 6.0*@X : 3|ATTR_GEO()I0
3900 IPMOSxwk;1{ic}|PMOSwk@0||22.25|13.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
3901 Ngeneric:Facet-Center|art@0||0|0||||AV
3902 NOff-Page|conn@0||5|1||||
3903 NOff-Page|conn@1||-8|7||||
3904 NOff-Page|conn@2||5|11.5||||
3905 Ngeneric:Invisible-Pin|pin@0||-0.5|18.5|||||ART_message(D5G2;)S3 terminal standard threshold strength based weak PMOS device
3906 Ngeneric:Invisible-Pin|pin@1||-0.5|23.5|||||ART_message(D5G6;)SPMOSxwk
3907 NWire_Pin|pin@2||0|1||||
3908 NWire_Pin|pin@3||0|11.5||||
3909 Awire|net@0|||900|pin@3||0|11.5|PMOSfwk@0|s|0|9
3910 Awire|net@1|||1800|conn@1|y|-6|7|PMOSfwk@0|g|-3|7
3911 Awire|net@2|||2700|pin@2||0|1|PMOSfwk@0|d|0|5
3912 Awire|net@3|||0|conn@0|a|3|1|pin@2||0|1
3913 Awire|net@4|||1800|pin@3||0|11.5|conn@2|a|3|11.5
3914 Ed||D5G2;|conn@0|y|B
3915 Eg||D5G2;|conn@1|a|I
3916 Es||D5G2;|conn@2|y|B
3917 X
3918
3919 # Cell PMOSxwk_high;1{ic}
3920 CPMOSxwk_high;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[-8000,16000]
3921 Ngeneric:Facet-Center|art@0||0|0||||AV
3922 NThick-Circle|art@1||-2|0|0.5|0.5|RR||ART_color()I10
3923 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
3924 NPin|pin@1||-1.75|-0.75|1|1|Y|
3925 NPin|pin@2||-1.75|0.75|1|1|Y|
3926 NPin|pin@3||0|2||||
3927 NPin|pin@4||-2.25|0|1|1|RRR|
3928 NPin|pin@5||-3|0|||RR|
3929 NPin|pin@6||0|-2||||
3930 NPin|pin@7||0|-0.75||||
3931 NPin|pin@8||-0.75|-0.75|1|1||
3932 NPin|pin@9||-0.75|0.75|1|1||
3933 NPin|pin@10||0|0.75||||
3934 Nschematic:Bus_Pin|pin@11||-3|0|-2|-2||
3935 Nschematic:Bus_Pin|pin@12||0|-2|-2|-2||
3936 Ngeneric:Invisible-Pin|pin@13||0|2||||
3937 AThicker|net@0|||FS2700|pin@1||-1.75|-0.75|pin@2||-1.75|0.75|ART_color()I10
3938 AThicker|net@1|||FS900|pin@9||-0.75|0.75|pin@8||-0.75|-0.75|ART_color()I10
3939 AThicker|net@2|||FS900|pin@7||0|-0.75|pin@6||0|-2|ART_color()I10
3940 AThicker|net@3|||FS2700|pin@10||0|0.75|pin@3||0|2|ART_color()I10
3941 AThicker|net@4|||FS1800|pin@5||-3|0|pin@4||-2.25|0|ART_color()I10
3942 AThicker|net@5|||FS1800|pin@8||-0.75|-0.75|pin@7||0|-0.75|ART_color()I10
3943 AThicker|net@6|||FS0|pin@10||0|0.75|pin@9||-0.75|0.75|ART_color()I10
3944 Ed||D8G1;|pin@12||B
3945 Eg||D6G1;|pin@11||I
3946 Es||D2G1;|pin@13||B
3947 X
3948
3949 # Cell PMOSxwk_high;1{sch}
3950 CPMOSxwk_high;1{sch}||schematic|1021415734000|1158100857746||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S1|prototype_center()I[0,0]
3951 IPMOSfwk_high;1{ic}|PMOSfwk@0||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : @X < 0.5 ? (0.5 * (2 - 0.4) / @X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 0.5 ? 6.0*@X : 3|ATTR_GEO()I0
3952 IPMOSxwk_high;1{ic}|PMOSwk@0||22.25|13.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
3953 Ngeneric:Facet-Center|art@0||0|0||||AV
3954 NOff-Page|conn@0||5|1||||
3955 NOff-Page|conn@1||-8|7||||
3956 NOff-Page|conn@2||5|11.5||||
3957 Ngeneric:Invisible-Pin|pin@0||-0.5|18.5|||||ART_message(D5G2;)S3 terminal high-threshold strength based weak PMOS device
3958 Ngeneric:Invisible-Pin|pin@1||-0.5|23.5|||||ART_message(D5G6;)SPMOSxwk_high
3959 NWire_Pin|pin@2||0|1||||
3960 NWire_Pin|pin@3||0|11.5||||
3961 Awire|net@0|||900|pin@3||0|11.5|PMOSfwk@0|s|0|9
3962 Awire|net@1|||1800|conn@1|y|-6|7|PMOSfwk@0|g|-3|7
3963 Awire|net@2|||2700|pin@2||0|1|PMOSfwk@0|d|0|5
3964 Awire|net@3|||0|conn@0|a|3|1|pin@2||0|1
3965 Awire|net@4|||1800|pin@3||0|11.5|conn@2|a|3|11.5
3966 Ed||D5G2;|conn@0|y|B
3967 Eg||D5G2;|conn@1|a|I
3968 Es||D5G2;|conn@2|y|B
3969 X
3970
3971 # Cell PMOSxwk_low;1{ic}
3972 CPMOSxwk_low;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3.5;Y0.5;)S1|prototype_center()I[-8000,16000]
3973 Ngeneric:Facet-Center|art@0||0|0||||AV
3974 NThick-Circle|art@1||-1.25|0|0.5|0.5|RR||ART_color()I10
3975 Ngeneric:Invisible-Pin|pin@0||-0.5|0|||||ART_message(D5G1;)S[wk]
3976 NPin|pin@1||-1|-0.75|1|1|Y|
3977 NPin|pin@2||-1|0.75|1|1|Y|
3978 NPin|pin@3||0|2||||
3979 NPin|pin@4||-1.5|0|1|1|RRR|
3980 NPin|pin@5||-2.5|0|||RR|
3981 NPin|pin@6||0|-2||||
3982 NPin|pin@7||0|-0.75||||
3983 NPin|pin@8||-0.75|-0.75|1|1||
3984 NPin|pin@9||-0.75|0.75|1|1||
3985 NPin|pin@10||0|0.75||||
3986 Nschematic:Bus_Pin|pin@11||-2.5|0|-2|-2||
3987 Nschematic:Bus_Pin|pin@12||0|-2|-2|-2||
3988 Ngeneric:Invisible-Pin|pin@13||0|2||||
3989 AThicker|net@0|||FS2700|pin@1||-1|-0.75|pin@2||-1|0.75|ART_color()I10
3990 AThicker|net@1|||FS900|pin@9||-0.75|0.75|pin@8||-0.75|-0.75|ART_color()I10
3991 AThicker|net@2|||FS900|pin@7||0|-0.75|pin@6||0|-2|ART_color()I10
3992 AThicker|net@3|||FS2700|pin@10||0|0.75|pin@3||0|2|ART_color()I10
3993 AThicker|net@4|||FS1800|pin@5||-2.5|0|pin@4||-1.5|0|ART_color()I10
3994 AThicker|net@5|||FS1800|pin@8||-0.75|-0.75|pin@7||0|-0.75|ART_color()I10
3995 AThicker|net@6|||FS0|pin@10||0|0.75|pin@9||-0.75|0.75|ART_color()I10
3996 Ed||D8G1;|pin@12||B
3997 Eg||D6G1;|pin@11||I
3998 Es||D2G1;|pin@13||B
3999 X
4000
4001 # Cell PMOSxwk_low;1{sch}
4002 CPMOSxwk_low;1{sch}||schematic|1021415734000|1158100860825||ATTR_Delay(D5G1;HNPX-8.5;Y-0.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-8.5;Y1.25;)S1|prototype_center()I[0,0]
4003 IPMOSfwk_low;1{ic}|PMOSfwk@0||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S@X == 0 ? 0 : @X < 0.5 ? (0.5 * (2 - 0.4) / @X + 0.4) : 2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S@X > 0.5 ? 6.0*@X : 3|ATTR_GEO()I0
4004 IPMOSxwk_low;1{ic}|PMOSwk@0||22.25|13.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1
4005 Ngeneric:Facet-Center|art@0||0|0||||AV
4006 NOff-Page|conn@0||5|1||||
4007 NOff-Page|conn@1||-8|7||||
4008 NOff-Page|conn@2||5|11.5||||
4009 Ngeneric:Invisible-Pin|pin@0||-0.5|18.5|||||ART_message(D5G2;)S3 terminal low-threshold strength based weak PMOS device
4010 Ngeneric:Invisible-Pin|pin@1||-0.5|23.5|||||ART_message(D5G6;)SPMOSxwk_low
4011 NWire_Pin|pin@2||0|1||||
4012 NWire_Pin|pin@3||0|11.5||||
4013 Awire|net@0|||900|pin@3||0|11.5|PMOSfwk@0|s|0|9
4014 Awire|net@1|||1800|conn@1|y|-6|7|PMOSfwk@0|g|-2.5|7
4015 Awire|net@2|||2700|pin@2||0|1|PMOSfwk@0|d|0|5
4016 Awire|net@3|||0|conn@0|a|3|1|pin@2||0|1
4017 Awire|net@4|||1800|pin@3||0|11.5|conn@2|a|3|11.5
4018 Ed||D5G2;|conn@0|y|B
4019 Eg||D5G2;|conn@1|a|I
4020 Es||D5G2;|conn@2|y|B
4021 X
4022
4023 # Cell R110;1{ic}
4024 CR110;1{ic}||artwork|1047945855000|1204140525662|E|ATTR_L(D5FLeave alone;G1;HNOLPX-2;Y-2.25;)S40|ATTR_W(D5FLeave alone;G1;HNOLPX2.25;Y-2.25;)S8.8|prototype_center()I[0,0]
4025 Ngeneric:Facet-Center|art@0||0|0||||AV
4026 NPin|pin@0||3|0|1|1|Y|
4027 NPin|pin@1||2|0|1|1|Y|
4028 NPin|pin@2||1.5|-1|1|1|Y|
4029 NPin|pin@3||1|1|1|1|Y|
4030 NPin|pin@4||0.5|-1|1|1|Y|
4031 NPin|pin@5||0|1|1|1|Y|
4032 NPin|pin@6||-0.5|-1|1|1|Y|
4033 NPin|pin@7||-1|1|1|1|Y|
4034 NPin|pin@8||-1.5|-1|1|1|Y|
4035 NPin|pin@9||-2|0|1|1|Y|
4036 NPin|pin@10||-3|0|1|1|Y|
4037 Nschematic:Bus_Pin|pin@11||3|0||||
4038 Nschematic:Bus_Pin|pin@12||-3|0||||
4039 NPin|pin@13||-2.5|-0.75|1|1||
4040 NPin|pin@14||2.5|-0.75|1|1||
4041 NPin|pin@15||0|-1.5|1|1|YRRR|
4042 NPin|pin@16||0|-0.75|1|1|YRRR|
4043 Ngeneric:Universal-Pin|pin@17||0|1|-1|-1||
4044 NPin|pin@18||1|-1.5|1|1|YRR|
4045 NPin|pin@19||-1|-1.5|1|1|YRR|
4046 NPin|pin@20||0.5|-2|1|1|YRR|
4047 NPin|pin@21||-0.5|-2|1|1|YRR|
4048 Ngeneric:Invisible-Pin|pin@22||0.5|1|||||ART_message(D5G1;)S110
4049 AThicker|net@0|||FS1800|pin@1||2|0|pin@0||3|0|ART_color()I74
4050 AThicker|net@1|||FS2434|pin@2||1.5|-1|pin@1||2|0|ART_color()I74
4051 AThicker|net@2|||FS1040|pin@3||1|1|pin@2||1.5|-1|ART_color()I74
4052 AThicker|net@3|||FS2560|pin@4||0.5|-1|pin@3||1|1|ART_color()I74
4053 AThicker|net@4|||FS1040|pin@5||0|1|pin@4||0.5|-1|ART_color()I74
4054 AThicker|net@5|||FS2560|pin@6||-0.5|-1|pin@5||0|1|ART_color()I74
4055 AThicker|net@6|||FS1040|pin@7||-1|1|pin@6||-0.5|-1|ART_color()I74
4056 AThicker|net@7|||FS2560|pin@8||-1.5|-1|pin@7||-1|1|ART_color()I74
4057 AThicker|net@8|||FS1166|pin@9||-2|0|pin@8||-1.5|-1|ART_color()I74
4058 AThicker|net@9|||FS1800|pin@10||-3|0|pin@9||-2|0|ART_color()I74
4059 AThicker|net@10|||FS1800|pin@13||-2.5|-0.75|pin@14||2.5|-0.75|ART_color()I74
4060 AThicker|net@11|||FS2700|pin@15||0|-1.5|pin@16||0|-0.75|ART_color()I74
4061 AThicker|net@12|||FS0|pin@18||1|-1.5|pin@19||-1|-1.5|ART_color()I74
4062 AThicker|net@13|||FS0|pin@20||0.5|-2|pin@21||-0.5|-2|ART_color()I74
4063 Ein||D5G2;|pin@12||I
4064 Eout||D5G2;|pin@11||O
4065 X
4066
4067 # Cell R110;1{sch}
4068 CR110;1{sch}||schematic|1047945706000|1159314050023||ATTR_L(D5FLeave alone;G1;HNOLPX-22.5;Y-0.75;)S40|ATTR_W(D5FLeave alone;G1;HNOLPX-22.25;Y-1.75;)S8.8|ATTR_CDL_template(D5G1;NTX-2.5;Y-14;)SXR$(node_name) $(in) $(out) /rnpolywo l='$(L)' w='$(W)' scale=0.05u|ATTR_NCC(D5G1;NTX-1.5;Y-18.5;)SresistorType  N-Poly-RPO-Resistor|ATTR_SPICE_template_assura(D5G1;NTX0.5;Y-23;)SXR$(node_name) $(in) $(out) rnpolywo l='$(L)' w='$(W)' scale=0.05u|ATTR_SPICE_template_calibre(D5G1;NTX0.5;Y-21;)SXR$(node_name) $(in) $(out) rnpolywo l='$(L)' w='$(W)' scale=0.05u|ATTR_SPICE_template_hspice(D5G1;NTX-1.5;Y-16.25;)SXR$(node_name) $(in) $(out) rnpolywo l='$(L)' w='$(W)' scale=0.05u|ATTR_SPICE_template_smartspice(D5G1;NTY-12;)SXR$(node_name) $(in) $(out) rnpolywo l='$(L)' w='$(W)' scale=0.05u|prototype_center()I[0,0]
4069 Ngeneric:Facet-Center|art@0||0|0||||AV
4070 NCapacitor|cap@0||-5.5|0|||||SCHEM_capacitance(D5FLeave alone;G1.5;OLUCX1.75;Y-1.25;)S(0.265*@W*@L + 8.882*@W + 4.43*@L + 74.42)*1e-18/2
4071 NCapacitor|cap@1||4.75|0|||||SCHEM_capacitance(D5FLeave alone;G1.5;OLUCX1.75;Y-1.25;)S(0.265*@W*@L + 8.882*@W + 4.43*@L + 74.42)*1e-18/2
4072 NOff-Page|conn@0||10|5||||
4073 NOff-Page|conn@1||-11.5|5||||
4074 IR110;1{ic}|gateResi@0||25.5|7.5|||D0G4;|ATTR_L(D5FLeave alone;G1;NOLPX-2;Y-2.25;)S40|ATTR_W(D5FLeave alone;G1;NOLPX2.25;Y-2.25;)S8.8
4075 NGround|gnd@0||0|-8.5||||
4076 Ngeneric:Invisible-Pin|pin@0||1|20.5|||||ART_message(D5G2;)Sn-type unsilicided polysilicon resistor for TSMC90nm process
4077 Ngeneric:Invisible-Pin|pin@1||2.5|26.5|||||ART_message(D5G5;)SR110 (rnpolywo)
4078 NWire_Pin|pin@2||-5.5|5||||
4079 NWire_Pin|pin@3||-5.5|-4.5||||
4080 NWire_Pin|pin@4||4.75|5||||
4081 NWire_Pin|pin@5||4.75|-4.5||||
4082 Ngeneric:Invisible-Pin|pin@6||1.5|15|||||ART_message(D5G2;)S["minumum recommended dimensions are l=2.0um, w=0.44um",target resistance is approx 110 ohm/sq]
4083 NWire_Pin|pin@7||0|-4.5||||
4084 NResistor|res@0||-0.5|5||||1|ATTR_length(D5FLeave alone;G1;NOLY-1;)S@L|ATTR_width(D5FLeave alone;G1;NOLY-2;)S@W|SCHEM_resistance(D5FLeave alone;G2;OLY1.5;)S(@L*110/@W)
4085 Awire|net@0|||0|pin@2||-5.5|5|conn@1|y|-9.5|5
4086 Awire|net@1|||1800|pin@4||4.75|5|conn@0|a|8|5
4087 Awire|net@2|||0|res@0|a|-2.5|5|pin@2||-5.5|5
4088 Awire|net@3|||2700|cap@0|a|-5.5|2|pin@2||-5.5|5
4089 Awire|net@4|||900|cap@0|b|-5.5|-2|pin@3||-5.5|-4.5
4090 Awire|net@6|||1800|res@0|b|1.5|5|pin@4||4.75|5
4091 Awire|net@7|||2700|cap@1|a|4.75|2|pin@4||4.75|5
4092 Awire|net@8|||900|cap@1|b|4.75|-2|pin@5||4.75|-4.5
4093 Awire|net@9|||0|pin@7||0|-4.5|pin@3||-5.5|-4.5
4094 Awire|net@10|||0|pin@5||4.75|-4.5|pin@7||0|-4.5
4095 Awire|net@11|||2700|gnd@0||0|-6.5|pin@7||0|-4.5
4096 Ein||D5G2;|conn@1|y|I
4097 Eout||D5G2;|conn@0|y|O
4098 X
4099
4100 # Cell R440;1{ic}
4101 CR440;1{ic}||artwork|1047945855000|1204140525662|E|ATTR_L(D5FLeave alone;G1;HNOLPX-2;Y-2.25;)S40|ATTR_W(D5FLeave alone;G1;HNOLPX2.25;Y-2.25;)S8.8|prototype_center()I[0,0]
4102 Ngeneric:Facet-Center|art@0||0|0||||AV
4103 NPin|pin@0||3|0|1|1|Y|
4104 NPin|pin@1||2|0|1|1|Y|
4105 NPin|pin@2||1.5|-1|1|1|Y|
4106 NPin|pin@3||1|1|1|1|Y|
4107 NPin|pin@4||0.5|-1|1|1|Y|
4108 NPin|pin@5||0|1|1|1|Y|
4109 NPin|pin@6||-0.5|-1|1|1|Y|
4110 NPin|pin@7||-1|1|1|1|Y|
4111 NPin|pin@8||-1.5|-1|1|1|Y|
4112 NPin|pin@9||-2|0|1|1|Y|
4113 NPin|pin@10||-3|0|1|1|Y|
4114 Nschematic:Bus_Pin|pin@11||3|0||||
4115 Nschematic:Bus_Pin|pin@12||-3|0||||
4116 NPin|pin@13||-2.5|-0.75|1|1||
4117 NPin|pin@14||2.5|-0.75|1|1||
4118 NPin|pin@15||0|-1.5|1|1|YRRR|
4119 NPin|pin@16||0|-0.75|1|1|YRRR|
4120 Ngeneric:Universal-Pin|pin@17||0|1|-1|-1||
4121 NPin|pin@18||1|-1.5|1|1|YRR|
4122 NPin|pin@19||-1|-1.5|1|1|YRR|
4123 NPin|pin@20||0.5|-2|1|1|YRR|
4124 NPin|pin@21||-0.5|-2|1|1|YRR|
4125 Ngeneric:Invisible-Pin|pin@22||0.5|1|||||ART_message(D5G1;)S440
4126 AThicker|net@0|||FS1800|pin@1||2|0|pin@0||3|0|ART_color()I74
4127 AThicker|net@1|||FS2434|pin@2||1.5|-1|pin@1||2|0|ART_color()I74
4128 AThicker|net@2|||FS1040|pin@3||1|1|pin@2||1.5|-1|ART_color()I74
4129 AThicker|net@3|||FS2560|pin@4||0.5|-1|pin@3||1|1|ART_color()I74
4130 AThicker|net@4|||FS1040|pin@5||0|1|pin@4||0.5|-1|ART_color()I74
4131 AThicker|net@5|||FS2560|pin@6||-0.5|-1|pin@5||0|1|ART_color()I74
4132 AThicker|net@6|||FS1040|pin@7||-1|1|pin@6||-0.5|-1|ART_color()I74
4133 AThicker|net@7|||FS2560|pin@8||-1.5|-1|pin@7||-1|1|ART_color()I74
4134 AThicker|net@8|||FS1166|pin@9||-2|0|pin@8||-1.5|-1|ART_color()I74
4135 AThicker|net@9|||FS1800|pin@10||-3|0|pin@9||-2|0|ART_color()I74
4136 AThicker|net@10|||FS1800|pin@13||-2.5|-0.75|pin@14||2.5|-0.75|ART_color()I74
4137 AThicker|net@11|||FS2700|pin@15||0|-1.5|pin@16||0|-0.75|ART_color()I74
4138 AThicker|net@12|||FS0|pin@18||1|-1.5|pin@19||-1|-1.5|ART_color()I74
4139 AThicker|net@13|||FS0|pin@20||0.5|-2|pin@21||-0.5|-2|ART_color()I74
4140 Ein||D5G2;|pin@12||I
4141 Eout||D5G2;|pin@11||O
4142 X
4143
4144 # Cell R440;1{sch}
4145 CR440;1{sch}||schematic|1047945706000|1159314102885||ATTR_L(D5FLeave alone;G1;HNOLPX-22.5;Y-0.75;)S40|ATTR_W(D5FLeave alone;G1;HNOLPX-22.25;Y-1.75;)S8.8|ATTR_CDL_template(D5G1;NTX-2.5;Y-12.5;)SXR$(node_name) $(in) $(out) /rppolywo l='$(L)' w='$(W)' scale=0.05u|ATTR_NCC(D5G1;NTX-1.5;Y-17;)SresistorType  P-Poly-RPO-Resistor|ATTR_SPICE_template_assura(D5G1;NTX-1.5;Y-21;)SXR$(node_name) $(in) $(out) rppolywo l='$(L)' w='$(W)' scale=0.05u|ATTR_SPICE_template_calibre(D5G1;NTX-1.5;Y-19;)SXR$(node_name) $(in) $(out) rppolywo l='$(L)' w='$(W)' scale=0.05u|ATTR_SPICE_template_hspice(D5G1;NTX-1.5;Y-14.75;)SXR$(node_name) $(in) $(out) rppolywo l='$(L)' w='$(W)' scale=0.05u|prototype_center()I[0,0]
4146 Ngeneric:Facet-Center|art@0||0|0||||AV
4147 NCapacitor|cap@0||-5.5|0|||||SCHEM_capacitance(D5FLeave alone;G1.5;OLUCX1.75;Y-1.25;)S(0.265*@W*@L + 8.882*@W + 4.43*@L + 74.42)*1e-18/2
4148 NCapacitor|cap@1||4.75|0|||||SCHEM_capacitance(D5FLeave alone;G1.5;OLUCX1.75;Y-1.25;)S(0.265*@W*@L + 8.882*@W + 4.43*@L + 74.42)*1e-18/2
4149 NOff-Page|conn@0||10|5||||
4150 NOff-Page|conn@1||-11.5|5||||
4151 IR440;1{ic}|gateResi@0||25.5|7.5|||D0G4;|ATTR_L(D5FLeave alone;G1;NOLPX-2;Y-2.25;)S40|ATTR_W(D5FLeave alone;G1;NOLPX2.25;Y-2.25;)S8.8
4152 NGround|gnd@0||0|-9||||
4153 Ngeneric:Invisible-Pin|pin@0||1|20.5|||||ART_message(D5G2;)Sp-type unsilicided polysilicon resistor for TSMC90nm process
4154 Ngeneric:Invisible-Pin|pin@1||2.5|26.5|||||ART_message(D5G5;)SR440 (rppolywo)
4155 NWire_Pin|pin@2||-5.5|5||||
4156 NWire_Pin|pin@3||-5.5|-4.5||||
4157 NWire_Pin|pin@4||4.75|5||||
4158 NWire_Pin|pin@5||4.75|-4.5||||
4159 Ngeneric:Invisible-Pin|pin@6||1.5|15|||||ART_message(D5G2;)S["minumum recommended dimensions are l=2.0um, w=0.44um",target resistance is approx 440 ohm/sq]
4160 NWire_Pin|pin@7||0|-4.5||||
4161 NResistor|pres@0||0|5||||1|ATTR_length(D5FLeave alone;G1;NOLY-1;)S@L|ATTR_width(D5FLeave alone;G1;NOLY-2;)S@W|SCHEM_resistance(D5FLeave alone;G2;OLY1.5;)S(@L*440/@W)
4162 Awire|net@0|||0|pin@2||-5.5|5|conn@1|y|-9.5|5
4163 Awire|net@1|||1800|pin@4||4.75|5|conn@0|a|8|5
4164 Awire|net@3|||2700|cap@0|a|-5.5|2|pin@2||-5.5|5
4165 Awire|net@4|||900|cap@0|b|-5.5|-2|pin@3||-5.5|-4.5
4166 Awire|net@7|||2700|cap@1|a|4.75|2|pin@4||4.75|5
4167 Awire|net@8|||900|cap@1|b|4.75|-2|pin@5||4.75|-4.5
4168 Awire|net@9|||0|pin@7||0|-4.5|pin@3||-5.5|-4.5
4169 Awire|net@10|||0|pin@5||4.75|-4.5|pin@7||0|-4.5
4170 Awire|net@11|||2700|gnd@0||0|-7|pin@7||0|-4.5
4171 Awire|net@12|||1800|pres@0|b|2|5|pin@4||4.75|5
4172 Awire|net@13|||0|pres@0|a|-2|5|pin@2||-5.5|5
4173 Ein||D5G2;|conn@1|y|I
4174 Eout||D5G2;|conn@0|y|O
4175 X
4176
4177 # Cell gallery;1{lay}
4178 Cgallery;1{lay}||cmos90|1158345347649|1158345387584|
4179 Ngeneric:Facet-Center|art@0||0|0||||AV
4180 Ipnp2;1{lay}|pnp2@0||-113|6|||D5G4;
4181 Ipnp5;1{lay}|pnp2@1||357|6|||D5G4;
4182 Ipnp10;1{lay}|pnp2@2||905|6|||D5G4;
4183 X
4184
4185 # Cell gallery;1{sch}
4186 Cgallery;1{sch}||schematic|1158082936168|1158346546100|
4187 INMOS4f;1{ic}|NMOS4f@0||-28|50.5|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5G1;NPX3.25;Y-0.25;)I2|ATTR_W(D6G1;NPX1.75;Y0.75;)I3
4188 INMOS4f_high;1{ic}|NMOS4f_h@0||-37|50.5|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5G1;NPX3.25;Y-0.25;)I2|ATTR_W(D6G1;NPX1.75;Y0.75;)I3
4189 INMOS4f_io18;1{ic}|NMOS4f_i@0||-45.5|50.5|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5G1;NPX3.25;Y-0.25;)S4|ATTR_W(D6G1;NPX1.75;Y0.75;)I3
4190 INMOS4f_io25;1{ic}|NMOS4f_i@1||-54.5|50.5|||D5G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5G1;NPX3.25;Y-0.25;)S5.6|ATTR_W(D6G1;NPX1.75;Y0.75;)I3
4191 INMOS4f_io33;1{ic}|NMOS4f_i@2||-63.5|50.5|||D5G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5G1;NPX3.25;Y-0.25;)S7.6|ATTR_W(D6G1;NPX1.75;Y0.75;)I3
4192 INMOS4f_low;1{ic}|NMOS4f_l@0||-19|50.5|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5G1;NPX3.25;Y-0.25;)I2|ATTR_W(D6G1;NPX1.75;Y0.75;)I3
4193 INMOS4f_native;1{ic}|NMOS4f_n@0||-10|50.5|||D5G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5G1;NPX3.25;Y-0.25;)S4|ATTR_W(D6G1;NPX1.75;Y0.75;)S10
4194 INMOS4fwk;1{ic}|NMOS4fwk@0||11|50.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3|ATTR_GEO()I0
4195 INMOS4fwk_low;1{ic}|NMOS4fwk@1||20|50.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3|ATTR_GEO()I0
4196 INMOS4fwk_high;1{ic}|NMOS4fwk@2||2|50.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3|ATTR_GEO()I0
4197 INMOS4fwk_native;1{ic}|NMOS4fwk@3||29|51|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)S4|ATTR_W(D6G1;NPX2;Y1;)S10|ATTR_GEO()I0
4198 INMOS4x;1{ic}|NMOS4x@0||-28|74|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S1
4199 INMOS4x_io25;1{ic}|NMOS4x_i@0||-54.5|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4200 INMOS4x_io33;1{ic}|NMOS4x_i@1||-63|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4201 INMOS4x_io18;1{ic}|NMOS4x_i@2||-45.5|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4202 INMOSf;1{ic}|NMOSf@0||-28|57.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3
4203 INMOSf_high;1{ic}|NMOSf_hi@0||-37|57.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3
4204 INMOSf_io25;1{ic}|NMOSf_io@0||-54.5|57.5|||D5G4;|ATTR_Delay(P)I100|ATTR_L(D5G1;NPX3.5;)S5.6|ATTR_W(D6G1;NPX2;Y1;)I3
4205 INMOSf_io33;1{ic}|NMOSf_io@1||-63.5|57.5|||D5G4;|ATTR_Delay(P)I100|ATTR_L(D5G1;NPX3.5;)S7.6|ATTR_W(D6G1;NPX2;Y1;)I3
4206 INMOSf_io18;1{ic}|NMOSf_io@2||-45.5|57.5|||D5G4;|ATTR_Delay(D5G1;NPX3.25;Y-2.25;)I100|ATTR_L(D5G1;NPX3.25;Y-0.25;)S4|ATTR_W(D6G1;NPX1.75;Y0.75;)I3
4207 INMOSf_low;1{ic}|NMOSf_lo@0||-19|57.5|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3
4208 INMOSf_native;1{ic}|NMOSf_na@0||-10|57.5|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)S4|ATTR_W(D6G1;NPX2;Y1;)S10
4209 INMOSf_native_od25;1{ic}|NMOSf_na@1||-84.5|57.5|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)S24|ATTR_W(D6G1;NPX2;Y1;)S10
4210 INMOSf_native_od18;1{ic}|NMOSf_na@2||-75.5|57.5|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)S24|ATTR_W(D6G1;NPX2;Y1;)S10
4211 INMOSf_native_od33;1{ic}|NMOSf_na@3||-94.5|57.5|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)S24|ATTR_W(D6G1;NPX2;Y1;)S10
4212 INMOSfwk;1{ic}|NMOSfwk@0||11|57.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3|ATTR_GEO()I0
4213 INMOSfwk_low;1{ic}|NMOSfwk_@0||20|57.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3|ATTR_GEO()I0
4214 INMOSfwk_high;1{ic}|NMOSfwk_@1||2|57.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3|ATTR_GEO()I0
4215 INMOSfwk_native;1{ic}|NMOSfwk_@2||29|57.5|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)S4|ATTR_W(D6G1;NPX2;Y1;)S10|ATTR_GEO()I0
4216 INMOSx;1{ic}|NMOSx@0||-28|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4217 INMOSx_high;1{ic}|NMOSx_hi@0||-37|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4218 INMOSx_low;1{ic}|NMOSx_lo@0||-19|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4219 INMOSx_native;1{ic}|NMOSx_na@0||-10|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)S1
4220 INMOSx_native_od25;1{ic}|NMOSx_na@1||-84.5|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)S1
4221 INMOSx_native_od18;1{ic}|NMOSx_na@2||-75.5|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)S1
4222 INMOSx_native_od33;1{ic}|NMOSx_na@3||-94.5|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)S1
4223 INMOSxwk;1{ic}|NMOSxwk@0||11|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4224 INMOSxwk_low;1{ic}|NMOSxwk_@0||20|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4225 INMOSxwk_high;1{ic}|NMOSxwk_@1||2|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4226 INMOSxwk_native;1{ic}|NMOSxwk_@2||29|66|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4227 IPMOS4f;1{ic}|PMOS4f@0||-28|13|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3
4228 IPMOS4f_high;1{ic}|PMOS4f_h@0||-37|13|||D0G4;|ATTR_Delay(D5G1;NPX3.75;Y-2.25;)I100|ATTR_L(D5G1;NPX3.25;Y-0.25;)I2|ATTR_W(D5G1;NPX3;Y1;)I3
4229 IPMOS4f_io18;1{ic}|PMOS4f_i@0||-45.5|13|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5G1;NPX3.5;)S4|ATTR_W(D5G1;NPX3;Y1;)I3
4230 IPMOS4f_io25;1{ic}|PMOS4f_i@1||-54.5|13|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5G1;NPX3.5;)S5.6|ATTR_W(D5G1;NPX3;Y1;)I3
4231 IPMOS4f_io33;1{ic}|PMOS4f_i@2||-63.5|13|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5G1;NPX3.5;)S7.6|ATTR_W(D5G1;NPX3;Y1;)I3
4232 IPMOS4f_low;1{ic}|PMOS4f_l@0||-19|13|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3
4233 IPMOS4fwk;1{ic}|PMOS4fwk@0||11|13|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3
4234 IPMOS4fwk_high;1{ic}|PMOS4fwk@1||2|13|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3
4235 IPMOS4fwk_low;1{ic}|PMOS4fwk@2||20|13|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3
4236 IPMOS4x;1{ic}|PMOS4x@0||-28|35.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4237 IPMOS4x_io25;1{ic}|PMOS4x_i@0||-54.5|27.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1|ATTR_L()I2|ATTR_W()I3
4238 IPMOS4x_io33;1{ic}|PMOS4x_i@1||-63.5|27.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1|ATTR_L()I2|ATTR_W()I3
4239 IPMOS4x_io18;1{ic}|PMOS4x_i@2||-45.5|27.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1|ATTR_L()I2|ATTR_W()I3
4240 IPMOSf;1{ic}|PMOSf@0||-28|20|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3
4241 IPMOSf_high;1{ic}|PMOSf_hi@0||-37|20|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3
4242 IPMOSf_io18;1{ic}|PMOSf_io@0||-45.5|20|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5G1;NPX3.5;)S4|ATTR_W(D5G1;NPX3;Y1;)I3
4243 IPMOSf_io25;1{ic}|PMOSf_io@1||-54.5|20|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5G1;NPX3.5;)S5.6|ATTR_W(D5G1;NPX3;Y1;)I3
4244 IPMOSf_io33;1{ic}|PMOSf_io@2||-63.5|20|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-2.5;)I100|ATTR_L(D5G1;NPX3.5;)S7.6|ATTR_W(D5G1;NPX3;Y1;)I3
4245 IPMOSf_low;1{ic}|PMOSf_lo@0||-18.75|20|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3
4246 IPMOSfwk;1{ic}|PMOSfwk@0||11|20|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3|ATTR_GEO()I0
4247 IPMOSfwk_high;1{ic}|PMOSfwk_@0||2|20|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3|ATTR_GEO()I0
4248 IPMOSfwk_low;1{ic}|PMOSfwk_@1||20|20|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5G1;NPX3.5;)I2|ATTR_W(D6G1;NPX2;Y1;)I3|ATTR_GEO()I0
4249 IPMOSx;1{ic}|PMOSx@0||-28|27.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4250 IPMOSx_high;1{ic}|PMOSx_hi@0||-37|27.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4251 IPMOSx_low;1{ic}|PMOSx_lo@0||-19|27.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4252 IPMOSxwk;1{ic}|PMOSxwk@0||11|27.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4253 IPMOSxwk_high;1{ic}|PMOSxwk_@0||2|27.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4254 IPMOSxwk_low;1{ic}|PMOSxwk_@1||20|27.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
4255 IR110;1{ic}|R110@0||-95|17|||D5G1;T|ATTR_L(D5G1;NPX-2;Y-2.25;)I40|ATTR_W(D5G1;NPX2.25;Y-2.25;)D8.8
4256 IR440;1{ic}|R440@0||-95|10.5|||D5G1;T|ATTR_L(D5G1;NPX-2;Y-2.25;)I40|ATTR_W(D5G1;NPX2.25;Y-2.25;)D8.8
4257 Ngeneric:Facet-Center|art@0||0|0||||AV
4258 IgateResistor;1{ic}|gateResi@0||-95.5|40.5|||D0G4;|ATTR_W(D5G1;NPY-1.5;)I3
4259 Indio;1{ic}|ndio@0||-79|36|||D5G4;
4260 Ngeneric:Invisible-Pin|pin@1||-38|86|||||ART_message(D5G2;R)Shigh-threshold
4261 Ngeneric:Invisible-Pin|pin@2||-19.5|86|||||ART_message(D5G2;R)Slow-threshold
4262 Ngeneric:Invisible-Pin|pin@3||-10.5|86|||||ART_message(D5G2;R)Snative
4263 Ngeneric:Invisible-Pin|pin@4||-28.5|86|||||ART_message(D5G2;R)Sstandard
4264 Ngeneric:Invisible-Pin|pin@5||-46|86|||||ART_message(D5G2;R)S1.8V thick-ox
4265 Ngeneric:Invisible-Pin|pin@6||-55|86|||||ART_message(D5G2;R)S2.5V thick-ox
4266 Ngeneric:Invisible-Pin|pin@7||-64|86|||||ART_message(D5G2;R)S3.3V thick-ox
4267 Ngeneric:Invisible-Pin|pin@8||-76|86|||||ART_message(D5G2;R)S1.8V native
4268 Ngeneric:Invisible-Pin|pin@9||-84.5|86|||||ART_message(D5G2;R)S2.5V native
4269 Ngeneric:Invisible-Pin|pin@10||-95|86|||||ART_message(D5G2;R)S3.3V native
4270 Ngeneric:Invisible-Pin|pin@11||1.5|86|||||ART_message(D5G2;R)Sweak high-threshold
4271 Ngeneric:Invisible-Pin|pin@12||10|86|||||ART_message(D5G2;R)Sweak standard
4272 Ngeneric:Invisible-Pin|pin@13||19.5|86|||||ART_message(D5G2;R)Sweak low-threshold
4273 Ngeneric:Invisible-Pin|pin@14||28.5|86|||||ART_message(D5G2;R)Sweak native
4274 Ipnp5;1{ic}|pnp2@0||-79.5|20|||D5G4;
4275 Ipnp10;1{ic}|pnp2@1||-79.5|13|||D5G4;
4276 Ipnp2;1{ic}|singlepn@2||-79.5|27|||D5G4;
4277 Iwire90;1{ic}|wire90@0||-110.5|37|||D5G4;|ATTR_L(D5G1;PUD)I100|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)S2|ATTR_width(D5G1;NPY-2;)S2.8
4278 Iwire90xcpl2;1{ic}|wire90xc@0||-110.5|30|||D5G4;|ATTR_L(D5G1;PUDY1;)I100|ATTR_layer(D5G1;NPY-0.5;)S2|ATTR_width(D5G1;NPY-1.5;)S2.8
4279 Iwire90xcpl3;1{ic}|wire90xc@1||-110.5|23|||D5G4;|ATTR_L(D5G1;PUDY1;)I100|ATTR_layer(D5G1;NPY-0.5;)S2|ATTR_width(D5G1;NPY-1.5;)S2.8
4280 IwireC;1{ic}|wireC@0||-95|26.5|||D0G4;|ATTR_L(D6G1.5;NOJPX1.5;Y0.5;)S100|ATTR_layer(D5G1;NPX3;Y-1.5;)I1|ATTR_width(D5G1;NPX3;Y-0.5;)I3
4281 IwireR;1{ic}|wireC@1||-95|34|||D0G4;|ATTR_L(D6G1.5;NOJPX1.5;Y0.5;)S100|ATTR_layer(D5G1;NPX3;Y-1.5;)I1|ATTR_width(D5G1;NPX3;Y-0.5;)I3
4282 Iwire_xcp_gnd;1{ic}|wire_xcp@0||-110.5|17|||D5G4;|ATTR_C(D5G1;NPURX2.5;Y-1;)S0.223f|ATTR_L(D5G1;PURY1;)I100|ATTR_LEWIRE(PUR)I1|ATTR_R(D5G1;NPURX-3;Y-1;)S24m|ATTR_layer(PUR)I2|ATTR_width(PUR)D2.8
4283 Iwire_xcpl_sides;1{ic}|wire_xcp@1||-110.5|12|||D5G4;|ATTR_C(D5G1;NPUCY-1;)S0.0000223p|ATTR_L(D5G1;PUDY1;)I100|ATTR_LEIGNORE(PUD)I1
4284 X
4285
4286 # Cell gateResistor;1{ic}
4287 CgateResistor;1{ic}||artwork|1047945855000|1204140525662|E|ATTR_W(D5G1;HNOLPY-1.5;)S3|prototype_center()I[0,0]
4288 Ngeneric:Facet-Center|art@0||0|0||||AV
4289 NPin|pin@0||3|0|1|1||
4290 NPin|pin@1||2|0|1|1||
4291 NPin|pin@2||1.5|1|1|1||
4292 NPin|pin@3||1|-1|1|1||
4293 NPin|pin@4||0.5|1|1|1||
4294 NPin|pin@5||0|-1|1|1||
4295 NPin|pin@6||-0.5|1|1|1||
4296 NPin|pin@7||-1|-1|1|1||
4297 NPin|pin@8||-1.5|1|1|1||
4298 NPin|pin@9||-2|0|1|1||
4299 NPin|pin@10||-3|0|1|1||
4300 Nschematic:Bus_Pin|pin@11||3|0||||
4301 Nschematic:Bus_Pin|pin@12||-3|0||||
4302 AThicker|net@0|||FS0|pin@0||3|0|pin@1||2|0|ART_color()I74
4303 AThicker|net@1|||FS2966|pin@1||2|0|pin@2||1.5|1|ART_color()I74
4304 AThicker|net@2|||FS760|pin@2||1.5|1|pin@3||1|-1|ART_color()I74
4305 AThicker|net@3|||FS2840|pin@3||1|-1|pin@4||0.5|1|ART_color()I74
4306 AThicker|net@4|||FS760|pin@4||0.5|1|pin@5||0|-1|ART_color()I74
4307 AThicker|net@5|||FS2840|pin@5||0|-1|pin@6||-0.5|1|ART_color()I74
4308 AThicker|net@6|||FS760|pin@6||-0.5|1|pin@7||-1|-1|ART_color()I74
4309 AThicker|net@7|||FS2840|pin@7||-1|-1|pin@8||-1.5|1|ART_color()I74
4310 AThicker|net@8|||FS634|pin@8||-1.5|1|pin@9||-2|0|ART_color()I74
4311 AThicker|net@9|||FS0|pin@9||-2|0|pin@10||-3|0|ART_color()I74
4312 Ein||D5G2;|pin@12||I
4313 Eout||D5G2;|pin@11||O
4314 X
4315
4316 # Cell gateResistor;1{sch}
4317 CgateResistor;1{sch}||schematic|1047945706000|1158010267102||ATTR_W(D5G1;HNOLPX-13;Y-1;)S3|prototype_center()I[0,0]
4318 Ngeneric:Facet-Center|art@0||0|0||||AV
4319 NOff-Page|conn@0||10|3||||
4320 NOff-Page|conn@1||-11.5|3||||
4321 IgateResistor;1{ic}|gateResi@0||18|10.5|||D0G4;|ATTR_W(D5G1;NOLPY-1.5;)S3
4322 Ngeneric:Invisible-Pin|pin@0||0|15.5|||||ART_message(D5G2;)S[models gate resistor in TSMC 180nm technology,where gate resistance is not felt to be important]
4323 Ngeneric:Invisible-Pin|pin@1||1.5|20.5|||||ART_message(D5G5;)S[gateResistor]
4324 NResistor|res@0||-0.5|3|||||SCHEM_resistance(D5G1;OL)S0.0010
4325 Awire|net@0|||1800|conn@1|y|-9.5|3|res@0|a|-2.5|3
4326 Awire|net@1|||0|conn@0|a|8|3|res@0|b|1.5|3
4327 Ein||D5G2;|conn@1|y|I
4328 Eout||D5G2;|conn@0|y|O
4329 X
4330
4331 # Cell ndio;1{ic}
4332 Cndio;1{ic}||artwork|1158345992616|1158346111652|E
4333 Ngeneric:Facet-Center|art@0||0|0||||AV
4334 NFilled-Triangle|art@2||0|1|3|2|Y||ART_color()I-4323839
4335 Ngeneric:Universal-Pin|pin@0||0|-1|-1|-1||
4336 Ngeneric:Universal-Pin|pin@2||0|3|-1|-1||
4337 Ngeneric:Invisible-Pin|pin@3||2|1|||||ART_message(D5G1;)Sndio
4338 NPin|pin@4||0|2|1|1||
4339 NPin|pin@5||0|3|1|1||
4340 NPin|pin@6||0|-1|1|1||
4341 NPin|pin@7||0|0|1|1||
4342 NPin|pin@8||-1.5|0|1|1||
4343 NPin|pin@9||1.5|0|1|1||
4344 AThicker|net@0|||FS2700|pin@4||0|2|pin@5||0|3|ART_color()I-4323839
4345 AThicker|net@1|||FS2700|pin@6||0|-1|pin@7||0|0|ART_color()I-4323839
4346 AThicker|net@2|||FS1800|pin@8||-1.5|0|pin@9||1.5|0|ART_color()I-4323839
4347 Eminus||D5G2;|pin@0||B
4348 Eplus||D5G2;|pin@2||B
4349 X
4350
4351 # Cell ndio;1{sch}
4352 Cndio;1{sch}||schematic|1158345864878|1158346461571||ATTR_CDL_template(D5G1;NTX-7;Y-12.5;)SD$(node_name) $(plus) $(minus) ndio|ATTR_SPICE_template(D5G1;NTX-7;Y-10;)SD$(node_name) $(plus) $(minus) ndio|ATTR_SPICE_template_assura(D5G1;NTX-7;Y-14.5;)SD$(node_name) $(plus) $(minus) ndio|ATTR_SPICE_template_calibre(D5G1;NTX-7;Y-16.5;)SD$(node_name) $(plus) $(minus) ndio
4353 Ngeneric:Facet-Center|art@0||0|0||||AV
4354 NOff-Page|conn@0||-7|11|||RRR|
4355 NOff-Page|conn@1||-7|-3|||YRRR|
4356 NDiode|diode@0||-7|4|||Y||SCHEM_diode(D5G1;)S10
4357 Indio;1{ic}|ndio@0||19|19|||D5G4;
4358 Ngeneric:Invisible-Pin|pin@0||-7|23|||||ART_message(D5G5;)Sndio
4359 Ngeneric:Invisible-Pin|pin@1||-7|18|||||ART_message(D5G2;)Sn-type diode for TSMC90 process
4360 Awire|net@0|||900|conn@0|y|-7|9|diode@0|b|-7|6
4361 Awire|net@1|||2700|conn@1|y|-7|-1|diode@0|a|-7|2
4362 Eminus||D5G2;|conn@1|a|B
4363 Eplus||D5G2;|conn@0|a|B
4364 X
4365
4366 # Cell pnp2;1{ic}
4367 Cpnp2;1{ic}||artwork|1075166155000|1158173269713|E|prototype_center()I[0,0]
4368 Ngeneric:Facet-Center|art@0||0|0||||AV
4369 NFilled-Triangle|art@1||1|1|1|2|1350||ART_color()I-4323839
4370 NPin|pin@0||-2|0|1|1||
4371 NPin|pin@1||2|-2|1|1||
4372 NPin|pin@2||0|-2|1|1||
4373 NPin|pin@3||0|2|1|1||
4374 NPin|pin@4||0|0|1|1||
4375 NPin|pin@5||2|2|1|1||
4376 Ngeneric:Invisible-Pin|pin@6||2|2||||
4377 Ngeneric:Invisible-Pin|pin@7||2|-2|||Y|
4378 Ngeneric:Invisible-Pin|pin@8||-2|0|||R|
4379 Ngeneric:Invisible-Pin|pin@9||3|0|||||ART_message(C74;D5G2;)S2X2
4380 AThicker|net@0|||FS0|pin@4||0|0|pin@0||-2|0|ART_color()I-4323839
4381 AThicker|net@1|||FS1350|pin@4||0|0|pin@1||2|-2|ART_color()I-4323839
4382 AThicker|net@2|||FS2700|pin@2||0|-2|pin@3||0|2|ART_color()I-4323839
4383 AThicker|net@3|||FS2250|pin@4||0|0|pin@5||2|2|ART_color()I-4323839
4384 Ebase||D5G2;|pin@8||B
4385 Ecol||D5G2;|pin@7||B
4386 Eemit||D5G2;|pin@6||B
4387 X
4388
4389 # Cell pnp2;1{lay}
4390 Cpnp2;1{lay}||cmos90|1158278317514|1238257435226|
4391 Ngeneric:Facet-Center|art@0||0|0||||AV
4392 NMetal-1-P-Active-Con|contact@0||0|0|34.8|34.8||
4393 NMetal-1-N-Well-Con|contact@2||50|-8|14.8|102.8||
4394 NMetal-1-N-Well-Con|contact@3||0|54|14.8|114.8|R|
4395 NMetal-1-N-Well-Con|contact@4||-50|-8|14.8|102.8||
4396 NMetal-1-P-Well-Con|contact@8||120|0|34.8|274.8||
4397 NMetal-1-P-Well-Con|contact@9||-120|0|34.8|274.8||
4398 NMetal-1-Pin|pin@0||0|0||||
4399 NMetal-1-Pin|pin@1||0|54||||
4400 NMetal-1-Pin|pin@2||-120|0||||
4401 NMetal-1-Pin|pin@3||120|0||||
4402 NBJTDMY-Node|plnode@0||0|0|320|320||
4403 NN-Well-Node|plnode@1||0|0|160|160||A
4404 NP-Select-Node|plnode@2||-120|0|80|320||
4405 NP-Select-Node|plnode@3||120|0|80|320||
4406 NP-Select-Node|plnode@4||0|120|160|80||
4407 NP-Select-Node|plnode@5||0|-120|160|80||
4408 NN-Select-Node|plnode@6||50|0|40|140||
4409 NN-Select-Node|plnode@7||-50|0|40|140||
4410 NN-Select-Node|plnode@8||0|50|60|40||
4411 NN-Select-Node|plnode@9||0|-50|60|40||
4412 NP-Select-Node|plnode@10||0|0|60|60||
4413 NMetal-1-P-Well-Con|well@3||-81|120|34.8|34.8||
4414 NMetal-1-P-Well-Con|well@4||-81|-120|34.8|34.8||
4415 NMetal-1-P-Well-Con|well@5||81|120|34.8|34.8||
4416 NMetal-1-P-Well-Con|well@6||81|-120|34.8|34.8||
4417 Ametal-1|net@8|||S2700|contact@2||47|43.4|contact@3||47|46.6
4418 Ametal-1|net@9|||S900|contact@3||-50|46.6|contact@4||-50|43.4
4419 Ametal-1|net@10||36.6|IJS1800|well@6||98.4|-120|contact@8||102.6|-120
4420 Ametal-1|net@11||36.6|IJS0|well@4||-98.4|-120|contact@9||-102.6|-120
4421 Ametal-1|net@12||36.6|IJS0|well@3||-98.4|120|contact@9||-102.6|120
4422 Ametal-1|net@13||36.6|IJS1800|well@5||98.4|120|contact@8||102.6|120
4423 Ametal-1|net@14|||S0|contact@0||0|0|pin@0||0|0
4424 Ametal-1|net@15|||S0|contact@9||-120|0|pin@2||-120|0
4425 Ametal-1|net@16|||S0|contact@8||120|0|pin@3||120|0
4426 Ametal-1|net@17|||S0|contact@3||0|54|pin@1||0|54
4427 Eemit_1|base|D5G5;|pin@1||B
4428 Eemit_2|col|D5G5;|pin@2||B
4429 Ecol_1||D5G5;|pin@3||B
4430 Eemit||D5G5;|pin@0||B
4431 X
4432
4433 # Cell pnp2;1{sch}
4434 Cpnp2;1{sch}||schematic|1075166061000|1158173414105||ATTR_CDL_template(D5G1;NTX9.5;Y-8;)SQ$(node_name) $(col) $(base) $(emit) pnp2 area=4p|ATTR_NCC(D5G1;NTX9.5;Y-4;)SblackBox does not detect PNPs|ATTR_SPICE_template(D5G1;NTX9.5;Y-6;)SQ$(node_name) $(col) $(base) $(emit) pnp2|ATTR_SPICE_template_assura(D5G1;NTX9;Y-10;)SQ$(node_name) $(col) $(base) $(emit) pnp2 area=4p|ATTR_SPICE_template_calibre(D5G1;NTX10;Y-12;)SQ$(node_name) $(col) $(base) $(emit) pnp2 area=4p|prototype_center()I[0,0]
4435 Ngeneric:Facet-Center|art@0||0|0||||AV
4436 NOff-Page|conn@0||10|13|||RRR|
4437 NOff-Page|conn@1||10|2|||R|
4438 NOff-Page|conn@2||2|8||||
4439 Ngeneric:Invisible-Pin|pin@0||10|26.5|||||ART_message(D5G5;)Spnp2
4440 Ngeneric:Invisible-Pin|pin@1||10|21.5|||||ART_message(D5G2;)S2x2 vertical bipolar transistor
4441 NTransistor|pnp@0||8|8|||YR|4
4442 Ipnp2;1{ic}|singlepn@0||24.75|13|||D0G4;
4443 Awire|net@0|||2700|pnp@0|s|10|10|conn@0|y|10|11
4444 Awire|net@1|||900|pnp@0|d|10|6|conn@1|y|10|4
4445 Awire|net@2|||0|pnp@0|g|7|8|conn@2|y|4|8
4446 Ebase||D4G2;|conn@2|a|B
4447 Ecol||D6G2;X-6;|conn@1|y|B
4448 Eemit||D4G2;|conn@0|a|B
4449 X
4450
4451 # Cell pnp5;1{ic}
4452 Cpnp5;1{ic}||artwork|1075166155000|1158173333366|E|prototype_center()I[0,0]
4453 Ngeneric:Facet-Center|art@0||0|0||||AV
4454 NFilled-Triangle|art@1||1|1|1|2|1350||ART_color()I-4323839
4455 NPin|pin@0||-2|0|1|1||
4456 NPin|pin@1||2|-2|1|1||
4457 NPin|pin@2||0|-2|1|1||
4458 NPin|pin@3||0|2|1|1||
4459 NPin|pin@4||0|0|1|1||
4460 NPin|pin@5||2|2|1|1||
4461 Ngeneric:Invisible-Pin|pin@6||2|2||||
4462 Ngeneric:Invisible-Pin|pin@7||2|-2|||Y|
4463 Ngeneric:Invisible-Pin|pin@8||-2|0|||R|
4464 Ngeneric:Invisible-Pin|pin@9||3|0|||||ART_message(C74;D5G2;)S5X5
4465 AThicker|net@0|||FS0|pin@4||0|0|pin@0||-2|0|ART_color()I-4323839
4466 AThicker|net@1|||FS1350|pin@4||0|0|pin@1||2|-2|ART_color()I-4323839
4467 AThicker|net@2|||FS2700|pin@2||0|-2|pin@3||0|2|ART_color()I-4323839
4468 AThicker|net@3|||FS2250|pin@4||0|0|pin@5||2|2|ART_color()I-4323839
4469 Ebase||D5G2;|pin@8||B
4470 Ecol||D5G2;|pin@7||B
4471 Eemit||D5G2;|pin@6||B
4472 X
4473
4474 # Cell pnp5;1{lay}
4475 Cpnp5;1{lay}||cmos90|1158278317514|1238257435226|
4476 Ngeneric:Facet-Center|art@0||0|0||||AV
4477 NMetal-1-N-Well-Con|contact@2||85|-8|14.8|164.8||
4478 NMetal-1-N-Well-Con|contact@3||0|85|14.8|184.8|R|
4479 NMetal-1-N-Well-Con|contact@4||-85|-8|14.8|164.8||
4480 NMetal-1-P-Well-Con|contact@8||150|0|34.8|334.8||
4481 NMetal-1-P-Well-Con|contact@9||-150|0|34.8|334.8||
4482 NMetal-1-P-Active-Con|contact@10||-30|0|34.8|94.8||
4483 NMetal-1-P-Active-Con|contact@11||30|0|34.8|94.8||
4484 NMetal-1-Pin|pin@0||-30|0||||
4485 NMetal-1-Pin|pin@1||0|85||||
4486 NMetal-1-Pin|pin@2||-148|0||||
4487 NMetal-1-Pin|pin@3||151.5|0||||
4488 NMetal-1-Pin|pin@4||30|0||||
4489 NBJTDMY-Node|plnode@0||0|0|380|380||
4490 NN-Well-Node|plnode@1||0|0|220|220||A
4491 NP-Select-Node|plnode@2||-150|0|80|380||
4492 NP-Select-Node|plnode@3||150|0|80|380||
4493 NP-Select-Node|plnode@4||0|150|220|80||
4494 NP-Select-Node|plnode@5||0|-150|220|80||
4495 NN-Select-Node|plnode@6||85|0|50|220||
4496 NN-Select-Node|plnode@7||-85|0|50|220||
4497 NN-Select-Node|plnode@8||0|85|120|50||
4498 NN-Select-Node|plnode@9||0|-85|120|50||
4499 NP-Select-Node|plnode@11||0|0|120|120||
4500 NMetal-1-P-Well-Con|well@3||-111|150|34.8|34.8||
4501 NMetal-1-P-Well-Con|well@4||-111|-150|34.8|34.8||
4502 NMetal-1-P-Well-Con|well@5||111|150|34.8|34.8||
4503 NMetal-1-P-Well-Con|well@6||111|-150|34.8|34.8||
4504 Ametal-1|net@10||36.6|IJS1800|well@6||128.4|-150|contact@8||132.6|-150
4505 Ametal-1|net@11||36.6|IJS0|well@4||-128.4|-150|contact@9||-132.6|-150
4506 Ametal-1|net@12||36.6|IJS0|well@3||-128.4|150|contact@9||-132.6|150
4507 Ametal-1|net@13||36.6|IJS1800|well@5||128.4|150|contact@8||132.6|150
4508 Ametal-1|net@15|||S0|contact@9||-148|0|pin@2||-148|0
4509 Ametal-1|net@16|||S0|contact@8||151.5|0|pin@3||151.5|0
4510 Ametal-1|net@18|||S0|contact@10||-30|0|pin@0||-30|0
4511 Ametal-1|net@19|||S0|contact@11||30|0|pin@4||30|0
4512 Ametal-1|net@20|||S2700|contact@2||88|74.4|contact@3||88|77.6
4513 Ametal-1|net@21|||S2700|contact@4||-84|74.4|contact@3||-84|77.6
4514 Ametal-1|net@22|||S0|contact@3||0|85|pin@1||0|85
4515 Ebase||D5G5;|pin@1||B
4516 Ecol||D5G5;|pin@2||B
4517 Ecol_1||D5G5;|pin@3||B
4518 Eemit||D5G5;|pin@0||B
4519 Eemit_1||D5G5;|pin@4||B
4520 X
4521
4522 # Cell pnp5;1{sch}
4523 Cpnp5;1{sch}||schematic|1075166061000|1158173400067||ATTR_CDL_template(D5G1;NTX9.5;Y-8;)SQ$(node_name) $(col) $(base) $(emit) pnp5 area=25p|ATTR_NCC(D5G1;NTX9.5;Y-4;)SblackBox does not detect PNPs|ATTR_SPICE_template(D5G1;NTX9.5;Y-6;)SQ$(node_name) $(col) $(base) $(emit) pnp5|ATTR_SPICE_template_assura(D5G1;NTX9;Y-10;)SQ$(node_name) $(col) $(base) $(emit) pnp5 area=25p|ATTR_SPICE_template_calibre(D5G1;NTX10;Y-12;)SQ$(node_name) $(col) $(base) $(emit) pnp5 area=25p|prototype_center()I[0,0]
4524 Ngeneric:Facet-Center|art@0||0|0||||AV
4525 NOff-Page|conn@0||10|13|||RRR|
4526 NOff-Page|conn@1||10|2|||R|
4527 NOff-Page|conn@2||2|8||||
4528 Ngeneric:Invisible-Pin|pin@0||10|26.5|||||ART_message(D5G5;)Spnp2
4529 Ngeneric:Invisible-Pin|pin@1||10|21.5|||||ART_message(D5G2;)S5x5 vertical bipolar transistor
4530 NTransistor|pnp@0||8|8|||YR|4
4531 Ipnp5;1{ic}|singlepn@0||24.75|13|||D0G4;
4532 Awire|net@0|||2700|pnp@0|s|10|10|conn@0|y|10|11
4533 Awire|net@1|||900|pnp@0|d|10|6|conn@1|y|10|4
4534 Awire|net@2|||0|pnp@0|g|7|8|conn@2|y|4|8
4535 Ebase||D4G2;|conn@2|a|B
4536 Ecol||D6G2;X-6;|conn@1|y|B
4537 Eemit||D4G2;|conn@0|a|B
4538 X
4539
4540 # Cell pnp10;1{ic}
4541 Cpnp10;1{ic}||artwork|1075166155000|1158173452448|E|prototype_center()I[0,0]
4542 Ngeneric:Facet-Center|art@0||0|0||||AV
4543 NFilled-Triangle|art@1||1|1|1|2|1350||ART_color()I-4323839
4544 NPin|pin@0||-2|0|1|1||
4545 NPin|pin@1||2|-2|1|1||
4546 NPin|pin@2||0|-2|1|1||
4547 NPin|pin@3||0|2|1|1||
4548 NPin|pin@4||0|0|1|1||
4549 NPin|pin@5||2|2|1|1||
4550 Ngeneric:Invisible-Pin|pin@6||2|2||||
4551 Ngeneric:Invisible-Pin|pin@7||2|-2|||Y|
4552 Ngeneric:Invisible-Pin|pin@8||-2|0|||R|
4553 Ngeneric:Invisible-Pin|pin@9||3|0|||||ART_message(C74;D5G1.5;)S10X10
4554 AThicker|net@0|||FS0|pin@4||0|0|pin@0||-2|0|ART_color()I-4323839
4555 AThicker|net@1|||FS1350|pin@4||0|0|pin@1||2|-2|ART_color()I-4323839
4556 AThicker|net@2|||FS2700|pin@2||0|-2|pin@3||0|2|ART_color()I-4323839
4557 AThicker|net@3|||FS2250|pin@4||0|0|pin@5||2|2|ART_color()I-4323839
4558 Ebase||D5G2;|pin@8||B
4559 Ecol||D5G2;|pin@7||B
4560 Eemit||D5G2;|pin@6||B
4561 X
4562
4563 # Cell pnp10;1{lay}
4564 Cpnp10;1{lay}||cmos90|1158278317514|1238257435226|
4565 Ngeneric:Facet-Center|art@0||0|0||||AV
4566 NMetal-1-N-Well-Con|contact@2||135|-8|14.8|264.8||
4567 NMetal-1-N-Well-Con|contact@3||0|135|14.8|284.8|R|
4568 NMetal-1-N-Well-Con|contact@4||-135|-8|14.8|264.8||
4569 NMetal-1-P-Well-Con|contact@8||200|0|34.8|434.8||
4570 NMetal-1-P-Well-Con|contact@9||-200|0|34.8|434.8||
4571 NMetal-1-P-Active-Con|contact@10||-75|0|49.8|194.8||
4572 NMetal-1-P-Active-Con|contact@11||0|0|49.8|194.8||
4573 NMetal-1-P-Active-Con|contact@12||75|0|49.8|194.8||
4574 NMetal-1-Pin|pin@0||-75|0||||
4575 NMetal-1-Pin|pin@1||0|135||||
4576 NMetal-1-Pin|pin@2||-198|0||||
4577 NMetal-1-Pin|pin@3||201.5|0||||
4578 NMetal-1-Pin|pin@4||0|0||||
4579 NMetal-1-Pin|pin@5||75|0||||
4580 NBJTDMY-Node|plnode@0||0|0|480|480||
4581 NN-Well-Node|plnode@1||0|0|320|320||A
4582 NP-Select-Node|plnode@2||-200|0|80|480||
4583 NP-Select-Node|plnode@3||200|0|80|480||
4584 NP-Select-Node|plnode@4||0|200|320|80||
4585 NP-Select-Node|plnode@5||0|-200|320|80||
4586 NN-Select-Node|plnode@6||135|0|50|320||
4587 NN-Select-Node|plnode@7||-135|0|50|320||
4588 NN-Select-Node|plnode@8||0|135|220|50||
4589 NN-Select-Node|plnode@9||0|-135|220|50||
4590 NP-Select-Node|plnode@11||0|0|220|220||
4591 NMetal-1-P-Well-Con|well@3||-161|200|34.8|34.8||
4592 NMetal-1-P-Well-Con|well@4||-161|-200|34.8|34.8||
4593 NMetal-1-P-Well-Con|well@5||161|200|34.8|34.8||
4594 NMetal-1-P-Well-Con|well@6||161|-200|34.8|34.8||
4595 Ametal-1|net@10||36.6|IJS1800|well@6||178.4|-200|contact@8||182.6|-200
4596 Ametal-1|net@11||36.6|IJS0|well@4||-178.4|-200|contact@9||-182.6|-200
4597 Ametal-1|net@12||36.6|IJS0|well@3||-178.4|200|contact@9||-182.6|200
4598 Ametal-1|net@13||36.6|IJS1800|well@5||178.4|200|contact@8||182.6|200
4599 Ametal-1|net@15|||S0|contact@9||-198|0|pin@2||-198|0
4600 Ametal-1|net@16|||S0|contact@8||201.5|0|pin@3||201.5|0
4601 Ametal-1|net@18|||S0|contact@10||-75|0|pin@0||-75|0
4602 Ametal-1|net@19|||S0|contact@11||0|0|pin@4||0|0
4603 Ametal-1|net@22|||S0|contact@3||0|135|pin@1||0|135
4604 Ametal-1|net@23|||S2700|contact@2||138|124.4|contact@3||138|127.6
4605 Ametal-1|net@24|||S2700|contact@4||-134|124.4|contact@3||-134|127.6
4606 Ametal-1|net@25|||S0|contact@12||75|0|pin@5||75|0
4607 Ebase||D5G5;|pin@1||B
4608 Ecol||D5G5;|pin@2||B
4609 Ecol_1||D5G5;|pin@3||B
4610 Eemit||D5G5;|pin@0||B
4611 Eemit_1||D5G5;|pin@4||B
4612 Eemit_2||D5G5;|pin@5||B
4613 X
4614
4615 # Cell pnp10;1{sch}
4616 Cpnp10;1{sch}||schematic|1075166061000|1158173555088||ATTR_CDL_template(D5G1;NTX9.5;Y-8;)SQ$(node_name) $(col) $(base) $(emit) pnp10 area=100p|ATTR_NCC(D5G1;NTX9.5;Y-4;)SblackBox does not detect PNPs|ATTR_SPICE_template(D5G1;NTX9.5;Y-6;)SQ$(node_name) $(col) $(base) $(emit) pnp10|ATTR_SPICE_template_assura(D5G1;NTX9.5;Y-10;)SQ$(node_name) $(col) $(base) $(emit) pnp10 area=100p|ATTR_SPICE_template_calibre(D5G1;NTX9.5;Y-12;)SQ$(node_name) $(col) $(base) $(emit) pnp10 area=100p|prototype_center()I[0,0]
4617 Ngeneric:Facet-Center|art@0||0|0||||AV
4618 NOff-Page|conn@0||10|13|||RRR|
4619 NOff-Page|conn@1||10|2|||R|
4620 NOff-Page|conn@2||2|8||||
4621 Ngeneric:Invisible-Pin|pin@0||10|26.5|||||ART_message(D5G5;)Spnp10
4622 Ngeneric:Invisible-Pin|pin@1||10|21.5|||||ART_message(D5G2;)S10x10 vertical bipolar transistor
4623 NTransistor|pnp@0||8|8|||YR|4
4624 Ipnp10;1{ic}|singlepn@0||24.75|13|||D0G4;
4625 Awire|net@0|||2700|pnp@0|s|10|10|conn@0|y|10|11
4626 Awire|net@1|||900|pnp@0|d|10|6|conn@1|y|10|4
4627 Awire|net@2|||0|pnp@0|g|7|8|conn@2|y|4|8
4628 Ebase||D4G2;|conn@2|a|B
4629 Ecol||D6G2;X-6;|conn@1|y|B
4630 Eemit||D4G2;|conn@0|a|B
4631 X
4632
4633 # Cell wire;1{ic}
4634 Cwire;1{ic}||artwork|1083964052000|1204140525662|E|ATTR_C(D5G1;HNOLPUCY-2.5;)S0.0000223p|ATTR_L(D5G1;HOLPUD)S100|ATTR_R(D5G1;HNOLPURY-1.5;)S0.024|prototype_center()I[0,0]
4635 Ngeneric:Facet-Center|art@0||0|0||||AV
4636 NThick-Circle|art@1||-2|0|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4637 NThick-Circle|art@2||2|0|1.5|1.5|||ART_color()I74
4638 NPin|pin@0||-2.75|0|1|1||
4639 NPin|pin@1||-4|0||||
4640 NPin|pin@2||2|0|1|1||
4641 NPin|pin@3||4|0||||
4642 NPin|pin@4||-2|0.75|1|1||
4643 NPin|pin@5||2|0.75|1|1||
4644 NPin|pin@6||2|-0.75|1|1||
4645 NPin|pin@7||-2|-0.75|1|1||
4646 Nschematic:Bus_Pin|pin@8||4|0|-2|-2||
4647 Nschematic:Bus_Pin|pin@9||-4|0|-2|-2||
4648 AThicker|net@0|||IJS0|pin@0||-2.75|0|pin@1||-4|0|ART_color()I74
4649 AThicker|net@1|||IJS1800|pin@2||2|0|pin@3||4|0|ART_color()I74
4650 AThicker|net@2|||IJS0|pin@5||2|0.75|pin@4||-2|0.75|ART_color()I74
4651 AThicker|net@3|||IJS0|pin@6||2|-0.75|pin@7||-2|-0.75|ART_color()I74
4652 Ea||D5G2;|pin@9||U
4653 Eb||D5G2;|pin@8||U
4654 X
4655
4656 # Cell wire;1{sch}
4657 Cwire;1{sch}||schematic|1083961993000|1173982560561||ATTR_C(D5G1;HNOLPUCX-19;Y-9;)S0.0000223p|ATTR_L(D5G1;HNOLPUDX-19;Y-7;)S100|ATTR_R(D5G1;HNOLPURX-19;Y-8;)S0.024|prototype_center()I[0,0]
4658 Ngeneric:Facet-Center|art@0||0|0||||AV
4659 NCapacitor|cap@0||-10|0|||||SCHEM_capacitance(D5G1;OLUC)S@C*@L/3
4660 NCapacitor|cap@1||10|0|||||SCHEM_capacitance(D5G1;OLUC)S@C*@L/3
4661 NCapacitor|cap@2||0|0|||||SCHEM_capacitance(D5G1;OLUC)S@C*@L/3
4662 NOff-Page|conn@0||21|4|||RR|
4663 NOff-Page|conn@1||-21|4||||
4664 NGround|gnd@0||0|-8||||
4665 Ngeneric:Invisible-Pin|pin@0||15|7|||||ART_message(D5G1;)S[R2 ]
4666 Ngeneric:Invisible-Pin|pin@1||-15|7|||||ART_message(D5G1;)S[R1 = @R*@L/6]
4667 Ngeneric:Invisible-Pin|pin@2||0|7|||||ART_message(D5G1;)S[R12= @R*@L/3]
4668 Ngeneric:Invisible-Pin|pin@3||16.5|-2|||||ART_message(D5G1;)S[C = @C*@L/3]
4669 Ngeneric:Invisible-Pin|pin@4||0|14|||||ART_message(D5G2;)S[this is a wire 'L' lambda long,with resistance 'R' ohms/lambda,and capacitance 'C' F/lambda]
4670 Ngeneric:Invisible-Pin|pin@5||-1|22|||||ART_message(D5G6;)S[wire]
4671 NWire_Pin|pin@6||0|-4||||
4672 NWire_Pin|pin@7||10|-4||||
4673 NWire_Pin|pin@8||-10|-4||||
4674 NWire_Pin|pin@9||10|4||||
4675 NWire_Pin|pin@10||0|4||||
4676 NWire_Pin|pin@11||-10|4||||
4677 NResistor|res@0||-15|4|||||SCHEM_resistance(D5G1;OLURY1.5;)S@R*@L/6
4678 NResistor|res@1||-5|4|||||SCHEM_resistance(D5G1;OLURY1.5;)S@R*@L/3
4679 NResistor|res@2||15|4|||||SCHEM_resistance(D5G1;OLURY1.5;)S@R*@L/6
4680 NResistor|res@3||5|4|||||SCHEM_resistance(D5G1;OLURY1.5;)S@R*@L/3
4681 Iwire;1{ic}|wire@0||15|24|||D0G4;|ATTR_C(D5G1;NOLPUCY-2.5;)S2.23E-16|ATTR_L(D5G1;OLPUD)S100|ATTR_R(D5G1;NOLPURY-1.5;)S0.24
4682 Awire|net@0|||IJS1800|res@2|b|17|4|conn@0|y|19|4
4683 Awire|net@1|||IJS0|res@0|a|-17|4|conn@1|y|-19|4
4684 Awire|net@2|||IJS900|pin@6||0|-4|gnd@0||0|-6
4685 Awire|net@3|||IJS2700|pin@6||0|-4|cap@2|b|0|-2
4686 Awire|net@4|||IJS0|pin@7||10|-4|pin@6||0|-4
4687 Awire|net@5|||IJS0|pin@6||0|-4|pin@8||-10|-4
4688 Awire|net@6|||IJS900|cap@1|b|10|-2|pin@7||10|-4
4689 Awire|net@7|||IJS2700|pin@8||-10|-4|cap@0|b|-10|-2
4690 Awire|net@8|||IJS900|pin@9||10|4|cap@1|a|10|2
4691 Awire|net@9|||IJS0|res@2|a|13|4|pin@9||10|4
4692 Awire|net@10|||IJS0|pin@9||10|4|res@3|b|7|4
4693 Awire|net@11|||IJS900|pin@10||0|4|cap@2|a|0|2
4694 Awire|net@12|||IJS0|res@3|a|3|4|pin@10||0|4
4695 Awire|net@13|||IJS0|pin@10||0|4|res@1|b|-3|4
4696 Awire|net@14|||IJS900|pin@11||-10|4|cap@0|a|-10|2
4697 Awire|net@15|||IJS0|res@1|a|-7|4|pin@11||-10|4
4698 Awire|net@16|||IJS0|pin@11||-10|4|res@0|b|-13|4
4699 Ea||D4G2;|conn@1|a|U
4700 Eb||D6G2;X-5;|conn@0|y|U
4701 X
4702
4703 # Cell wire90;1{ic}
4704 Cwire90;1{ic}||artwork|1083966364000|1204140525662|E|ATTR_L(D5FLeave alone;G1;HOLPUD)S100|ATTR_LEWIRE(D5G1;HPT)I1|ATTR_layer(D5FLeave alone;G1;HNOLPY-1;)S2|ATTR_width(D5FLeave alone;G1;HNOLPY-2;)S2.8|prototype_center()I[0,0]
4705 Ngeneric:Facet-Center|art@0||0|0||||AV
4706 NThick-Circle|art@1||-1.75|0|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4707 NThick-Circle|art@2||1.75|0|1.5|1.5|RRR||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4708 NPin|pin@0||-1.75|0.75|1|1||
4709 NPin|pin@1||1.75|0.75|1|1||
4710 NPin|pin@2||1.75|-0.75|1|1||
4711 NPin|pin@3||-1.75|-0.75|1|1||
4712 Nschematic:Bus_Pin|pin@4||2.5|0|-1|-1||
4713 Nschematic:Bus_Pin|pin@5||-2.5|0|-1|-1||
4714 AThicker|net@0|||FS0|pin@1||1.75|0.75|pin@0||-1.75|0.75|ART_color()I74
4715 AThicker|net@1|||FS0|pin@2||1.75|-0.75|pin@3||-1.75|-0.75|ART_color()I74
4716 Ea||D5G2;|pin@5||B
4717 Eb||D5G2;|pin@4||B
4718 X
4719
4720 # Cell wire90;1{sch}
4721 Cwire90;1{sch}||schematic|1083965121000|1173982468235||ATTR_L(D5G1;HNOLPUDX-20.5;Y-6.5;)S100|ATTR_LEWIRE(D5G1;HNPTX-20.5;Y-9.5;)I1|ATTR_layer(D5FLeave alone;G1;HNOLPX-20.5;Y-7.5;)S2|ATTR_width(D5FLeave alone;G1;HNOLPX-20.5;Y-8.5;)S2.8|prototype_center()I[0,0]
4722 Ngeneric:Facet-Center|art@0||0|0||||AV
4723 NOff-Page|conn@0||-23|-1||||
4724 NOff-Page|conn@1||-5.5|-1|||YRR|
4725 Ngeneric:Invisible-Pin|pin@0||-4|6|||||ART_message(BD5G2;)Swire90
4726 Ngeneric:Invisible-Pin|pin@1||7|-8|||||ART_message(D5G1;)SR = (@layer==0?8.5:@layer==1?0.104:@layer<8?0.0661:0.0221)/@width
4727 Ngeneric:Invisible-Pin|pin@2||7|-6|||||ART_message(D5G1;)SC = (@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15
4728 Ngeneric:Invisible-Pin|pin@3||-9|2|||||ART_message(D6G1;)S["wire in layer 'layer', 'L' lambda long,","'width' lambda wide, for the 90nm tech"]
4729 Ngeneric:Invisible-Pin|pin@4||-12|-14|||||ART_message(D5G1;)Scapacitance (fF/lambda)
4730 Ngeneric:Invisible-Pin|pin@5||3.5|-14|||||ART_message(D5G1;)Sresistance (ohm/square)
4731 Ngeneric:Invisible-Pin|pin@6||3.5|-17.5|||||ART_message(D5G1;)SM1 - 0.104
4732 Ngeneric:Invisible-Pin|pin@7||3.5|-19|||||ART_message(D5G1;)SM2 - M7 : 0.0661
4733 Ngeneric:Invisible-Pin|pin@8||3.5|-20.5|||||ART_message(D5G1;)SM8 - M9 : 0.0221
4734 Ngeneric:Invisible-Pin|pin@9||3.5|-16|||||ART_message(D5G1;)Spoly - 8.5
4735 Ngeneric:Invisible-Pin|pin@10||18|-14|||||ART_message(D5G1;)Swidth (um/lambda)
4736 Ngeneric:Invisible-Pin|pin@11||18|-17.5|||||ART_message(D5G1;)SM1 - 0.12/2.4L
4737 Ngeneric:Invisible-Pin|pin@12||18|-19|||||ART_message(D5G1;)SM2 - M7 : 0.14/2.8L
4738 Ngeneric:Invisible-Pin|pin@13||18|-20.5|||||ART_message(D5G1;)SM8 - M9 : 0.42/8.4L
4739 Ngeneric:Invisible-Pin|pin@14||18|-16|||||ART_message(D5G1;)Spoly - 0.10/2L
4740 Ngeneric:Invisible-Pin|pin@15||-12|-18|||||ART_message(D5G1;)SM1 - 0.011
4741 Ngeneric:Invisible-Pin|pin@17||-12|-20.5|||||ART_message(D5G1;)SM8 - M9 : 0.016
4742 Ngeneric:Invisible-Pin|pin@18||-12|-16|||||ART_message(D5G1;)Spoly - 0.00441
4743 Iwire90;1{ic}|wire90@1||14|7.88|||D0G4;|ATTR_L(D5FLeave alone;G1;OLPUD)S100|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NOLPY-1;)S1|ATTR_width(D5FLeave alone;G1;NOLPY-2;)S3
4744 Iwire;1{ic}|wire@0||-15|-1|||D0G4;|ATTR_C(D5G1;NOLPUCY-2.5;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPUD)S@L|ATTR_R(D5G1;NOLPURY-1.5;)S(@layer==0?8.5:@layer==1?0.104:@layer<8?0.0661:0.0221)/@width
4745 Awire|net@0|||0|wire@0|a|-19|-1|conn@0|y|-21|-1
4746 Awire|net@1|||1800|wire@0|b|-11|-1|conn@1|y|-7.5|-1
4747 Ea||D4G2;|conn@0|a|B
4748 Eb||D4G2;|conn@1|a|B
4749 X
4750
4751 # Cell wire90xcpl2;1{ic}
4752 Cwire90xcpl2;1{ic}||artwork|1083966364000|1204140525662|E|ATTR_L(D5FLeave alone;G1;HOLPUDY1;)S100|ATTR_layer(D5FLeave alone;G1;HNOLPY-0.5;)S2|ATTR_width(D5FLeave alone;G1;HNOLPY-1.5;)S2.8|prototype_center()I[0,0]
4753 Ngeneric:Facet-Center|art@0||0|0||||AV
4754 NThick-Circle|art@1||-1.75|1|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4755 NThick-Circle|art@2||1.75|1|1.5|1.5|RRR||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4756 NThick-Circle|art@5||-1.75|-1|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4757 NThick-Circle|art@6||1.75|-1|1.5|1.5|RRR||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4758 NOpened-Polygon|art@8||-0.25|0|2.5|2|||ART_color()I74|trace()V[1.25/-1,-1.25/0,1.25/0,-1.25/1]
4759 NPin|pin@0||-1.75|1.75|1|1||
4760 NPin|pin@1||1.75|1.75|1|1||
4761 NPin|pin@2||1.75|0.25|1|1||
4762 NPin|pin@3||-1.75|0.25|1|1||
4763 Nschematic:Bus_Pin|pin@4||2.5|1|-1|-1||
4764 Nschematic:Bus_Pin|pin@5||-2.5|1|-1|-1||
4765 Ngeneric:Universal-Pin|pin@8||-2.5|-1|-1|-1||
4766 Ngeneric:Universal-Pin|pin@10||2.5|-1|-1|-1||
4767 NPin|pin@18||-1.75|-0.25|1|1||
4768 NPin|pin@19||1.75|-0.25|1|1||
4769 NPin|pin@20||1.75|-1.75|1|1||
4770 NPin|pin@21||-1.75|-1.75|1|1||
4771 AThicker|net@0|||FS0|pin@1||1.75|1.75|pin@0||-1.75|1.75|ART_color()I74
4772 AThicker|net@1|||FS0|pin@2||1.75|0.25|pin@3||-1.75|0.25|ART_color()I74
4773 AThicker|net@8|||FS0|pin@19||1.75|-0.25|pin@18||-1.75|-0.25|ART_color()I74
4774 AThicker|net@9|||FS0|pin@20||1.75|-1.75|pin@21||-1.75|-1.75|ART_color()I74
4775 Ea||D5G2;|pin@5||B
4776 Eb||D5G2;|pin@4||B
4777 Ec||D5G2;|pin@8||U
4778 Ed||D5G2;|pin@10||U
4779 X
4780
4781 # Cell wire90xcpl2;1{sch}
4782 Cwire90xcpl2;1{sch}||schematic|1083965121000|1173982902241||ATTR_L(D5G1;HNOLPUDX-22.5;Y-12;)S100|ATTR_layer(D5G1;HNOLPX-22.5;Y-13;)S2|ATTR_width(D5G1;HNOLPX-22.5;Y-14;)S2.8|prototype_center()I[0,0]
4783 Ngeneric:Facet-Center|art@0||0|0||||AV
4784 NOff-Page|conn@0||-9|3.5||||
4785 NOff-Page|conn@1||8.5|3.5|||YRR|
4786 NOff-Page|conn@3||-9|-3.5||||
4787 NOff-Page|conn@4||8.5|-3.5|||YRR|
4788 Iwire_xcpl_sides;1{ic}|cplR[1:0]|D5G1;X5.5;|-0.5|0|||D0G4;|ATTR_C(D5FLeave alone;G1;NOLPUCY-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPUDY1;)S@L|ATTR_LEIGNORE(PUD)I1
4789 NGround|gnd@0||-6.5|10|||RRR|
4790 NGround|gnd@1||-6.5|-9.5|||RRR|
4791 Ngeneric:Invisible-Pin|pin@0||0|18.5|||||ART_message(BD5G2;)Swire90xcpl2
4792 Ngeneric:Invisible-Pin|pin@1||1.5|-14.5|||||ART_message(D5G1;)SR = (@layer==0?8.5:@layer==1?0.104:@layer<8?0.0661:0.0221)/@width
4793 Ngeneric:Invisible-Pin|pin@2||1.5|-13|||||ART_message(D5G1;)SC = (@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15
4794 Ngeneric:Invisible-Pin|pin@3||-8.75|16|||||ART_message(D6G1;)S["wire in layer 'layer', 'L' lambda long,","'width' lambda wide, for the 90nm tech"]
4795 Ngeneric:Invisible-Pin|pin@4||-13|-17.5|||||ART_message(D5G1;)Scapacitance (fF/lambda)
4796 Ngeneric:Invisible-Pin|pin@5||2.5|-17.5|||||ART_message(D5G1;)Sresistance (ohm/square)
4797 Ngeneric:Invisible-Pin|pin@6||2.5|-21|||||ART_message(D5G1;)SM1 - 0.104
4798 Ngeneric:Invisible-Pin|pin@7||2.5|-22.5|||||ART_message(D5G1;)SM2 - M7 : 0.0661
4799 Ngeneric:Invisible-Pin|pin@8||2.5|-24|||||ART_message(D5G1;)SM8 - M9 : 0.0221
4800 Ngeneric:Invisible-Pin|pin@9||2.5|-19.5|||||ART_message(D5G1;)Spoly - 8.5
4801 Ngeneric:Invisible-Pin|pin@10||17|-17.5|||||ART_message(D5G1;)Swidth (um/lambda)
4802 Ngeneric:Invisible-Pin|pin@11||17|-21|||||ART_message(D5G1;)SM1 - 0.12/2.4L
4803 Ngeneric:Invisible-Pin|pin@12||17|-22.5|||||ART_message(D5G1;)SM2 - M7 : 0.14/2.8L
4804 Ngeneric:Invisible-Pin|pin@13||17|-24|||||ART_message(D5G1;)SM8 - M9 : 0.42/8.4L
4805 Ngeneric:Invisible-Pin|pin@14||17|-19.5|||||ART_message(D5G1;)Spoly - 0.10/2L
4806 Ngeneric:Invisible-Pin|pin@15||-13|-21.5|||||ART_message(D5G1;)SM1 - 0.011
4807 Ngeneric:Invisible-Pin|pin@17||-13|-24|||||ART_message(D5G1;)SM8 - M9 : 0.016
4808 Ngeneric:Invisible-Pin|pin@18||-13|-19.5|||||ART_message(D5G1;)Spoly - 0.00441
4809 NWire_Pin|pin@32||-2|10||||
4810 NWire_Pin|pin@33||1|10||||
4811 NWire_Pin|pin@34||-0.5|10||||
4812 NWire_Pin|pin@35||-2|-9.5||||
4813 NWire_Pin|pin@36||1|-9.5||||
4814 NWire_Pin|pin@37||-0.5|-9.5||||
4815 Iwire90xcpl2;1{ic}|wire90xc@3||21|14.38|||D0G4;|ATTR_L(D5FLeave alone;G1;OLPUDY1;)S100|ATTR_layer(D5FLeave alone;G1;NOLPY-0.5;)S1|ATTR_width(D5FLeave alone;G1;NOLPY-1.5;)S3|ATTR_LEWIRE()I1
4816 Iwire_xcp_gnd;1{ic}|wire_xcp@3||-0.5|3.5|||D5G4;|ATTR_C(D5FLeave alone;G1;NOLPURX2.5;Y-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPURY1;)S@L|ATTR_LEWIRE(PUR)I1|ATTR_R(D5FLeave alone;G1;NOLPURX-3;Y-1;)S(@layer==0?8.5:@layer==1?0.104:@layer<8?0.0661:0.0221)/@width|ATTR_layer(OJPUR)S@layer|ATTR_width(OJPUR)S@width
4817 Iwire_xcp_gnd;1{ic}|wire_xcp@4||-0.5|-3.5|||D5G4;|ATTR_C(D5FLeave alone;G1;NOLPURX2.5;Y-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OJPURY1;)S@L|ATTR_LEWIRE(PUR)I1|ATTR_R(D5FLeave alone;G1;NOLPURX-3;Y-1;)S(@layer==0?8.5:@layer==1?0.104:@layer<8?0.0661:0.0221)/@width|ATTR_layer(OJPUR)S@layer|ATTR_width(OJPUR)S@width
4818 Iwire_xcpl_sides;1{ic}|wire_xcp@7||-0.5|7.5|||D0G4;|ATTR_C(D5FLeave alone;G1;NOLPUCY-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPUDY1;)S@L|ATTR_LEIGNORE(PUD)I1
4819 Iwire_xcpl_sides;1{ic}|wire_xcp@8||-0.5|-7|||D0G4;|ATTR_C(D5FLeave alone;G1;NOLPUCY-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPUDY1;)S@L|ATTR_LEIGNORE(PUD)I1
4820 Awire|net@10|||0|wire_xcp@3|a|-4.5|3.5|conn@0|y|-7|3.5
4821 Awire|net@12|||0|wire_xcp@4|a|-4.5|-3.5|conn@3|y|-7|-3.5
4822 Awire|net@13|||1800|wire_xcp@4|b|3.5|-3.5|conn@4|y|6.5|-3.5
4823 Awire|net@15|||1800|wire_xcp@3|b|3.5|3.5|conn@1|y|6.5|3.5
4824 Awire|net@40|||2700|cplR[1:0]|sL3|1|1|wire_xcp@3|sL3|1|3.5
4825 Awire|net@41|||2700|cplR[1:0]|sL2|-0.5|1|wire_xcp@3|sL2|-0.5|3.5
4826 Awire|net@45|||2700|cplR[1:0]|sL1|-2|1|wire_xcp@3|sL1|-2|3.5
4827 Awire|net@47|||2700|wire_xcp@4|sL3|1|-3.5|cplR[1:0]|sR3|1|-1
4828 Awire|net@50|||2700|wire_xcp@4|sL1|-2|-3.5|cplR[1:0]|sR1|-2|-1
4829 Awire|net@51|||2700|wire_xcp@4|sL2|-0.5|-3.5|cplR[1:0]|sR2|-0.5|-1
4830 Awire|net@55|||2700|wire_xcp@7|sL1|-2|8.5|pin@32||-2|10
4831 Awire|net@56|||1800|pin@34||-0.5|10|pin@33||1|10
4832 Awire|net@57|||900|pin@33||1|10|wire_xcp@7|sL3|1|8.5
4833 Awire|net@58|||1800|pin@32||-2|10|pin@34||-0.5|10
4834 Awire|net@59|||2700|wire_xcp@7|sL2|-0.5|8.5|pin@34||-0.5|10
4835 Awire|net@60|||1800|gnd@0||-4.5|10|pin@32||-2|10
4836 Awire|net@61|||2700|wire_xcp@8|sL3|1|-6|wire_xcp@4|sL3|1|-3.5
4837 Awire|net@62|||2700|wire_xcp@8|sL1|-2|-6|wire_xcp@4|sL1|-2|-3.5
4838 Awire|net@63|||2700|wire_xcp@8|sL2|-0.5|-6|wire_xcp@4|sL2|-0.5|-3.5
4839 Awire|net@64|||900|wire_xcp@8|sR1|-2|-8|pin@35||-2|-9.5
4840 Awire|net@65|||1800|pin@37||-0.5|-9.5|pin@36||1|-9.5
4841 Awire|net@66|||2700|pin@36||1|-9.5|wire_xcp@8|sR3|1|-8
4842 Awire|net@67|||1800|pin@35||-2|-9.5|pin@37||-0.5|-9.5
4843 Awire|net@68|||900|wire_xcp@8|sR2|-0.5|-8|pin@37||-0.5|-9.5
4844 Awire|net@69|||1800|gnd@1||-4.5|-9.5|pin@35||-2|-9.5
4845 Awire|net@73|||900|wire_xcp@7|sR3|1|6.5|wire_xcp@3|sL3|1|3.5
4846 Awire|net@74|||900|wire_xcp@7|sR1|-2|6.5|wire_xcp@3|sL1|-2|3.5
4847 Awire|net@75|||900|wire_xcp@7|sR2|-0.5|6.5|wire_xcp@3|sL2|-0.5|3.5
4848 Ea||D4G2;|conn@0|a|B
4849 Eb||D4G2;|conn@1|a|B
4850 Ec||D4G2;|conn@3|a|B
4851 Ed||D4G2;|conn@4|a|B
4852 X
4853
4854 # Cell wire90xcpl3;1{ic}
4855 Cwire90xcpl3;1{ic}||artwork|1083966364000|1204140525662|E|ATTR_L(D5FLeave alone;G1;HOLPUDY1;)S100|ATTR_layer(D5FLeave alone;G1;HNOLPY-0.5;)S2|ATTR_width(D5FLeave alone;G1;HNOLPY-1.5;)S2.8|prototype_center()I[0,0]
4856 Ngeneric:Facet-Center|art@0||0|0||||AV
4857 NThick-Circle|art@1||-1.75|0|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4858 NThick-Circle|art@2||1.75|0|1.5|1.5|RRR||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4859 NThick-Circle|art@3||-1.75|2|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4860 NThick-Circle|art@4||1.75|2|1.5|1.5|RRR||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4861 NThick-Circle|art@5||-1.75|-2|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4862 NThick-Circle|art@6||1.75|-2|1.5|1.5|RRR||ART_color()I74|ART_degrees()F[0.0,3.1415927]
4863 NOpened-Polygon|art@7||-0.25|1|2.5|2|||ART_color()I74|trace()V[1.25/-1,-1.25/0,1.25/0,-1.25/1]
4864 NOpened-Polygon|art@8||-0.25|-1|2.5|2|||ART_color()I74|trace()V[1.25/-1,-1.25/0,1.25/0,-1.25/1]
4865 NPin|pin@0||-1.75|0.75|1|1||
4866 NPin|pin@1||1.75|0.75|1|1||
4867 NPin|pin@2||1.75|-0.75|1|1||
4868 NPin|pin@3||-1.75|-0.75|1|1||
4869 Nschematic:Bus_Pin|pin@4||2.5|0|-1|-1||
4870 Nschematic:Bus_Pin|pin@5||-2.5|0|-1|-1||
4871 Ngeneric:Universal-Pin|pin@6||-2.5|2|-1|-1||
4872 Ngeneric:Universal-Pin|pin@8||-2.5|-2|-1|-1||
4873 Ngeneric:Universal-Pin|pin@10||2.5|-2|-1|-1||
4874 Ngeneric:Universal-Pin|pin@12||2.5|2|-1|-1||
4875 NPin|pin@14||-1.75|2.75|1|1||
4876 NPin|pin@15||1.75|2.75|1|1||
4877 NPin|pin@16||1.75|1.25|1|1||
4878 NPin|pin@17||-1.75|1.25|1|1||
4879 NPin|pin@18||-1.75|-1.25|1|1||
4880 NPin|pin@19||1.75|-1.25|1|1||
4881 NPin|pin@20||1.75|-2.75|1|1||
4882 NPin|pin@21||-1.75|-2.75|1|1||
4883 AThicker|net@0|||FS0|pin@1||1.75|0.75|pin@0||-1.75|0.75|ART_color()I74
4884 AThicker|net@1|||FS0|pin@2||1.75|-0.75|pin@3||-1.75|-0.75|ART_color()I74
4885 AThicker|net@6|||FS0|pin@15||1.75|2.75|pin@14||-1.75|2.75|ART_color()I74
4886 AThicker|net@7|||FS0|pin@16||1.75|1.25|pin@17||-1.75|1.25|ART_color()I74
4887 AThicker|net@8|||FS0|pin@19||1.75|-1.25|pin@18||-1.75|-1.25|ART_color()I74
4888 AThicker|net@9|||FS0|pin@20||1.75|-2.75|pin@21||-1.75|-2.75|ART_color()I74
4889 Ea||D5G2;|pin@5||B
4890 EaL||D5G2;|pin@6||U
4891 EaR||D5G2;|pin@8||U
4892 Eb||D5G2;|pin@4||B
4893 EbL||D5G2;|pin@12||U
4894 EbR||D5G2;|pin@10||U
4895 X
4896
4897 # Cell wire90xcpl3;1{sch}
4898 Cwire90xcpl3;1{sch}||schematic|1083965121000|1158010267102||ATTR_L(D5FLeave alone;G1;HNOLPUDX-22.5;Y-15.5;)S100|ATTR_layer(D5FLeave alone;G1;HNOLPX-22.5;Y-16.5;)S2|ATTR_width(D5FLeave alone;G1;HNOLPX-22.5;Y-17.5;)S2.8|prototype_center()I[0,0]
4899 Ngeneric:Facet-Center|art@0||0|0||||AV
4900 NOff-Page|conn@0||-9|0||||
4901 NOff-Page|conn@1||8.5|0|||YRR|
4902 NOff-Page|conn@2||-9|7||||
4903 NOff-Page|conn@3||-9|-7||||
4904 NOff-Page|conn@4||8.5|-7|||YRR|
4905 NOff-Page|conn@5||8.5|7|||YRR|
4906 Iwire_xcpl_sides;1{ic}|cplL[1:0]|D5G1;X5.5;|-0.5|3.5|||D0G4;|ATTR_C(D5FLeave alone;G1;NOLPUCY-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPUDY1;)S@L|ATTR_LEIGNORE(PUD)I1
4907 Iwire_xcpl_sides;1{ic}|cplR[1:0]|D5G1;X5.5;|-0.5|-3.5|||D0G4;|ATTR_C(D5FLeave alone;G1;NOLPUCY-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPUDY1;)S@L|ATTR_LEIGNORE(PUD)I1
4908 NGround|gnd@0||-6.5|13.5|||RRR|
4909 NGround|gnd@1||-6.5|-13|||RRR|
4910 Ngeneric:Invisible-Pin|pin@0||0|20.5|||||ART_message(BD5G2;)Swire90xcpl2
4911 Ngeneric:Invisible-Pin|pin@1||1.5|-18|||||ART_message(D5G1;)SR = (@layer==0?8.5:@layer==1?0.104:@layer<8?0.0661:0.0221)/@width
4912 Ngeneric:Invisible-Pin|pin@2||1.5|-16.5|||||ART_message(D5G1;)SC = (@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15
4913 Ngeneric:Invisible-Pin|pin@3||-8.75|18|||||ART_message(D6G1;)S["wire in layer 'layer', 'L' lambda long,","'width' lambda wide, for the 90nm tech"]
4914 Ngeneric:Invisible-Pin|pin@4||-13|-21|||||ART_message(D5G1;)Scapacitance (fF/lambda)
4915 Ngeneric:Invisible-Pin|pin@5||2.5|-21|||||ART_message(D5G1;)Sresistance (ohm/square)
4916 Ngeneric:Invisible-Pin|pin@6||2.5|-24.5|||||ART_message(D5G1;)SM1 - 0.104
4917 Ngeneric:Invisible-Pin|pin@7||2.5|-26|||||ART_message(D5G1;)SM2 - M7 : 0.0661
4918 Ngeneric:Invisible-Pin|pin@8||2.5|-27.5|||||ART_message(D5G1;)SM8 - M9 : 0.0221
4919 Ngeneric:Invisible-Pin|pin@9||2.5|-23|||||ART_message(D5G1;)Spoly - 8.5
4920 Ngeneric:Invisible-Pin|pin@10||17|-21|||||ART_message(D5G1;)Swidth (um/lambda)
4921 Ngeneric:Invisible-Pin|pin@11||17|-24.5|||||ART_message(D5G1;)SM1 - 0.12/2.4L
4922 Ngeneric:Invisible-Pin|pin@12||17|-26|||||ART_message(D5G1;)SM2 - M7 : 0.14/2.8L
4923 Ngeneric:Invisible-Pin|pin@13||17|-27.5|||||ART_message(D5G1;)SM8 - M9 : 0.42/8.4L
4924 Ngeneric:Invisible-Pin|pin@14||17|-23|||||ART_message(D5G1;)Spoly - 0.10/2L
4925 Ngeneric:Invisible-Pin|pin@15||-13|-25|||||ART_message(D5G1;)SM1 - 0.011
4926 Ngeneric:Invisible-Pin|pin@17||-13|-27.5|||||ART_message(D5G1;)SM8 - M9 : 0.016
4927 Ngeneric:Invisible-Pin|pin@18||-13|-23|||||ART_message(D5G1;)Spoly - 0.00441
4928 NWire_Pin|pin@32||-2|13.5||||
4929 NWire_Pin|pin@33||1|13.5||||
4930 NWire_Pin|pin@34||-0.5|13.5||||
4931 NWire_Pin|pin@35||-2|-13||||
4932 NWire_Pin|pin@36||1|-13||||
4933 NWire_Pin|pin@37||-0.5|-13||||
4934 Iwire90xcpl3;1{ic}|wire90xc@1||20.5|15.88|||D0G4;|ATTR_L(D5FLeave alone;G1;OLPUDY1;)S100|ATTR_layer(D5FLeave alone;G1;NOLPY-0.5;)S1|ATTR_width(D5FLeave alone;G1;NOLPY-1.5;)S3|ATTR_LEWIRE()I1
4935 Iwire_xcp_gnd;1{ic}|wire_xcp@2||-0.5|7|||D5G4;|ATTR_C(D5FLeave alone;G1;NOLPURX2.5;Y-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPURY1;)S@L|ATTR_LEWIRE(PUR)I1|ATTR_R(D5G1;NOLPURX-3;Y-1;)S(@layer==0?8.5:@layer==1?0.104:@layer<8?0.0661:0.0221)/@width|ATTR_layer(OJPUR)S@layer|ATTR_width(OJPUR)S@width
4936 Iwire_xcp_gnd;1{ic}|wire_xcp@3||-0.5|0|||D5G4;|ATTR_C(D5FLeave alone;G1;NOLPURX2.5;Y-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPURY1;)S@L|ATTR_LEWIRE(PUR)I1|ATTR_R(D5FLeave alone;G1;NOLPURX-3;Y-1;)S(@layer==0?8.5:@layer==1?0.104:@layer<8?0.0661:0.0221)/@width|ATTR_layer(OJPUR)S@layer|ATTR_width(OJPUR)S@width
4937 Iwire_xcp_gnd;1{ic}|wire_xcp@4||-0.5|-7|||D5G4;|ATTR_C(D5FLeave alone;G1;NOLPURX2.5;Y-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPURY1;)S@L|ATTR_LEWIRE(PUR)I1|ATTR_R(D5FLeave alone;G1;NOLPURX-3;Y-1;)S(@layer==0?8.5:@layer==1?0.104:@layer<8?0.0661:0.0221)/@width|ATTR_layer(OJPUR)S@layer|ATTR_width(OJPUR)S@width
4938 Iwire_xcpl_sides;1{ic}|wire_xcp@7||-0.5|11|||D0G4;|ATTR_C(D5FLeave alone;G1;NOLPUCY-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPUDY1;)S@L|ATTR_LEIGNORE(PUD)I1
4939 Iwire_xcpl_sides;1{ic}|wire_xcp@8||-0.5|-10.5|||D0G4;|ATTR_C(D5FLeave alone;G1;NOLPUCY-1;)S(@layer==0?0.00441:@layer<8?0.011:0.016)*1e-15|ATTR_L(D5FLeave alone;G1;OLPUDY1;)S@L|ATTR_LEIGNORE(PUD)I1
4940 Awire|net@10|||0|wire_xcp@3|a|-4.5|0|conn@0|y|-7|0
4941 Awire|net@11|||0|wire_xcp@2|a|-4.5|7|conn@2|y|-7|7
4942 Awire|net@12|||0|wire_xcp@4|a|-4.5|-7|conn@3|y|-7|-7
4943 Awire|net@13|||1800|wire_xcp@4|b|3.5|-7|conn@4|y|6.5|-7
4944 Awire|net@14|||1800|wire_xcp@2|b|3.5|7|conn@5|y|6.5|7
4945 Awire|net@15|||1800|wire_xcp@3|b|3.5|0|conn@1|y|6.5|0
4946 Awire|net@40|||2700|cplR[1:0]|sL3|1|-2.5|wire_xcp@3|sL3|1|0
4947 Awire|net@41|||2700|cplR[1:0]|sL2|-0.5|-2.5|wire_xcp@3|sL2|-0.5|0
4948 Awire|net@42|||2700|cplL[1:0]|sL2|-0.5|4.5|wire_xcp@2|sL2|-0.5|7
4949 Awire|net@43|||2700|cplL[1:0]|sL1|-2|4.5|wire_xcp@2|sL1|-2|7
4950 Awire|net@44|||2700|cplL[1:0]|sL3|1|4.5|wire_xcp@2|sL3|1|7
4951 Awire|net@45|||2700|cplR[1:0]|sL1|-2|-2.5|wire_xcp@3|sL1|-2|0
4952 Awire|net@46|||2700|wire_xcp@3|sL3|1|0|cplL[1:0]|sR3|1|2.5
4953 Awire|net@47|||2700|wire_xcp@4|sL3|1|-7|cplR[1:0]|sR3|1|-4.5
4954 Awire|net@48|||2700|wire_xcp@3|sL1|-2|0|cplL[1:0]|sR1|-2|2.5
4955 Awire|net@49|||2700|wire_xcp@3|sL2|-0.5|0|cplL[1:0]|sR2|-0.5|2.5
4956 Awire|net@50|||2700|wire_xcp@4|sL1|-2|-7|cplR[1:0]|sR1|-2|-4.5
4957 Awire|net@51|||2700|wire_xcp@4|sL2|-0.5|-7|cplR[1:0]|sR2|-0.5|-4.5
4958 Awire|net@52|||900|wire_xcp@7|sR3|1|10|wire_xcp@2|sL3|1|7
4959 Awire|net@53|||900|wire_xcp@7|sR1|-2|10|wire_xcp@2|sL1|-2|7
4960 Awire|net@54|||900|wire_xcp@7|sR2|-0.5|10|wire_xcp@2|sL2|-0.5|7
4961 Awire|net@55|||2700|wire_xcp@7|sL1|-2|12|pin@32||-2|13.5
4962 Awire|net@56|||1800|pin@34||-0.5|13.5|pin@33||1|13.5
4963 Awire|net@57|||900|pin@33||1|13.5|wire_xcp@7|sL3|1|12
4964 Awire|net@58|||1800|pin@32||-2|13.5|pin@34||-0.5|13.5
4965 Awire|net@59|||2700|wire_xcp@7|sL2|-0.5|12|pin@34||-0.5|13.5
4966 Awire|net@60|||1800|gnd@0||-4.5|13.5|pin@32||-2|13.5
4967 Awire|net@61|||2700|wire_xcp@8|sL3|1|-9.5|wire_xcp@4|sL3|1|-7
4968 Awire|net@62|||2700|wire_xcp@8|sL1|-2|-9.5|wire_xcp@4|sL1|-2|-7
4969 Awire|net@63|||2700|wire_xcp@8|sL2|-0.5|-9.5|wire_xcp@4|sL2|-0.5|-7
4970 Awire|net@64|||900|wire_xcp@8|sR1|-2|-11.5|pin@35||-2|-13
4971 Awire|net@65|||1800|pin@37||-0.5|-13|pin@36||1|-13
4972 Awire|net@66|||2700|pin@36||1|-13|wire_xcp@8|sR3|1|-11.5
4973 Awire|net@67|||1800|pin@35||-2|-13|pin@37||-0.5|-13
4974 Awire|net@68|||900|wire_xcp@8|sR2|-0.5|-11.5|pin@37||-0.5|-13
4975 Awire|net@69|||1800|gnd@1||-4.5|-13|pin@35||-2|-13
4976 Ea||D4G2;|conn@0|a|B
4977 EaL||D4G2;|conn@2|a|B
4978 EaR||D4G2;|conn@3|a|B
4979 Eb||D4G2;|conn@1|a|B
4980 EbL||D4G2;|conn@5|a|B
4981 EbR||D4G2;|conn@4|a|B
4982 X
4983
4984 # Cell wireC;1{ic}
4985 CwireC;1{ic}||artwork|1014599103000|1204140525662|E|ATTR_L(D6FLeave alone;G1.5;HNOLPX1.5;Y0.5;)S100|ATTR_layer(D5FLeave alone;G1;HNOLPX3;Y-1.5;)S1|ATTR_width(D5FLeave alone;G1;HNOLPX3;Y-0.5;)S3|prototype_center()I[0,0]
4986 Ngeneric:Facet-Center|art@0||0|0||||AV
4987 NPin|pin@0||0|-3|1|1||
4988 NPin|pin@1||-1|-2|1|1|||ART_color()I78
4989 NPin|pin@2||1|-2|1|1|||ART_color()I78
4990 NPin|pin@3||0|-2|1|1||
4991 NPin|pin@4||0|-0.25|1|1|||ART_color()I78
4992 NPin|pin@5||0|2|1|1||
4993 NPin|pin@6||0|0.25|1|1|||ART_color()I78
4994 NPin|pin@7||-1|0.25|1|1|||ART_color()I78
4995 NPin|pin@8||1|0.25|1|1|||ART_color()I78
4996 NPin|pin@9||1|-0.25|1|1|||ART_color()I78
4997 NPin|pin@10||-1|-0.25|1|1|||ART_color()I78
4998 Nschematic:Bus_Pin|pin@11||0|2|-2|-2||
4999 AThicker|net@0|||FS450|pin@2||1|-2|pin@0||0|-3|ART_color()I74
5000 AThicker|net@1|||FS3150|pin@0||0|-3|pin@1||-1|-2|ART_color()I74
5001 AThicker|net@2|||FS0|pin@2||1|-2|pin@1||-1|-2|ART_color()I74
5002 AThicker|net@3|||FS900|pin@4||0|-0.25|pin@3||0|-2|ART_color()I74
5003 AThicker|net@4|||FS900|pin@5||0|2|pin@6||0|0.25|ART_color()I74
5004 AThicker|net@5|||FS0|pin@8||1|0.25|pin@7||-1|0.25|ART_color()I74
5005 AThicker|net@6|||FS0|pin@9||1|-0.25|pin@10||-1|-0.25|ART_color()I74
5006 Ea||D5G1;|pin@11||I
5007 X
5008
5009 # Cell wireC;1{sch}
5010 CwireC;1{sch}||schematic|1014598612000|1158084188511||ATTR_L(D5FLeave alone;G1;HNOLPX-16;Y-4;)S100|ATTR_layer(D5FLeave alone;G1;HNOLPX-16;Y-5;)S1|ATTR_width(D5FLeave alone;G1;HNOLPX-16;Y-6;)S3|prototype_center()I[0,0]
5011 Ngeneric:Facet-Center|art@0||0|0||||AV
5012 NCapacitor|cap@0||0|0|||||SCHEM_capacitance(D5G1;OLUC)S(@layer==0?0.015:@layer<6?0.025:0.030) * @L * 1e-15
5013 NOff-Page|conn@0||0|7|||RRR|
5014 NGround|gnd@0||0|-6||||
5015 Ngeneric:Invisible-Pin|pin@0||0|-9|||||ART_message(D5G1;)S[(@layer==0?0.015:@layer<6?0.025:0.030)*@L*1e-15]
5016 Ngeneric:Invisible-Pin|pin@1||-20|9|||||ART_message(D6G2;)S[the capacitance in fF of,a layer 'layer' wire,L lambda long and,'width' lambda wide]
5017 Ngeneric:Invisible-Pin|pin@2||-2|18|||||ART_message(D5G6;)SwireC90
5018 IwireC;1{ic}|wireC@0||9|9|||D0G4;|ATTR_L(D6FLeave alone;G1.5;NOLPX1.5;Y0.5;)S100|ATTR_layer(D5FLeave alone;G1;NOLPX3;Y-1.5;)S1|ATTR_width(D5FLeave alone;G1;NOLPX3;Y-0.5;)S3
5019 Awire|net@0|||2700|cap@0|a|0|2|conn@0|y|0|5
5020 Awire|net@1|||2700|gnd@0||0|-4|cap@0|b|0|-2
5021 Ea||D5G2;|conn@0|a|I
5022 X
5023
5024 # Cell wireR;1{ic}
5025 CwireR;1{ic}||artwork|1012169520000|1204140525662|E|ATTR_L(D5FLeave alone;G1.5;HNOLPY1;)S100|ATTR_layer(D5G1;HNOLPY-2.5;)S1|ATTR_width(D5FLeave alone;G1;HNOLPY-1.5;)S3|prototype_center()I[0,0]
5026 Ngeneric:Facet-Center|art@0||0|0||||AV
5027 NPin|pin@0||-4|0|1|1||
5028 NPin|pin@1||4|0|1|1||
5029 NPin|pin@2||2.5|0|1|1||
5030 NPin|pin@3||2|-1|1|1||
5031 NPin|pin@4||1|1|1|1||
5032 NPin|pin@5||0|-1|1|1||
5033 NPin|pin@6||-1|1|1|1||
5034 NPin|pin@7||-2|-1|1|1||
5035 NPin|pin@8||-2.5|0|1|1||
5036 Nschematic:Bus_Pin|pin@9||-4|0|-2|-2||
5037 Nschematic:Bus_Pin|pin@10||4|0|-2|-2||
5038 AThicker|net@0|||FS1800|pin@0||-4|0|pin@8||-2.5|0|ART_color()I74
5039 AThicker|net@1|||FS0|pin@1||4|0|pin@2||2.5|0|ART_color()I74
5040 AThicker|net@2|||FS634|pin@2||2.5|0|pin@3||2|-1|ART_color()I74
5041 AThicker|net@3|||FS2966|pin@3||2|-1|pin@4||1|1|ART_color()I74
5042 AThicker|net@4|||FS634|pin@4||1|1|pin@5||0|-1|ART_color()I74
5043 AThicker|net@5|||FS2966|pin@5||0|-1|pin@6||-1|1|ART_color()I74
5044 AThicker|net@6|||FS634|pin@6||-1|1|pin@7||-2|-1|ART_color()I74
5045 AThicker|net@7|||FS2966|pin@7||-2|-1|pin@8||-2.5|0|ART_color()I74
5046 Ea||D5G1;|pin@9||U
5047 Eb||D5G1;|pin@10||U
5048 X
5049
5050 # Cell wireR;1{sch}
5051 CwireR;1{sch}||schematic|1012169378000|1158084177716||ATTR_L(D5FLeave alone;G1;HNOLPX-5.5;Y-5;)S100|ATTR_layer(D5FLeave alone;G1;HNOLPX-5.5;Y-6;)S1|ATTR_width(D5FLeave alone;G1;HNOLPX-5.5;Y-7;)S3|prototype_center()I[0,0]
5052 Ngeneric:Facet-Center|art@0||0|0||||AV
5053 NOff-Page|conn@0||-14|0||||
5054 NOff-Page|conn@1||14|0|||RR|
5055 Ngeneric:Invisible-Pin|pin@0||-16|12|||||ART_message(D6G2;)S[the resistance in ohms of,a layer 'layer' wire,L lambda long and,'width' lambda wide]
5056 Ngeneric:Invisible-Pin|pin@1||0|5|||||ART_message(D5G1;)S(@layer==0?8.5:@layer==1?0.104:@layer<8?0.0661:0.0221)/@width
5057 Ngeneric:Invisible-Pin|pin@2||-4|20.5|||||ART_message(D5G6;)SwireR90
5058 NResistor|res@0||0|0|||||SCHEM_resistance(D5G1;OLURY1.5;)S(@layer==0?8.5:@layer==1?0.104:@layer<8?0.0661:0.0221)/@width
5059 IwireR;1{ic}|wireR@0||11|10|||D0G4;|ATTR_L(D5FLeave alone;G1.5;NOLPY1;)S100|ATTR_layer(D5G1;NOLPY-2.5;)S1|ATTR_width(D5FLeave alone;G1;NOLPY-1.5;)S3
5060 Awire|net@0|||0|conn@1|y|12|0|res@0|b|2|0
5061 Awire|net@1|||0|res@0|a|-2|0|conn@0|y|-12|0
5062 Ea||D5G2;|conn@0|a|U
5063 Eb||D5G2;|conn@1|a|U
5064 X
5065
5066 # Cell wire_xcp_gnd;1{ic}
5067 Cwire_xcp_gnd;1{ic}||artwork|1083964052000|1204140525662|E|ATTR_C(D5G1;HNOLPURX2.5;Y-1;)S0.223f|ATTR_L(D5G1;HOLPURY1;)S100|ATTR_LEWIRE(D5G1;HPTUR)I1|ATTR_R(D5G1;HNOLPURX-3;Y-1;)S24m|ATTR_layer(D5G1;HOLPTUR)S2|ATTR_width(D5G1;HOLPTUR)S2.8|prototype_center()I[0,0]
5068 Ngeneric:Facet-Center|art@0||0|0||||AV
5069 NThick-Circle|art@3||-2|0|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
5070 NThick-Circle|art@4||2|0|1.5|1.5|||ART_color()I74
5071 Nschematic:Bus_Pin|pin@8||4|0|-2|-2||
5072 Nschematic:Bus_Pin|pin@9||-4|0|-2|-2||
5073 Ngeneric:Universal-Pin|pin@12||4|2|-1|-1||
5074 Ngeneric:Universal-Pin|pin@14||4|-2|-1|-1||
5075 NPin|pin@20||-2|0.75|1|1||
5076 NPin|pin@21||2|0.75|1|1||
5077 NPin|pin@22||2|-0.75|1|1||
5078 NPin|pin@23||-2|-0.75|1|1||
5079 NPin|pin@24||2|0|1|1||
5080 NPin|pin@25||4|0||||
5081 NPin|pin@26||-2.75|0|1|1||
5082 NPin|pin@27||-4|0||||
5083 Ngeneric:Universal-Pin|pin@46||-1.5|0|-1|-1||
5084 Ngeneric:Universal-Pin|pin@48||0|0|-1|-1||
5085 Ngeneric:Universal-Pin|pin@50||1.5|0|-1|-1||
5086 NPin|pin@56||0.25|-0.25|1|1||
5087 NPin|pin@57||-0.25|-0.25||||
5088 NPin|pin@58||0.25|0.25|1|1||
5089 NPin|pin@59||-0.25|0.25|1|1||
5090 NPin|pin@60||-1.25|-0.25|1|1||
5091 NPin|pin@61||-1.75|-0.25||||
5092 NPin|pin@62||-1.25|0.25|1|1||
5093 NPin|pin@63||-1.75|0.25|1|1||
5094 NPin|pin@64||1.75|-0.25|1|1||
5095 NPin|pin@65||1.25|-0.25||||
5096 NPin|pin@66||1.75|0.25|1|1||
5097 NPin|pin@67||1.25|0.25|1|1||
5098 AThicker|net@8|||IJS0|pin@21||2|0.75|pin@20||-2|0.75|ART_color()I74
5099 AThicker|net@9|||IJS0|pin@22||2|-0.75|pin@23||-2|-0.75|ART_color()I74
5100 AThicker|net@10|||IJS1800|pin@24||2|0|pin@25||4|0|ART_color()I74
5101 AThicker|net@11|||IJS0|pin@26||-2.75|0|pin@27||-4|0|ART_color()I74
5102 AThicker|net@27|||IJS0|pin@56||0.25|-0.25|pin@57||-0.25|-0.25|ART_color()I74
5103 AThicker|net@28|||IJS2700|pin@56||0.25|-0.25|pin@58||0.25|0.25|ART_color()I74
5104 AThicker|net@29|||IJS0|pin@58||0.25|0.25|pin@59||-0.25|0.25|ART_color()I74
5105 AThicker|net@30|||IJS900|pin@59||-0.25|0.25|pin@57||-0.25|-0.25|ART_color()I74
5106 AThicker|net@31|||IJS0|pin@60||-1.25|-0.25|pin@61||-1.75|-0.25|ART_color()I74
5107 AThicker|net@32|||IJS2700|pin@60||-1.25|-0.25|pin@62||-1.25|0.25|ART_color()I74
5108 AThicker|net@33|||IJS0|pin@62||-1.25|0.25|pin@63||-1.75|0.25|ART_color()I74
5109 AThicker|net@34|||IJS900|pin@63||-1.75|0.25|pin@61||-1.75|-0.25|ART_color()I74
5110 AThicker|net@35|||IJS0|pin@64||1.75|-0.25|pin@65||1.25|-0.25|ART_color()I74
5111 AThicker|net@36|||IJS2700|pin@64||1.75|-0.25|pin@66||1.75|0.25|ART_color()I74
5112 AThicker|net@37|||IJS0|pin@66||1.75|0.25|pin@67||1.25|0.25|ART_color()I74
5113 AThicker|net@38|||IJS900|pin@67||1.25|0.25|pin@65||1.25|-0.25|ART_color()I74
5114 Ea||D5G2;|pin@9||U
5115 Eb||D5G2;|pin@8||U
5116 EsL1||D5G2;|pin@46||U
5117 EsL2||D5G2;|pin@48||U
5118 EsL3||D5G2;|pin@50||U
5119 X
5120
5121 # Cell wire_xcp_gnd;1{sch}
5122 Cwire_xcp_gnd;1{sch}||schematic|1083961993000|1173982789482||ATTR_C(D5FLeave alone;G1;HNOLPURX-20.5;Y-10.5;)S0.223f|ATTR_L(D5FLeave alone;G1;HNOLPURX-20.5;Y-7.5;)S100|ATTR_LEWIRE(D5G1;HNPTURX-20.5;Y-12;)I1|ATTR_R(D5FLeave alone;G1;HNOLPURX-20.5;Y-9;)S24m|ATTR_layer(D5FLeave alone;G1;HNOLPTURX-20.5;Y-13;)S2|ATTR_width(D5FLeave alone;G1;HNOLPTURX-20.5;Y-15;)S2.8|prototype_center()I[0,0]
5123 Ngeneric:Facet-Center|art@0||0|0||||AV
5124 NCapacitor|cap@9||-10|-5.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.1
5125 NCapacitor|cap@10||10|-5.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.1
5126 NCapacitor|cap@11||0|-5.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.1
5127 NOff-Page|conn@0||24.5|0|||RR|
5128 NOff-Page|conn@1||-21|0||||
5129 NOff-Page|conn@6||-10|8|||RRR|
5130 NOff-Page|conn@7||0|8|||RRR|
5131 NOff-Page|conn@8||10|8|||RRR|
5132 NGround|gnd@1||15|-10|||R|
5133 Ngeneric:Invisible-Pin|pin@0||15|17.5|||||ART_message(D5G1;)S[R2 ]
5134 Ngeneric:Invisible-Pin|pin@1||-15|17.5|||||ART_message(D5G1;)S[R1 = @R*@L/6]
5135 Ngeneric:Invisible-Pin|pin@2||0|17.5|||||ART_message(D5G1;)S[R12= @R*@L/3]
5136 Ngeneric:Invisible-Pin|pin@4||0|25.5|||||ART_message(D5G2;)S[this is a wire 'L' lambda long,with resistance 'R' ohms/lambda,and capacitance 'C' F/lambda]
5137 Ngeneric:Invisible-Pin|pin@5||-1|33.5|||||ART_message(D5G6;)Swire_xcpl_gnd
5138 NWire_Pin|pin@15||10|0||||
5139 NWire_Pin|pin@16||0|0||||
5140 NWire_Pin|pin@17||-10|0||||
5141 NWire_Pin|pin@21||-10|-10||||
5142 NWire_Pin|pin@22||0|-10||||
5143 NWire_Pin|pin@23||10|-10||||
5144 Ngeneric:Invisible-Pin|pin@38||28|-6.5|||||ART_message(D5G1;)SCc = 0.45Ctotal
5145 NResistor|res@0||-15|0|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/6
5146 NResistor|res@1||-5|0|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/3
5147 NResistor|res@2||18.5|0|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/6
5148 NResistor|res@3||5|0|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/3
5149 Iwire_xcp_gnd;1{ic}|wire_xcp@3||30|29.5|||D0G4;|ATTR_C(D5G1;NOLPURX2.5;Y-1;)S0.223f|ATTR_L(D5G1;OLPURY1;)S100|ATTR_LEWIRE(PUR)I1|ATTR_R(D5G1;NOLPURX-3;Y-1;)S24m|ATTR_layer(PUR)I2|ATTR_width(PUR)D2.8
5150 Awire|net@0|||IJS1800|res@2|b|20.5|0|conn@0|y|22.5|0
5151 Awire|net@1|||IJS0|res@0|a|-17|0|conn@1|y|-19|0
5152 Awire|net@17|||0|pin@15||10|0|res@3|b|7|0
5153 Awire|net@18|||0|pin@16||0|0|res@1|b|-3|0
5154 Awire|net@19|||0|pin@17||-10|0|res@0|b|-13|0
5155 Awire|net@36|||0|res@2|a|16.5|0|pin@15||10|0
5156 Awire|net@41|||0|res@3|a|3|0|pin@16||0|0
5157 Awire|net@43|||0|res@1|a|-7|0|pin@17||-10|0
5158 Awire|net@54|||900|cap@9|b|-10|-7.5|pin@21||-10|-10
5159 Awire|net@55|||1800|pin@21||-10|-10|pin@22||0|-10
5160 Awire|net@56|||2700|pin@22||0|-10|cap@11|b|0|-7.5
5161 Awire|net@57|||1800|pin@22||0|-10|pin@23||10|-10
5162 Awire|net@58|||2700|pin@23||10|-10|cap@10|b|10|-7.5
5163 Awire|net@59|||0|gnd@1||13|-10|pin@23||10|-10
5164 Awire|net@79|||900|conn@6|y|-10|6|pin@17||-10|0
5165 Awire|net@80|||900|conn@7|y|0|6|pin@16||0|0
5166 Awire|net@81|||900|conn@8|y|10|6|pin@15||10|0
5167 Awire|net@85|||2700|cap@11|a|0|-3.5|pin@16||0|0
5168 Awire|net@86|||900|pin@15||10|0|cap@10|a|10|-3.5
5169 Awire|net@87|||900|pin@17||-10|0|cap@9|a|-10|-3.5
5170 Ea||D4G2;|conn@1|a|U
5171 Eb||D6G2;X-5;|conn@0|y|U
5172 EsL1||D4G2;|conn@6|a|U
5173 EsL2||D4G2;|conn@7|a|U
5174 EsL3||D4G2;|conn@8|a|U
5175 X
5176
5177 # Cell wire_xcpl;1{ic}
5178 Cwire_xcpl;1{ic}||artwork|1083964052000|1204140525662|E|ATTR_C(D5FLeave alone;G1;HNOLPUCY-2;)S0.0000223p|ATTR_L(D5FLeave alone;G1;HOLPUDY1;)S100|ATTR_R(D5FLeave alone;G1;HNOLPURY-1;)S0.024|prototype_center()I[0,0]
5179 Ngeneric:Facet-Center|art@0||0|0||||AV
5180 NThick-Circle|art@1||-2|-2|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
5181 NThick-Circle|art@2||2|-2|1.5|1.5|||ART_color()I74
5182 NThick-Circle|art@3||-2|0|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
5183 NThick-Circle|art@4||2|0|1.5|1.5|||ART_color()I74
5184 NThick-Circle|art@7||-2|2|1.5|1.5|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
5185 NThick-Circle|art@8||2|2|1.5|1.5|||ART_color()I74
5186 NOpened-Polygon|art@9||-0.25|-1|2.5|2|||ART_color()I74|trace()V[1.25/-1,-1.25/0,1.25/0,-1.25/1]
5187 NOpened-Polygon|art@10||-0.25|1|2.5|2|||ART_color()I74|trace()V[1.25/-1,-1.25/0,1.25/0,-1.25/1]
5188 NPin|pin@0||-2.75|-2|1|1||
5189 NPin|pin@1||-4|-2||||
5190 NPin|pin@2||2|-2|1|1||
5191 NPin|pin@3||4|-2||||
5192 NPin|pin@4||-2|-1.25|1|1||
5193 NPin|pin@5||2|-1.25|1|1||
5194 NPin|pin@6||2|-2.75|1|1||
5195 NPin|pin@7||-2|-2.75|1|1||
5196 Nschematic:Bus_Pin|pin@8||4|0|-2|-2||
5197 Nschematic:Bus_Pin|pin@9||-4|0|-2|-2||
5198 Ngeneric:Universal-Pin|pin@10||-4|2|-1|-1||
5199 Ngeneric:Universal-Pin|pin@12||4|2|-1|-1||
5200 Ngeneric:Universal-Pin|pin@14||4|-2|-1|-1||
5201 Ngeneric:Universal-Pin|pin@16||-4|-2|-1|-1||
5202 NPin|pin@20||-2|0.75|1|1||
5203 NPin|pin@21||2|0.75|1|1||
5204 NPin|pin@22||2|-0.75|1|1||
5205 NPin|pin@23||-2|-0.75|1|1||
5206 NPin|pin@24||2|0|1|1||
5207 NPin|pin@25||4|0||||
5208 NPin|pin@26||-2.75|0|1|1||
5209 NPin|pin@27||-4|0||||
5210 NPin|pin@38||-2|2.75|1|1||
5211 NPin|pin@39||2|2.75|1|1||
5212 NPin|pin@40||2|1.25|1|1||
5213 NPin|pin@41||-2|1.25|1|1||
5214 NPin|pin@42||2|2|1|1||
5215 NPin|pin@43||4|2||||
5216 NPin|pin@44||-2.75|2|1|1||
5217 NPin|pin@45||-4|2||||
5218 AThicker|net@0|||IJS0|pin@0||-2.75|-2|pin@1||-4|-2|ART_color()I74
5219 AThicker|net@1|||IJS1800|pin@2||2|-2|pin@3||4|-2|ART_color()I74
5220 AThicker|net@2|||IJS0|pin@5||2|-1.25|pin@4||-2|-1.25|ART_color()I74
5221 AThicker|net@3|||IJS0|pin@6||2|-2.75|pin@7||-2|-2.75|ART_color()I74
5222 AThicker|net@8|||IJS0|pin@21||2|0.75|pin@20||-2|0.75|ART_color()I74
5223 AThicker|net@9|||IJS0|pin@22||2|-0.75|pin@23||-2|-0.75|ART_color()I74
5224 AThicker|net@10|||IJS1800|pin@24||2|0|pin@25||4|0|ART_color()I74
5225 AThicker|net@11|||IJS0|pin@26||-2.75|0|pin@27||-4|0|ART_color()I74
5226 AThicker|net@16|||IJS0|pin@39||2|2.75|pin@38||-2|2.75|ART_color()I74
5227 AThicker|net@17|||IJS0|pin@40||2|1.25|pin@41||-2|1.25|ART_color()I74
5228 AThicker|net@18|||IJS1800|pin@42||2|2|pin@43||4|2|ART_color()I74
5229 AThicker|net@19|||IJS0|pin@44||-2.75|2|pin@45||-4|2|ART_color()I74
5230 Ea||D5G2;|pin@9||U
5231 EaL||D5G2;|pin@10||U
5232 EaR||D5G2;|pin@16||U
5233 Eb||D5G2;|pin@8||U
5234 EbL||D5G2;|pin@12||U
5235 EbR||D5G2;|pin@14||U
5236 X
5237
5238 # Cell wire_xcpl;1{sch}
5239 Cwire_xcpl;1{sch}||schematic|1083961993000|1173982721429||ATTR_C(D5FLeave alone;G1;HNOLPUCX-19;Y-23;)S0.0000223p|ATTR_L(D5FLeave alone;G1;HNOLPUDX-19;Y-21;)S100|ATTR_R(D5FLeave alone;G1;HNOLPURX-19;Y-22;)S0.024|prototype_center()I[0,0]
5240 Ngeneric:Facet-Center|art@0||0|0||||AV
5241 NCapacitor|cap@0||-10|-22.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.55
5242 NCapacitor|cap@1||10|-22.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.55
5243 NCapacitor|cap@2||0|-22.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.55
5244 NCapacitor|cap@3||-10|-13.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.9
5245 NCapacitor|cap@4||10|-13.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.9
5246 NCapacitor|cap@5||0|-13.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.9
5247 NCapacitor|cap@6||-10|4.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.9
5248 NCapacitor|cap@7||10|4.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.9
5249 NCapacitor|cap@8||0|4.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.9
5250 NCapacitor|cap@9||-6.5|-5.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.1
5251 NCapacitor|cap@10||13.5|-5.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.1
5252 NCapacitor|cap@11||3.5|-5.5|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.1
5253 NCapacitor|cap@12||-10|13.5|||Y||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.55
5254 NCapacitor|cap@13||10|13.5|||Y||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.55
5255 NCapacitor|cap@14||0|13.5|||Y||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.55
5256 NOff-Page|conn@0||24.5|0|||RR|
5257 NOff-Page|conn@1||-21|0||||
5258 NOff-Page|conn@2||-21|9||||
5259 NOff-Page|conn@3||21|9|||RR|
5260 NOff-Page|conn@4||21|-18|||RR|
5261 NOff-Page|conn@5||-21|-18||||
5262 NGround|gnd@0||16|-26|||R|
5263 NGround|gnd@1||18.5|-10|||R|
5264 NGround|gnd@2||16|17|||YR|
5265 Ngeneric:Invisible-Pin|pin@0||15|21.5|||||ART_message(D5G1;)S[R2 ]
5266 Ngeneric:Invisible-Pin|pin@1||-15|21.5|||||ART_message(D5G1;)S[R1 = @R*@L/6]
5267 Ngeneric:Invisible-Pin|pin@2||0|21.5|||||ART_message(D5G1;)S[R12= @R*@L/3]
5268 Ngeneric:Invisible-Pin|pin@3||22|-22.5|||||ART_message(D5G1;)S[C = @C*@L/3]
5269 Ngeneric:Invisible-Pin|pin@4||0|29.5|||||ART_message(D5G2;)S[this is a wire 'L' lambda long,with resistance 'R' ohms/lambda,and capacitance 'C' F/lambda]
5270 Ngeneric:Invisible-Pin|pin@5||-1|37.5|||||ART_message(D5G6;)Swire_xcpl
5271 NWire_Pin|pin@6||0|-26||||
5272 NWire_Pin|pin@7||10|-26||||
5273 NWire_Pin|pin@8||-10|-26||||
5274 NWire_Pin|pin@12||10|-18||||
5275 NWire_Pin|pin@13||0|-18||||
5276 NWire_Pin|pin@14||-10|-18||||
5277 NWire_Pin|pin@15||10|0||||
5278 NWire_Pin|pin@16||0|0||||
5279 NWire_Pin|pin@17||-10|0||||
5280 NWire_Pin|pin@18||10|9||||
5281 NWire_Pin|pin@19||0|9||||
5282 NWire_Pin|pin@20||-10|9||||
5283 NWire_Pin|pin@21||-6.5|-10||||
5284 NWire_Pin|pin@22||3.5|-10||||
5285 NWire_Pin|pin@23||13.5|-10||||
5286 NWire_Pin|pin@24||0|17|||Y|
5287 NWire_Pin|pin@25||10|17|||Y|
5288 NWire_Pin|pin@26||-10|17|||Y|
5289 NWire_Pin|pin@27||-6.5|-2||||
5290 NWire_Pin|pin@28||-10|-2||||
5291 NWire_Pin|pin@29||0|-2||||
5292 NWire_Pin|pin@30||3.5|-2||||
5293 NWire_Pin|pin@31||10|-2||||
5294 NWire_Pin|pin@32||13.5|-2||||
5295 Ngeneric:Invisible-Pin|pin@38||37|-5.5|||||ART_message(D5G1;)SCc = 0.45Ctotal
5296 NResistor|res@0||-15|0|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/6
5297 NResistor|res@1||-5|0|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/3
5298 NResistor|res@2||18.5|0|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/6
5299 NResistor|res@3||5|0|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/3
5300 NResistor|res@4||-15|-18|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/6
5301 NResistor|res@5||-5|-18|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/3
5302 NResistor|res@6||15|-18|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/6
5303 NResistor|res@7||5|-18|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/3
5304 NResistor|res@8||-15|9|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/6
5305 NResistor|res@9||-5|9|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/3
5306 NResistor|res@10||15|9|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/6
5307 NResistor|res@11||5|9|||||SCHEM_resistance(D5FLeave alone;G1;OLURY1.5;)S@R*@L/3
5308 Iwire_xcpl;1{ic}|wire_xcp@1||24|32.5|||D0G4;|ATTR_C(D5FLeave alone;G1;NOLPUCY-2;)S2.23E-16|ATTR_L(D5FLeave alone;G1;OLPUDY1;)S100|ATTR_R(D5FLeave alone;G1;NOLPURY-1;)S0.24
5309 Awire|net@0|||IJS1800|res@2|b|20.5|0|conn@0|y|22.5|0
5310 Awire|net@1|||IJS0|res@0|a|-17|0|conn@1|y|-19|0
5311 Awire|net@3|||IJS2700|pin@6||0|-26|cap@2|b|0|-24.5
5312 Awire|net@4|||IJS0|pin@7||10|-26|pin@6||0|-26
5313 Awire|net@5|||IJS0|pin@6||0|-26|pin@8||-10|-26
5314 Awire|net@6|||IJS900|cap@1|b|10|-24.5|pin@7||10|-26
5315 Awire|net@7|||IJS2700|pin@8||-10|-26|cap@0|b|-10|-24.5
5316 Awire|net@17|||0|pin@15||10|0|res@3|b|7|0
5317 Awire|net@18|||0|pin@16||0|0|res@1|b|-3|0
5318 Awire|net@19|||0|pin@17||-10|0|res@0|b|-13|0
5319 Awire|net@20|||0|pin@12||10|-18|res@7|b|7|-18
5320 Awire|net@21|||0|pin@13||0|-18|res@5|b|-3|-18
5321 Awire|net@22|||0|pin@14||-10|-18|res@4|b|-13|-18
5322 Awire|net@23|||0|pin@18||10|9|res@11|b|7|9
5323 Awire|net@24|||0|pin@19||0|9|res@9|b|-3|9
5324 Awire|net@25|||0|pin@20||-10|9|res@8|b|-13|9
5325 Awire|net@26|||0|conn@3|y|19|9|res@10|b|17|9
5326 Awire|net@27|||1800|conn@2|y|-19|9|res@8|a|-17|9
5327 Awire|net@28|||0|res@4|a|-17|-18|conn@5|y|-19|-18
5328 Awire|net@29|||0|conn@4|y|19|-18|res@6|b|17|-18
5329 Awire|net@30|||0|res@6|a|13|-18|pin@12||10|-18
5330 Awire|net@31|||2700|cap@1|a|10|-20.5|pin@12||10|-18
5331 Awire|net@32|||0|res@7|a|3|-18|pin@13||0|-18
5332 Awire|net@33|||2700|cap@2|a|0|-20.5|pin@13||0|-18
5333 Awire|net@34|||0|res@5|a|-7|-18|pin@14||-10|-18
5334 Awire|net@35|||2700|cap@0|a|-10|-20.5|pin@14||-10|-18
5335 Awire|net@36|||0|res@2|a|16.5|0|pin@15||10|0
5336 Awire|net@37|||2700|cap@4|a|10|-11.5|pin@31||10|-2
5337 Awire|net@38|||900|cap@4|b|10|-15.5|pin@12||10|-18
5338 Awire|net@39|||900|cap@3|b|-10|-15.5|pin@14||-10|-18
5339 Awire|net@40|||900|cap@5|b|0|-15.5|pin@13||0|-18
5340 Awire|net@41|||0|res@3|a|3|0|pin@16||0|0
5341 Awire|net@42|||2700|cap@5|a|0|-11.5|pin@29||0|-2
5342 Awire|net@43|||0|res@1|a|-7|0|pin@17||-10|0
5343 Awire|net@44|||2700|cap@3|a|-10|-11.5|pin@28||-10|-2
5344 Awire|net@45|||900|cap@7|b|10|2.5|pin@15||10|0
5345 Awire|net@46|||900|cap@6|b|-10|2.5|pin@17||-10|0
5346 Awire|net@47|||900|cap@8|b|0|2.5|pin@16||0|0
5347 Awire|net@48|||0|res@10|a|13|9|pin@18||10|9
5348 Awire|net@49|||2700|cap@7|a|10|6.5|pin@18||10|9
5349 Awire|net@50|||0|res@11|a|3|9|pin@19||0|9
5350 Awire|net@51|||2700|cap@8|a|0|6.5|pin@19||0|9
5351 Awire|net@52|||0|res@9|a|-7|9|pin@20||-10|9
5352 Awire|net@53|||2700|cap@6|a|-10|6.5|pin@20||-10|9
5353 Awire|net@54|||900|cap@9|b|-6.5|-7.5|pin@21||-6.5|-10
5354 Awire|net@55|||1800|pin@21||-6.5|-10|pin@22||3.5|-10
5355 Awire|net@56|||2700|pin@22||3.5|-10|cap@11|b|3.5|-7.5
5356 Awire|net@57|||1800|pin@22||3.5|-10|pin@23||13.5|-10
5357 Awire|net@58|||2700|pin@23||13.5|-10|cap@10|b|13.5|-7.5
5358 Awire|net@59|||0|gnd@1||16.5|-10|pin@23||13.5|-10
5359 Awire|net@60|||0|gnd@0||14|-26|pin@7||10|-26
5360 Awire|net@61|||IJS900|pin@24||0|17|cap@14|b|0|15.5
5361 Awire|net@62|||IJS0|pin@25||10|17|pin@24||0|17
5362 Awire|net@63|||IJS0|pin@24||0|17|pin@26||-10|17
5363 Awire|net@64|||IJS2700|cap@13|b|10|15.5|pin@25||10|17
5364 Awire|net@65|||IJS900|pin@26||-10|17|cap@12|b|-10|15.5
5365 Awire|net@66|||0|gnd@2||14|17|pin@25||10|17
5366 Awire|net@67|||900|cap@14|a|0|11.5|pin@19||0|9
5367 Awire|net@68|||900|cap@12|a|-10|11.5|pin@20||-10|9
5368 Awire|net@69|||900|cap@13|a|10|11.5|pin@18||10|9
5369 Awire|net@70|||2700|cap@9|a|-6.5|-3.5|pin@27||-6.5|-2
5370 Awire|net@71|||2700|pin@28||-10|-2|pin@17||-10|0
5371 Awire|net@72|||0|pin@27||-6.5|-2|pin@28||-10|-2
5372 Awire|net@73|||2700|pin@29||0|-2|pin@16||0|0
5373 Awire|net@74|||1800|pin@29||0|-2|pin@30||3.5|-2
5374 Awire|net@75|||900|pin@30||3.5|-2|cap@11|a|3.5|-3.5
5375 Awire|net@76|||2700|pin@31||10|-2|pin@15||10|0
5376 Awire|net@77|||1800|pin@31||10|-2|pin@32||13.5|-2
5377 Awire|net@78|||900|pin@32||13.5|-2|cap@10|a|13.5|-3.5
5378 Ea||D4G2;|conn@1|a|U
5379 EaL||D4G2;|conn@2|a|U
5380 EaR||D4G2;|conn@5|a|U
5381 Eb||D6G2;X-5;|conn@0|y|U
5382 EbL||D6G2;X-5;|conn@3|y|U
5383 EbR||D6G2;X-5;|conn@4|y|U
5384 X
5385
5386 # Cell wire_xcpl_sides;1{ic}
5387 Cwire_xcpl_sides;1{ic}||artwork|1083964052000|1204140525662|E|ATTR_C(D5FLeave alone;G1;HNOLPUCY-1;)S0.0000223p|ATTR_L(D5FLeave alone;G1;HOLPUDY1;)S100|ATTR_LEIGNORE(D5G1;HNPTUDX-20.5;Y-1.5;)I1|prototype_center()I[0,0]
5388 Ngeneric:Facet-Center|art@0||0|0||||AV
5389 NThick-Circle|art@3||-2|0|2|2|R||ART_color()I74|ART_degrees()F[0.0,3.1415927]
5390 NThick-Circle|art@11||2|0|2|2|XR||ART_color()I74|ART_degrees()F[0.0,3.1415927]
5391 NPin|pin@38||-2|1|1|1||
5392 NPin|pin@39||2|1|1|1||
5393 Ngeneric:Universal-Pin|pin@46||-1.5|1|-1|-1||
5394 Ngeneric:Universal-Pin|pin@48||0|1|-1|-1||
5395 Ngeneric:Universal-Pin|pin@50||1.5|1|-1|-1||
5396 Ngeneric:Universal-Pin|pin@52||-1.5|-1|-1|-1||
5397 Ngeneric:Universal-Pin|pin@54||0|-1|-1|-1||
5398 Ngeneric:Universal-Pin|pin@56||1.5|-1|-1|-1||
5399 NPin|pin@58||-2|-0.25|1|1||
5400 NPin|pin@59||-1|-0.25||||
5401 NPin|pin@60||-2|0.25|1|1||
5402 NPin|pin@61||-1|0.25||||
5403 NPin|pin@62||-1.5|1|1|1|RRR|
5404 NPin|pin@63||-1.5|0.25|||RRR|
5405 NPin|pin@64||-1.5|-0.25|1|1|RRR|
5406 NPin|pin@65||-1.5|-1|||RRR|
5407 NPin|pin@66||-0.5|-0.25|1|1||
5408 NPin|pin@67||0.5|-0.25||||
5409 NPin|pin@68||-0.5|0.25|1|1||
5410 NPin|pin@69||0.5|0.25||||
5411 NPin|pin@70||0|1|1|1|RRR|
5412 NPin|pin@71||0|0.25|||RRR|
5413 NPin|pin@72||0|-0.25|1|1|RRR|
5414 NPin|pin@73||0|-1|||RRR|
5415 NPin|pin@74||1|-0.25|1|1||
5416 NPin|pin@75||2|-0.25||||
5417 NPin|pin@76||1|0.25|1|1||
5418 NPin|pin@77||2|0.25||||
5419 NPin|pin@78||1.5|1|1|1|RRR|
5420 NPin|pin@79||1.5|0.25|||RRR|
5421 NPin|pin@80||1.5|-0.25|1|1|RRR|
5422 NPin|pin@81||1.5|-1|||RRR|
5423 NPin|pin@82||-2|-1|1|1||
5424 NPin|pin@83||2|-1|1|1||
5425 AThicker|net@16|||IJS0|pin@39||2|1|pin@38||-2|1|ART_color()I74
5426 AThicker|net@26|||IJS1800|pin@58||-2|-0.25|pin@59||-1|-0.25|ART_color()I74
5427 AThicker|net@27|||IJS1800|pin@60||-2|0.25|pin@61||-1|0.25|ART_color()I74
5428 AThicker|net@28|||IJS900|pin@62||-1.5|1|pin@63||-1.5|0.25|ART_color()I74
5429 AThicker|net@29|||IJS900|pin@64||-1.5|-0.25|pin@65||-1.5|-1|ART_color()I74
5430 AThicker|net@30|||IJS1800|pin@66||-0.5|-0.25|pin@67||0.5|-0.25|ART_color()I74
5431 AThicker|net@31|||IJS1800|pin@68||-0.5|0.25|pin@69||0.5|0.25|ART_color()I74
5432 AThicker|net@32|||IJS900|pin@70||0|1|pin@71||0|0.25|ART_color()I74
5433 AThicker|net@33|||IJS900|pin@72||0|-0.25|pin@73||0|-1|ART_color()I74
5434 AThicker|net@34|||IJS1800|pin@74||1|-0.25|pin@75||2|-0.25|ART_color()I74
5435 AThicker|net@35|||IJS1800|pin@76||1|0.25|pin@77||2|0.25|ART_color()I74
5436 AThicker|net@36|||IJS900|pin@78||1.5|1|pin@79||1.5|0.25|ART_color()I74
5437 AThicker|net@37|||IJS900|pin@80||1.5|-0.25|pin@81||1.5|-1|ART_color()I74
5438 AThicker|net@38|||IJS0|pin@83||2|-1|pin@82||-2|-1|ART_color()I74
5439 EsL1||D5G2;|pin@46||U
5440 EsL2||D5G2;|pin@48||U
5441 EsL3||D5G2;|pin@50||U
5442 EsR1||D5G2;|pin@52||U
5443 EsR2||D5G2;|pin@54||U
5444 EsR3||D5G2;|pin@56||U
5445 X
5446
5447 # Cell wire_xcpl_sides;1{sch}
5448 Cwire_xcpl_sides;1{sch}||schematic|1083961993000|1173982739755||ATTR_C(D5FLeave alone;G1;HNOLPUCX-20.5;Y-5.5;)S0.0000223p|ATTR_L(D5FLeave alone;G1;HNOLPUDX-20.5;Y-3.5;)S100|ATTR_LEIGNORE(D5G1;HNPTUDX-20.5;Y-1.5;)I1|prototype_center()I[0,0]
5449 Ngeneric:Facet-Center|art@0||0|0||||AV
5450 NCapacitor|cap@6||-10|0|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.45
5451 NCapacitor|cap@7||10|0|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.45
5452 NCapacitor|cap@8||0|0|||||SCHEM_capacitance(D5FLeave alone;G1;OLUC)S@C*@L/3*0.45
5453 NOff-Page|conn@6||-10|8|||RRR|
5454 NOff-Page|conn@7||0|8|||RRR|
5455 NOff-Page|conn@8||10|8|||RRR|
5456 NOff-Page|conn@9||-10|-7.5|||YRRR|
5457 NOff-Page|conn@10||0|-7.5|||YRRR|
5458 NOff-Page|conn@11||10|-7.5|||YRRR|
5459 Ngeneric:Invisible-Pin|pin@3||20.5|-6.5|||||ART_message(D5G1;)S[C = @C*@L/3]
5460 Ngeneric:Invisible-Pin|pin@4||0|24|||||ART_message(D5G2;)S[this is a wire 'L' lambda long,with resistance 'R' ohms/lambda,and capacitance 'C' F/lambda]
5461 Ngeneric:Invisible-Pin|pin@5||-1|32|||||ART_message(D5G6;)Swire_xcpl
5462 Ngeneric:Invisible-Pin|pin@38||37|-5.5|||||ART_message(D5G1;)SCc = 0.45Ctotal
5463 Iwire_xcpl_sides;1{ic}|wire_xcp@3||24|27|||D0G4;|ATTR_C(D5FLeave alone;G1;NOLPUCY-1;)S2.23E-16|ATTR_L(D5FLeave alone;G1;OLPUDY1;)S100
5464 Awire|net@84|||900|conn@8|y|10|6|cap@7|a|10|2
5465 Awire|net@85|||900|conn@6|y|-10|6|cap@6|a|-10|2
5466 Awire|net@86|||900|conn@7|y|0|6|cap@8|a|0|2
5467 Awire|net@93|||2700|conn@9|y|-10|-5.5|cap@6|b|-10|-2
5468 Awire|net@94|||2700|conn@10|y|0|-5.5|cap@8|b|0|-2
5469 Awire|net@95|||2700|conn@11|y|10|-5.5|cap@7|b|10|-2
5470 EsL1||D4G2;|conn@6|a|U
5471 EsL2||D4G2;|conn@7|a|U
5472 EsL3||D4G2;|conn@8|a|U
5473 EsR1||D4G2;|conn@9|a|U
5474 EsR2||D4G2;|conn@10|a|U
5475 EsR3||D4G2;|conn@11|a|U
5476 X