omegaCounter 40nm: adjust sizes to make it easier to use a single finger width

[fleet.git] / chips / omegaCounter / 40nm / electric / redFive.jelib

# header information:
HredFive|8.10h|USER_electrical_units()I70464

# Views:
Vicon|ic
Vschematic|sch

# External Libraries:

Lorange40nm|orange40nm

Lspiceparts|spiceparts

# Tools:
Ouser|DefaultTechnology()Scmos90|SchematicTechnology()Scmos90
Oio|GDSOutputConvertsBracketsInExports()BF|GDSWritesExportPins()BT
OSTA|GlobalSDCCommands()S"\n### 4 GHz clock setup\ncreate_clock -period 0.250 -name clk -waveform \"0 0.125\" clk\nset_clock_uncertainty -setup 0.010 clk\nset_clock_uncertainty -hold 0.010 clk\nset_propagated_clock clk\nset_clock_transition -rise 0.030 clk\nset_clock_transition -fall 0.030 clk\n#set_driving_cell -lib_cell inv_X008_0 clk\n\n### remove scan path from timing\nset_false_path -through */so\nset_false_path -from {sin}\nset_false_path -from {scanEn}\nset_false_path -to {sout}\n"

# Technologies:
Tcmos90|"GDS(ST)LayerForPad-FrameINcmos90"()S43|"GDS(TSMC)LayerForPad-FrameINcmos90"()S43
Tmocmos|SelectedFoundryFormocmos()STSMC

# Cell NMOS;1{ic}
CNMOS;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5G1.5;HNPX3.5;Y0.5;)I1|prototype_center()I[0,-8000]
Ngeneric:Facet-Center|art@0||0|0||||AV
Ngeneric:Invisible-Pin|pin@0||0|-2||||
NPin|pin@1||-1.5|0|1|1|RR|
NPin|pin@2||-3|0|||RR|
Nschematic:Bus_Pin|pin@3||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@4||0|2|-2|-2||
NPin|pin@5||0|-2||||
NPin|pin@6||-1.5|1|1|1||
NPin|pin@7||-1.5|-1|1|1||
NPin|pin@8||0|-1||||
NPin|pin@9||-0.75|-1|1|1||
NPin|pin@10||-0.75|1|1|1||
NPin|pin@11||0|1||||
NPin|pin@12||0|2||||
AThicker|net@0|||FS900|pin@10||-0.75|1|pin@9||-0.75|-1|ART_color()I10
AThicker|net@1|||FS1800|pin@2||-3|0|pin@1||-1.5|0|ART_color()I10
AThicker|net@2|||FS900|pin@6||-1.5|1|pin@7||-1.5|-1|ART_color()I10
AThicker|net@3|||FS900|pin@8||0|-1|pin@5||0|-2|ART_color()I10
AThicker|net@4|||FS1800|pin@9||-0.75|-1|pin@8||0|-1|ART_color()I10
AThicker|net@5|||FS0|pin@11||0|1|pin@10||-0.75|1|ART_color()I10
AThicker|net@6|||FS900|pin@12||0|2|pin@11||0|1|ART_color()I10
Ed||D5G1;|pin@4||B
Eg||D5G1;|pin@3||I
Es||D5G1;|pin@0||B
X

# Cell NMOS;2{sch}
CNMOS;2{sch}||schematic|1021415734000|1249583004567||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_X(D5G1;HNPX-8.5;Y-11.25;)I1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@2||28.5|0|||D5G4;|ATTR_Delay(D5G1;NPX4.5;Y-1;)S10|ATTR_X(D5G1.5;NOLPX4.5;Y1;)S1
Iorange40nm:NMOSf;1{ic}|NMOSf@1||0|-8|||D0G4;|ATTR_Delay(OJP)S@Delay|ATTR_L(D5G1;NOJPX3.5;Y0.5;)S4|ATTR_M1(D5G1;NOLPX3.5;Y-1.5;)S1|ATTR_NF(D5G1;NOLPX3.5;Y-3.5;)S@X <= 6 ? 1 : @X <= 12 ? 2 : @X <= 18 ? 3 : @X <= 24 ? 4 : @X <= 30 ? 5 : @X <= 36 ? 6 : @X <= 42 ? 7 : @X/6|ATTR_W(D5G1;NOJPX3.5;Y1.5;)S@X * 12
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||6|-16.5||||
NOff-Page|conn@1||5.5|0||||
NOff-Page|conn@2||-18.5|-8||||
NWire_Pin|pin@1||0|-16.5||||
NWire_Pin|pin@2||0|0||||
Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)S[NMOS]
Ngeneric:Invisible-Pin|pin@5||-0.5|6|||||ART_message(D5G2;)Sstandard-threshold strength-based NMOS device
Awire|net@3|||1800|pin@1||0|-16.5|conn@0|a|4|-16.5
Awire|net@4|||1800|pin@2||0|0|conn@1|a|3.5|0
Awire|net@5|||900|pin@2||0|0|NMOSf@1|d|0|-6
Awire|net@6|||1800|conn@2|y|-16.5|-8|NMOSf@1|g|-3|-8
Awire|net@7|||2700|pin@1||0|-16.5|NMOSf@1|s|0|-10
Ed||D5G2;|conn@1|y|B
Eg||D5G2;|conn@2|a|I
Es||D5G2;|conn@0|y|B
X

# Cell PMOS;1{ic}
CPMOS;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-2;)I100|ATTR_X(D5G1.5;HNPX3.5;Y0.5;)I1|prototype_center()I[-8000,16000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-2|0|1|1|RR||ART_color()I10
Ngeneric:Invisible-Pin|pin@0||0|2||||
Nschematic:Bus_Pin|pin@1||0|-2|-2|-2||
Nschematic:Bus_Pin|pin@2||-3|0|-2|-2||
NPin|pin@3||0|1||||
NPin|pin@4||-0.75|1|1|1||
NPin|pin@5||-0.75|-1|1|1||
NPin|pin@6||0|-1||||
NPin|pin@7||0|-2||||
NPin|pin@8||-3|0|||RR|
NPin|pin@9||-2.5|0|1|1|RRR|
NPin|pin@10||0|2||||
NPin|pin@11||-1.5|1|1|1|Y|
NPin|pin@12||-1.5|-1|1|1|Y|
AThicker|net@0|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I10
AThicker|net@1|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I10
AThicker|net@2|||FS1800|pin@8||-3|0|pin@9||-2.5|0|ART_color()I10
AThicker|net@3|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I10
AThicker|net@4|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I10
AThicker|net@5|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I10
AThicker|net@6|||FS2700|pin@12||-1.5|-1|pin@11||-1.5|1|ART_color()I10
Ed||D8G1;|pin@1||B
Eg||D6G1;|pin@2||I
Es||D2G1;|pin@0||B
X

# Cell PMOS;2{sch}
CPMOS;2{sch}||schematic|1021415734000|1253517339112||ATTR_Delay(D5G1;HNPX-8.5;Y1.25;)I100|ATTR_X(D5G1;HNPX-8.5;Y2.75;)I1|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@0||15.25|12.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-1;)S10|ATTR_X(D5G1.5;NPX3.5;Y1;)I1
Iorange40nm:PMOSf;1{ic}|PMOSf@1||0|7|||D0G4;|ATTR_Delay(OJP)S@Delay|ATTR_L(D5G1;NOJPX3.5;Y0.5;)S4|ATTR_M1(D5G1;NOLPX3.5;Y-1.5;)S1|ATTR_NF(D5G1;NOLPX3.5;Y-0.5;)S@X <= 6 ? 1 : @X <= 12 ? 2 : @X <= 18 ? 3 : @X <= 24 ? 4 : @X <= 30 ? 5 : @X <= 36 ? 6 : @X <= 42 ? 7 : @X/6|ATTR_W(D6G1;NOJPX2;Y1.5;)S24*@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||5|11.5||||
NOff-Page|conn@1||-9.5|7||||
NOff-Page|conn@2||5|1||||
NWire_Pin|pin@1||0|11.5||||
NWire_Pin|pin@2||0|1||||
Ngeneric:Invisible-Pin|pin@3||-0.5|23.5|||||ART_message(D5G6;)S[PMOS]
Ngeneric:Invisible-Pin|pin@4||-0.5|18.5|||||ART_message(D5G2;)S3 terminal standard-threshold strength-based PMOS device
Awire|net@3|||1800|pin@1||0|11.5|conn@0|a|3|11.5
Awire|net@4|||0|conn@2|a|3|1|pin@2||0|1
Awire|net@5|||900|pin@1||0|11.5|PMOSf@1|s|0|9
Awire|net@6|||900|PMOSf@1|d|0|5|pin@2||0|1
Awire|net@7|||0|PMOSf@1|g|-3|7|conn@1|y|-7.5|7
Ed||D5G2;|conn@2|y|B
Eg||D5G2;|conn@1|a|I
Es||D5G2;|conn@0|y|B
X

# Cell hifidely;1{ic}
Chifidely;1{ic}||artwork|1046374423000|1046374607000|E|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||3.5|0|2|2|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NPin|pin@0||2|1|1|1||
NPin|pin@1||2|-1|1|1||
NPin|pin@2||3|-1|1|1||
NPin|pin@3||3|1|1|1||
NPin|pin@4||3.5|-1|1|1||
NPin|pin@5||-4|-1|1|1||
NPin|pin@6||-4|1|1|1||
NPin|pin@7||3.5|1|1|1||
Nschematic:Bus_Pin|pin@8||4.5|0||||
Nschematic:Bus_Pin|pin@9||-4|0||||
AThicker|net@0|||FS2700|pin@1||2|-1|pin@0||2|1|ART_color()I10
AThicker|net@1|||FS2700|pin@2||3|-1|pin@3||3|1|ART_color()I10
AThicker|net@2|||FS0|pin@4||3.5|-1|pin@5||-4|-1|ART_color()I10
AThicker|net@3|||FS2700|pin@5||-4|-1|pin@6||-4|1|ART_color()I10
AThicker|net@4|||FS1800|pin@6||-4|1|pin@7||3.5|1|ART_color()I10
Ein||D5G2;|pin@9||I
Eout||D5G2;|pin@8||O
X

# Cell hifidely;1{sch}
Chifidely;1{sch}||schematic|1046374013000|1103844568483||prototype_center()I[0,0]
Ispiceparts:Transmission;1{ic}|Transmis@0||-1|-1|||D0G4;|ATTR_Delay(D5G0.5;NPY-1;)S500ps|ATTR_z0(D5G0.5;NPY1;)I50
Ispiceparts:VCVS;1{ic}|VCVS@0||16.5|-1|||D0G4;|ATTR_Gain(D5G0.5;NPY1;)I1|ATTR_Maximum(D5G0.5;NPY-1;)S10V|ATTR_Minimum(D5G0.5;NP)S-10V
Ispiceparts:VCVS;1{ic}|VCVS@1||-14.5|-1|||D0G4;|ATTR_Gain(D5G0.5;NPY1;)I1|ATTR_Maximum(D5G0.5;NPY-1;)S10V|ATTR_Minimum(D5G0.5;NP)S-10V
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||27|1||||
NOff-Page|conn@1||-28|4||||
NGround|gnd@0||24|-8||||
NGround|gnd@1||-24|-8.5||||
NGround|gnd@2||8|-8||||
NGround|gnd@3||-7.5|-8||||
Ihifidely;1{ic}|hifidely@0||16.5|13.5|||D0G4;
NWire_Pin|pin@0||-21|1||||
NWire_Pin|pin@1||-21|4||||
NWire_Pin|pin@3||-24|4||||
NWire_Pin|pin@5||24|-3||||
NWire_Pin|pin@6||8|3.25||||
NWire_Pin|pin@8||10|3.25||||
NWire_Pin|pin@9||5.5|3.25||||
NWire_Pin|pin@24||-24|-3||||
NWire_Pin|pin@25||-7.5|-3||||
NWire_Pin|pin@26||5.5|1||||
NWire_Pin|pin@27||10|1||||
NWire_Pin|pin@28||8|-3||||
NResistor|res@0||-24|0|||R||SCHEM_resistance(D5G1;)I1000000
NResistor|res@1||8|0|||R||SCHEM_resistance(D5G1;)I50
Awire|net@1|||2700|pin@0||-21|1|pin@1||-21|4
Awire|net@2|||0|pin@1||-21|4|pin@3||-24|4
Awire|net@5|||0|pin@3||-24|4|conn@1|y|-26|4
Awire|net@11|||900|pin@5||24|-3|gnd@0||24|-6
Awire|net@13|||900|pin@6||8|3.25|res@1|b|8|2
Awire|net@14|||0|pin@8||10|3.25|pin@6||8|3.25
Awire|net@15|||0|pin@6||8|3.25|pin@9||5.5|3.25
Awire|net@24|||1800|pin@25||-7.5|-3|Transmis@0|b|-6|-3
Awire|net@25|||1800|VCVS@1|x|-9.5|1|Transmis@0|a|-6|1
Awire|net@27|||0|pin@28||8|-3|Transmis@0|y|4|-3
Awire|net@28|||2700|res@0|b|-24|2|pin@3||-24|4
Awire|net@29|||2700|gnd@1||-24|-6.5|pin@24||-24|-3
Awire|net@30|||900|pin@28||8|-3|gnd@2||8|-6
Awire|net@31|||2700|pin@24||-24|-3|res@0|a|-24|-2
Awire|net@32|||0|VCVS@1|b|-19.5|-3|pin@24||-24|-3
Awire|net@33|||1800|pin@0||-21|1|VCVS@1|a|-19.5|1
Awire|net@34|||1800|VCVS@1|y|-9.5|-3|pin@25||-7.5|-3
Awire|net@36|||1800|Transmis@0|x|4|1|pin@26||5.5|1
Awire|net@38|||1800|pin@27||10|1|VCVS@0|a|11.5|1
Awire|net@40|||900|pin@8||10|3.25|pin@27||10|1
Awire|net@41|||900|pin@9||5.5|3.25|pin@26||5.5|1
Awire|net@42|||2700|gnd@3||-7.5|-6|pin@25||-7.5|-3
Awire|net@43|||0|pin@5||24|-3|VCVS@0|y|21.5|-3
Awire|net@44|||0|conn@0|a|25|1|VCVS@0|x|21.5|1
Awire|net@45|||900|res@1|a|8|-2|pin@28||8|-3
Awire|net@46|||0|VCVS@0|b|11.5|-3|pin@28||8|-3
Ein||D5G2;|conn@1|y|I
Eout||D5G2;|conn@0|y|O
X

# Cell inv;1{ic}
Cinv;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NPin|pin@0||1.5|0|1|1||
Nschematic:Bus_Pin|pin@1||-2.5|0|-2|-2||
NPin|pin@2||-1.5|0|1|1||
NPin|pin@3||-2.5|0||||
Nschematic:Bus_Pin|pin@4||2.5|0|-2|-2||
NPin|pin@5||-1.5|2|1|1||
NPin|pin@6||-1.5|-2|1|1||
AThicker|net@0|||FS3263|pin@0||1.5|0|pin@5||-1.5|2|ART_color()I10
AThicker|net@1|||FS337|pin@0||1.5|0|pin@6||-1.5|-2|ART_color()I10
AThicker|net@2|||FS0|pin@2||-1.5|0|pin@3||-2.5|0|ART_color()I10
AThicker|net@3|||FS2700|pin@6||-1.5|-2|pin@5||-1.5|2|ART_color()I10
Ein||D5G1;|pin@1||I
Eout||D5G1;|pin@4||O
X

# Cell inv;1{sch}
Cinv;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-12;Y-5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-12;Y-4;)S1|ATTR_drive0(D5G1;HNPTX-12;Y-6;)Sstrong0|ATTR_drive1(D5G1;HNPTX-12;Y-7;)Sstrong1|ATTR_verilog_template(D5G1;NTX24.5;Y-11;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|-5|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@1||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||19|0||||
NOff-Page|conn@1||-17.5|0||||
NGround|gnd@0||0|-12||||
Iinv;1{ic}|inv@0||25|13|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
IinvI;2{ic}|inv@1||25|7|||D5G4;|ATTR_Delay(D5G1;NPX1.75;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.25;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
NWire_Pin|pin@0||-4|0||||
NWire_Pin|pin@1||0|0||||
Ngeneric:Invisible-Pin|pin@2||0|16.5|||||ART_message(D5G2;)S[P to N width ratio is 2 to 1]
Ngeneric:Invisible-Pin|pin@3||28.5|-6|||||ART_message(D5G2;)S[X is drive strength,P and N drive strengths are equal]
Ngeneric:Invisible-Pin|pin@4||0|18.5|||||ART_message(D5G2;)S[one-parameter fixed size (non-LE) inverter]
Ngeneric:Invisible-Pin|pin@5||0.5|22|||||ART_message(D5G6;)S[inv]
NWire_Pin|pin@6||-4|6||||
NWire_Pin|pin@7||-4|-5||||
NPower|pwr@0||0|11.5||||
Awire|net@0|||0|conn@0|a|17|0|pin@1||0|0
Awire|net@1|||0|pin@0||-4|0|conn@1|y|-15.5|0
Awire|net@2|||900|pin@6||-4|6|pin@0||-4|0
Awire|net@3|||900|pin@0||-4|0|pin@7||-4|-5
Awire|net@4|||2700|gnd@0||0|-10|NMOS@1|s|0|-7
Awire|net@5|||2700|NMOS@1|d|0|-3|pin@1||0|0
Awire|net@6|||0|NMOS@1|g|-3|-5|pin@7||-4|-5
Awire|net@7|||2700|PMOS@1|s|0|8|pwr@0||0|11.5
Awire|net@8|||0|PMOS@1|g|-3|6|pin@6||-4|6
Awire|net@9|||2700|pin@1||0|0|PMOS@1|d|0|4
Ein||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell inv2i;1{ic}
Cinv2i;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-1|1|1|1|||ART_color()I10
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
NPin|pin@0||-1.5|-1|1|1||
NPin|pin@1||-2.5|-1||||
Nschematic:Bus_Pin|pin@2||-2.5|-1||||
NPin|pin@3||-1.5|-2|1|1||
NPin|pin@4||-1.5|2|1|1||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
NPin|pin@6||-2.5|1||||
NPin|pin@7||-1.5|1|1|1||
Nschematic:Bus_Pin|pin@8||-2.5|1|-2|-2||
NPin|pin@9||1.5|0|1|1||
AThicker|net@0|||FS0|pin@0||-1.5|-1|pin@1||-2.5|-1|ART_color()I10
AThicker|net@1|||FS2700|pin@3||-1.5|-2|pin@4||-1.5|2|ART_color()I10
AThicker|net@2|||FS0|pin@7||-1.5|1|pin@6||-2.5|1|ART_color()I10
AThicker|net@3|||FS337|pin@9||1.5|0|pin@3||-1.5|-2|ART_color()I10
AThicker|net@4|||FS3263|pin@9||1.5|0|pin@4||-1.5|2|ART_color()I10
Ein[n]||D5G1;|pin@2||I
Ein[p]||D5G1;|pin@8||I
Eout||D5G1;|pin@5||O
X

# Cell inv2i;1{sch}
Cinv2i;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-13.25;Y-11.25;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-13.25;Y-10.25;)S1|ATTR_drive0(D5G1;HNPTX-13.25;Y-12.25;)Sstrong0|ATTR_drive1(D5G1;HNPTX-13.25;Y-13.25;)Sstrong1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|-5|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@1||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-17.5|-5||||
NOff-Page|conn@1||-17.5|6||||
NOff-Page|conn@2||19|0||||
NGround|gnd@0||0|-12||||
Iinv2i;1{ic}|inv2i@0||25|13|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ngeneric:Invisible-Pin|pin@0||0.5|22|||||ART_message(D5G6;)S[inv2i]
Ngeneric:Invisible-Pin|pin@1||0|18.5|||||ART_message(D5G2;)S[two-input inverter]
Ngeneric:Invisible-Pin|pin@2||28.5|-6|||||ART_message(D5G2;)S[X is drive strength,P and N drive strengths are equal]
Ngeneric:Invisible-Pin|pin@3||0|16.5|||||ART_message(D5G2;)S[P to N width ratio is 2 to 1]
NWire_Pin|pin@4||0|0||||
NPower|pwr@0||0|11.5||||
Awire|net@0|||0|PMOS@1|g|-3|6|conn@1|y|-15.5|6
Awire|net@1|||1800|conn@0|y|-15.5|-5|NMOS@1|g|-3|-5
Awire|net@2|||1800|pin@4||0|0|conn@2|a|17|0
Awire|net@3|||900|pwr@0||0|11.5|PMOS@1|s|0|8
Awire|net@4|||2700|pin@4||0|0|PMOS@1|d|0|4
Awire|net@5|||2700|gnd@0||0|-10|NMOS@1|s|0|-7
Awire|net@6|||900|pin@4||0|0|NMOS@1|d|0|-3
Ein[n]||D5G2;|conn@0|a|I
Ein[p]||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell inv2iCTLn;1{ic}
Cinv2iCTLn;1{ic}||artwork|993434516000|1204140525662|E|ATTR_X(D5G1.5;HNPX1.5;Y2;)I1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-2|1|1|1|||ART_color()I10
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
Ngeneric:Invisible-Pin|pin@0||-2.5|1||||
NPin|pin@1||-1.5|-1|1|1|R|
NPin|pin@2||-2.5|-1|1|1|R|
Ngeneric:Invisible-Pin|pin@3||0|-2||||
Ngeneric:Invisible-Pin|pin@4||0|0|||||ART_message(D5G1.5;)S[CTLn]
NPin|pin@5||1.5|0|0.5|0.5||
NPin|pin@6||-1.5|-2|0.5|0.5||
NPin|pin@7||-1.5|2|0.5|0.5||
Ngeneric:Invisible-Pin|pin@8||2.5|0||||
Ngeneric:Invisible-Pin|pin@9||-2.5|-1||||
NPin|pin@10||0|-2|1|1|RR|
NPin|pin@11||0|-1|1|1|RR|
AThicker|net@0|||FS1800|pin@2||-2.5|-1|pin@1||-1.5|-1|ART_color()I10
AThicker|net@1|||FS2137|pin@6||-1.5|-2|pin@5||1.5|0|ART_color()I10
AThicker|net@2|||FS3263|pin@5||1.5|0|pin@7||-1.5|2|ART_color()I10
AThicker|net@3|||FS900|pin@7||-1.5|2|pin@6||-1.5|-2|ART_color()I10
AThicker|net@4|||FS2700|pin@10||0|-2|pin@11||0|-1|ART_color()I10
Ectl||D5G2;|pin@3||I
EinN||D5G2;|pin@9||I
EinP||D5G2;|pin@0||I
Eout||D5G2;|pin@8||O
X

# Cell inv2iCTLn;1{sch}
Cinv2iCTLn;1{sch}||schematic|993433994000|1248729331835||ATTR_X(D5G2;HNPX-19;Y-5;)I1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|0.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I175|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X*2.0
INMOS;1{ic}|NMOS@2||0|9|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I175|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X*2.0
IPMOS;1{ic}|PMOS@1||0|22|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-11|22||||
NOff-Page|conn@1||-12|9||||
NOff-Page|conn@2||-12|0.5||||
NOff-Page|conn@3||12.5|16||||
NGround|gnd@0||0|-6.5||||
Iinv2iCTLn;1{ic}|inv2iCTL@0||15|27.75|||D0G4;|ATTR_X(D5G1.5;NPX1.5;Y2;)I2
NWire_Pin|pin@0||0|20.5||||
NWire_Pin|pin@1||-2.5|22||||
Ngeneric:Invisible-Pin|pin@2||0|33|||||ART_message(D5G3;)S[inv2iCTLn]
NWire_Pin|pin@3||0|16||||
NPower|pwr@0||0|28||||
Awire|net@0|||0|PMOS@1|g|-3|22|conn@0|y|-9|22
Awire|net@1|||0|NMOS@1|g|-3|0.5|conn@2|y|-10|0.5
Awire|net@2|||900|NMOS@1|s|0|-1.5|gnd@0||0|-4.5
Awire|net@3|||1800|PMOS@1|g|-3|22|pin@1||-2.5|22
Awire|net@4|||900|pwr@0||0|28|PMOS@1|s|0|24
Awire|net@5|||2700|PMOS@1|d|0|20|pin@0||0|20.5
Awire|net@6|||1800|pin@3||0|16|conn@3|a|10.5|16|SIM_verilog_wire_type(D5G1;)Strireg
Awire|net@7|||2700|NMOS@1|d|0|2.5|NMOS@2|s|0|7
Awire|net@8|||900|pin@3||0|16|NMOS@2|d|0|11
Awire|net@9|||900|PMOS@1|d|0|20|pin@3||0|16
Awire|net@10|||0|NMOS@2|g|-3|9|conn@1|y|-10|9
Ectl||D5G2;X-4;|conn@1|y|I
EinN||D5G2;|conn@2|a|I
EinP||D4G2;|conn@0|a|I
Eout||D5G2;|conn@3|y|O
X

# Cell inv2iCTLp;1{ic}
Cinv2iCTLp;1{ic}||artwork|993434516000|1204140525662|E|ATTR_X(D5G1.5;HNPX1.5;Y2;)I1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NThick-Circle|art@2||0|-1.5|1|1|||ART_color()I10
NThick-Circle|art@3||-2|1|1|1|||ART_color()I10
Ngeneric:Invisible-Pin|pin@0||-2.5|-1||||
Ngeneric:Invisible-Pin|pin@1||2.5|0||||
NPin|pin@2||-1.5|2|0.5|0.5||
NPin|pin@3||-1.5|-2|0.5|0.5||
NPin|pin@4||1.5|0|0.5|0.5||
Ngeneric:Invisible-Pin|pin@5||0|0|||||ART_message(D5G1.5;)S[CTLp]
Ngeneric:Invisible-Pin|pin@6||0|-2||||
NPin|pin@7||-2.5|-1|1|1|R|
NPin|pin@8||-1.5|-1|1|1|R|
Ngeneric:Invisible-Pin|pin@9||-2.5|1||||
AThicker|net@0|||FS900|pin@2||-1.5|2|pin@3||-1.5|-2|ART_color()I10
AThicker|net@1|||FS3263|pin@4||1.5|0|pin@2||-1.5|2|ART_color()I10
AThicker|net@2|||FS2137|pin@3||-1.5|-2|pin@4||1.5|0|ART_color()I10
AThicker|net@3|||FS1800|pin@7||-2.5|-1|pin@8||-1.5|-1|ART_color()I10
Ectl||D5G2;|pin@6||I
EinN||D5G2;|pin@0||I
EinP||D5G2;|pin@9||I
Eout||D5G2;|pin@1||O
X

# Cell inv2iCTLp;1{sch}
Cinv2iCTLp;1{sch}||schematic|993433994000|1248729232899||ATTR_X(D5G2;HNPX-19;Y-5;)I1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|0.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@1||0|22|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I175|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X*2.0
IPMOS;1{ic}|PMOS@2||0|15|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I175|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X*2.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||12.5|8||||
NOff-Page|conn@1||-12|0.5||||
NOff-Page|conn@2||-11|15||||
NOff-Page|conn@3||-11|22||||
NGround|gnd@0||0|-6.5||||
Iinv2iCTLp;1{ic}|inv2iCTL@0||15|27.75|||D0G4;|ATTR_X(D5G1.5;NPX1.5;Y2;)I2
NWire_Pin|pin@0||0|8||||
Ngeneric:Invisible-Pin|pin@1||0|33|||||ART_message(D5G3;)S[inv2iCTLp]
NWire_Pin|pin@2||-2.5|22||||
NWire_Pin|pin@3||0|20.5||||
NPower|pwr@0||0|28||||
Awire|net@0|||1800|pin@0||0|8|conn@0|a|10.5|8|SIM_verilog_wire_type(D5G1;)Strireg
Awire|net@1|||2700|PMOS@1|d|0|20|pin@3||0|20.5
Awire|net@2|||900|pwr@0||0|28|PMOS@1|s|0|24
Awire|net@3|||1800|PMOS@1|g|-3|22|pin@2||-2.5|22
Awire|net@4|||900|NMOS@1|s|0|-1.5|gnd@0||0|-4.5
Awire|net@5|||900|pin@0||0|8|NMOS@1|d|0|2.5
Awire|net@6|||900|PMOS@1|d|0|20|PMOS@2|s|0|17
Awire|net@7|||2700|pin@0||0|8|PMOS@2|d|0|13
Awire|net@8|||0|PMOS@2|g|-3|15|conn@2|y|-9|15
Awire|net@9|||0|NMOS@1|g|-3|0.5|conn@1|y|-10|0.5
Awire|net@10|||0|PMOS@1|g|-3|22|conn@3|y|-9|22
Ectl||D5G2;X-4;|conn@2|y|I
EinN||D5G2;|conn@1|a|I
EinP||D4G2;|conn@3|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell inv2iHT;1{ic}
Cinv2iHT;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-1|1|1|1|||ART_color()I10
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@3||-0.25|0|0.5|1|||ART_color()I10|trace()V[-0.25/-0.5,-0.25/0.5,-0.25/0,0.25/0,0.25/0.5,0.25/-0.5]
NPin|pin@0||-1.5|-1|1|1||
NPin|pin@1||-2.5|-1||||
Nschematic:Bus_Pin|pin@2||-2.5|1||||
Nschematic:Bus_Pin|pin@3||-2.5|-1||||
Nschematic:Bus_Pin|pin@4||2.5|0|-2|-2||
NPin|pin@5||-1.5|-2|1|1||
NPin|pin@6||-1.5|2|1|1||
NPin|pin@7||-2.5|1||||
NPin|pin@8||-1.5|1|1|1||
NPin|pin@9||1.5|0|1|1||
AThicker|net@0|||FS0|pin@0||-1.5|-1|pin@1||-2.5|-1|ART_color()I10
AThicker|net@1|||FS3263|pin@9||1.5|0|pin@6||-1.5|2|ART_color()I10
AThicker|net@2|||FS337|pin@9||1.5|0|pin@5||-1.5|-2|ART_color()I10
AThicker|net@3|||FS2700|pin@5||-1.5|-2|pin@6||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@8||-1.5|1|pin@7||-2.5|1|ART_color()I10
Ein[n]||D5G1;|pin@3||I
Ein[p]||D5G1;|pin@2||I
Eout||D5G1;|pin@4||O
X

# Cell inv2iHT;1{sch}
Cinv2iHT;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-14.5;Y-11.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-14.5;Y-10.5;)S1|ATTR_drive0(D5G1;HNPTX-14.5;Y-12.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-14.5;Y-13.5;)Sstrong1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@1||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*2.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-13|-6||||
NOff-Page|conn@1||-13.5|6||||
NOff-Page|conn@2||8|0||||
NGround|gnd@0||0|-12.5||||
Iinv2iHT;1{ic}|inv2iHT@0||16|10.5|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ngeneric:Invisible-Pin|pin@4||-1|24|||||ART_message(D5G6;)S[inv2iHT]
Ngeneric:Invisible-Pin|pin@5||0|19|||||ART_message(D5G2;)S[two-input HI-threshold inverter]
NWire_Pin|pin@6||0|0||||
Ngeneric:Invisible-Pin|pin@7||1|17|||||ART_message(D5G2;)S[P to N width ratio is 4 to 1]
Ngeneric:Invisible-Pin|pin@8||25|-9|||||ART_message(D5G2;)S[X is drive strength,P drive strength is twice N strength]
NPower|pwr@0||0|12.5||||
Awire|net@8|||900|NMOS@1|s|0|-8|gnd@0||0|-10.5
Awire|net@9|||900|pin@6||0|0|NMOS@1|d|0|-4
Awire|net@10|||2700|PMOS@1|s|0|8|pwr@0||0|12.5
Awire|net@11|||2700|pin@6||0|0|PMOS@1|d|0|4
Awire|net@12|||0|conn@2|a|6|0|pin@6||0|0
Awire|net@17|||0|PMOS@1|g|-3|6|conn@1|y|-11.5|6
Awire|net@18|||1800|conn@0|y|-11|-6|NMOS@1|g|-3|-6
Ein[n]||D5G2;|conn@0|a|I
Ein[p]||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell inv2iLT;1{ic}
Cinv2iLT;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-1|1|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@2||-0.25|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,0.25/-0.5]
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
NPin|pin@0||-2.5|-1||||
NPin|pin@1||-1.5|-1|1|1||
Nschematic:Bus_Pin|pin@2||-2.5|-1||||
NPin|pin@3||1.5|0|1|1||
NPin|pin@4||-1.5|1|1|1||
NPin|pin@5||-2.5|1||||
NPin|pin@6||-1.5|2|1|1||
NPin|pin@7||-1.5|-2|1|1||
Nschematic:Bus_Pin|pin@8||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@9||2.5|0|-2|-2||
AThicker|net@0|||FS0|pin@1||-1.5|-1|pin@0||-2.5|-1|ART_color()I10
AThicker|net@1|||FS0|pin@4||-1.5|1|pin@5||-2.5|1|ART_color()I10
AThicker|net@2|||FS2700|pin@7||-1.5|-2|pin@6||-1.5|2|ART_color()I10
AThicker|net@3|||FS337|pin@3||1.5|0|pin@7||-1.5|-2|ART_color()I10
AThicker|net@4|||FS3263|pin@3||1.5|0|pin@6||-1.5|2|ART_color()I10
Ein[n]||D5G1;|pin@2||I
Ein[p]||D5G1;|pin@8||I
Eout||D5G1;|pin@9||O
X

# Cell inv2iLT;1{sch}
Cinv2iLT;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-12;Y-13;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-12;Y-12;)S1|ATTR_drive0(D5G1;HNPTX-12;Y-14;)Sstrong0|ATTR_drive1(D5G1;HNPTX-12;Y-15;)Sstrong1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*2.0
IPMOS;1{ic}|PMOS@1||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-14|-6||||
NOff-Page|conn@1||-14.5|6||||
NOff-Page|conn@2||8|0||||
NGround|gnd@0||0|-12.5||||
Iinv2iLT;1{ic}|inv2iLT@0||16|10.5|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
NWire_Pin|pin@2||-3|6||||
Ngeneric:Invisible-Pin|pin@4||25|-10|||||ART_message(D5G2;)S[X is drive strength,N drive strength is twice P strength]
Ngeneric:Invisible-Pin|pin@5||0.5|17|||||ART_message(D5G2;)S[This is a 2 to 2 width ratio inverter]
NWire_Pin|pin@6||0|0||||
Ngeneric:Invisible-Pin|pin@7||0|19|||||ART_message(D5G2;)S[two-input LO-threshold inverter]
Ngeneric:Invisible-Pin|pin@8||-1|24|||||ART_message(D5G6;)S[inv2iLT]
NPower|pwr@0||0|12.5||||
Awire|net@5|||1800|pin@2||-3|6|PMOS@1|g|-3|6
Awire|net@8|||900|pwr@0||0|12.5|PMOS@1|s|0|8
Awire|net@9|||2700|pin@6||0|0|PMOS@1|d|0|4
Awire|net@10|||2700|gnd@0||0|-10.5|NMOS@1|s|0|-8
Awire|net@11|||900|pin@6||0|0|NMOS@1|d|0|-4
Awire|net@12|||0|conn@2|a|6|0|pin@6||0|0
Awire|net@16|||1800|conn@1|y|-12.5|6|PMOS@1|g|-3|6
Awire|net@17|||1800|conn@0|y|-12|-6|NMOS@1|g|-3|-6
Ein[n]||D5G2;|conn@0|a|I
Ein[p]||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell inv2iV;1{ic}
Cinv2iV;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX1.5;Y-4;)I100|ATTR_XN(D5FLeave alone;G1.5;HNOLPX1.5;Y-2.5;)S1|ATTR_XP(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NThick-Circle|art@2||-1|1|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@3||-0.25|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,0/-0.5,0.25/0.5]
Nschematic:Bus_Pin|pin@0||-2.5|-1|-2|-2||
Nschematic:Bus_Pin|pin@1||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@2||-2.5|1|-2|-2||
NPin|pin@3||-1.5|-2|1|1||
NPin|pin@4||-1.5|2|1|1||
NPin|pin@5||-2.5|-1||||
NPin|pin@6||-1.5|-1|1|1||
NPin|pin@7||1.5|0|1|1||
NPin|pin@8||-1.5|1|1|1||
NPin|pin@9||-2.5|1||||
AThicker|net@0|||FS0|pin@6||-1.5|-1|pin@5||-2.5|-1|ART_color()I10
AThicker|net@1|||FS3263|pin@7||1.5|0|pin@4||-1.5|2|ART_color()I10
AThicker|net@2|||FS337|pin@7||1.5|0|pin@3||-1.5|-2|ART_color()I10
AThicker|net@3|||FS2700|pin@3||-1.5|-2|pin@4||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@8||-1.5|1|pin@9||-2.5|1|ART_color()I10
Ein[n]||D5G1;|pin@0||I
Ein[p]||D5G1;|pin@2||I
Eout||D5G1;|pin@1||O
X

# Cell inv2iV;1{sch}
Cinv2iV;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-16;Y-12;)I100|ATTR_XN(D5FLeave alone;G1;HNOLPX-16;Y-10;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX-16;Y-11;)S1|ATTR_drive0(D5G1;HNPTX-16;Y-13;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16;Y-14;)Sstrong1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@XN
IPMOS;1{ic}|PMOS@1||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@XP
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-12|-6||||
NOff-Page|conn@1||7|0||||
NOff-Page|conn@2||-12|6||||
NGround|gnd@0||0|-12||||
Iinv2iV;1{ic}|inv2iV@0||18.5|9.5|||D0G4;|ATTR_Delay(D5G1;NPX1.5;Y-4;)I100|ATTR_XN(D5FLeave alone;G1.5;NOLPX1.5;Y-2.5;)S1|ATTR_XP(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
NWire_Pin|pin@0||0|0||||
Ngeneric:Invisible-Pin|pin@1||-1.5|21|||||ART_message(D5G6;)S[inv2iV]
Ngeneric:Invisible-Pin|pin@2||-0.5|16.5|||||ART_message(D5G2;)S[two-parameter two-input variable ratio inverter]
Ngeneric:Invisible-Pin|pin@3||25|-12.5|||||ART_message(D5G2;)S[X is drive strength,"P and N drive strengths are XP, XN"]
NPower|pwr@0||0|10.5||||
Awire|net@0|||0|NMOS@1|g|-3|-6|conn@0|y|-10|-6
Awire|net@1|||0|PMOS@1|g|-3|6|conn@2|y|-10|6
Awire|net@2|||0|conn@1|a|5|0|pin@0||0|0
Awire|net@3|||900|pin@0||0|0|NMOS@1|d|0|-4
Awire|net@4|||2700|pin@0||0|0|PMOS@1|d|0|4
Awire|net@5|||900|NMOS@1|s|0|-8|gnd@0||0|-10
Awire|net@6|||2700|PMOS@1|s|0|8|pwr@0||0|10.5
Ein[n]||D5G2;|conn@0|a|I
Ein[p]||D5G2;|conn@2|a|I
Eout||D5G2;|conn@1|y|O
X

# Cell invCLK;1{ic}
CinvCLK;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||-0.25|0|0.5|1|||ART_color()I10|trace()V[0.25/-0.5,-0.25/-0.5,-0.25/0.5]
NOpened-Thicker-Polygon|art@2||-1|0|0.5|1|||ART_color()I10|trace()V[0.25/-0.5,-0.25/-0.5,-0.25/0.5,0.25/0.5]
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@4||0.5|0|0.5|1|||ART_color()I10|trace()V[-0.25/-0.5,-0.25/0.5,-0.25/0,0.25/0.5,-0.25/0,0.25/-0.5]
Nschematic:Bus_Pin|pin@0||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@1||-2.5|0|-2|-2||
NPin|pin@2||-1.5|-2|1|1||
NPin|pin@3||-1.5|2|1|1||
NPin|pin@4||-2.5|0||||
NPin|pin@5||-1.5|0|1|1||
NPin|pin@6||1.5|0|1|1||
AThicker|net@0|||FS3263|pin@6||1.5|0|pin@3||-1.5|2|ART_color()I10
AThicker|net@1|||FS337|pin@6||1.5|0|pin@2||-1.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@2||-1.5|-2|pin@3||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@5||-1.5|0|pin@4||-2.5|0|ART_color()I10
Ein||D5G1;|pin@1||I
Eout||D5G1;|pin@0||O
X

# Cell invCLK;1{sch}
CinvCLK;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-12;Y-5.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-12;Y-4.5;)S1|ATTR_drive0(D5G1;HNPTX-12;Y-6.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-12;Y-7.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX28.5;Y-15;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@1||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*1.5
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||8|0||||
NOff-Page|conn@1||-11|0||||
NGround|gnd@0||0|-12.5||||
IinvCLK;1{ic}|invCLK@0||16|10.5|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ngeneric:Invisible-Pin|pin@0||-0.5|19|||||ART_message(D5G2;)S[intended for driving clock circuits - gives nearly equal rise/fall]
Ngeneric:Invisible-Pin|pin@1||-1|28|||||ART_message(D5G6;)S[invCLK]
Ngeneric:Invisible-Pin|pin@2||0|23|||||ART_message(D5G2;)S[medium HI-threshold fixed-size (non-LE) inverter]
NWire_Pin|pin@3||0|0||||
NWire_Pin|pin@4||-4|6||||
NWire_Pin|pin@5||-4|-6||||
NWire_Pin|pin@6||-4|0||||
Ngeneric:Invisible-Pin|pin@7||1|21|||||ART_message(D5G2;)S[P to N width ratio is 3 to 1]
Ngeneric:Invisible-Pin|pin@8||28|-10.5|||||ART_message(D5G2;)S[X is drive strength,P drive strength is twice N strength]
NPower|pwr@0||0|12.5||||
Awire|net@0|||0|conn@0|a|6|0|pin@3||0|0
Awire|net@1|||2700|pin@6||-4|0|pin@4||-4|6
Awire|net@2|||2700|pin@5||-4|-6|pin@6||-4|0
Awire|net@3|||0|pin@6||-4|0|conn@1|y|-9|0
Awire|net@4|||1800|pin@5||-4|-6|NMOS@1|g|-3|-6
Awire|net@5|||900|pin@3||0|0|NMOS@1|d|0|-4
Awire|net@6|||2700|gnd@0||0|-10.5|NMOS@1|s|0|-8
Awire|net@7|||2700|pin@3||0|0|PMOS@1|d|0|4
Awire|net@8|||1800|pin@4||-4|6|PMOS@1|g|-3|6
Awire|net@9|||900|pwr@0||0|12.5|PMOS@1|s|0|8
Ein||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell invCTLn;1{ic}
CinvCTLn;1{ic}||artwork|993434516000|1204140525662|E|ATTR_Delay(D5G1;HNPX4.5;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_sloDelay(D5G1;HNPX4.5;Y-3;)I175|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
Ngeneric:Invisible-Pin|pin@0||-2.5|0||||
Ngeneric:Invisible-Pin|pin@1||2.5|0||||
NPin|pin@2||-1.5|2|0.5|0.5||
NPin|pin@3||-1.5|-2|0.5|0.5||
NPin|pin@4||1.5|0|0.5|0.5||
Ngeneric:Invisible-Pin|pin@5||0|0|||||ART_message(D5G1.5;)S[CTLn]
Ngeneric:Invisible-Pin|pin@6||0|-2||||
NPin|pin@7||0|-2|1|1||
NPin|pin@8||0|-1|1|1||
NPin|pin@9||-2.5|0|1|1|R|
NPin|pin@10||-1.5|0|1|1|R|
AThicker|net@0|||FS900|pin@2||-1.5|2|pin@3||-1.5|-2|ART_color()I10
AThicker|net@1|||FS3263|pin@4||1.5|0|pin@2||-1.5|2|ART_color()I10
AThicker|net@2|||FS2137|pin@3||-1.5|-2|pin@4||1.5|0|ART_color()I10
AThicker|net@3|||FS900|pin@8||0|-1|pin@7||0|-2|ART_color()I10
AThicker|net@4|||FS1800|pin@9||-2.5|0|pin@10||-1.5|0|ART_color()I10
Ectl||D5G2;|pin@6||I
Ein||D5G2;|pin@0||I
Eout||D5G2;|pin@1||O
X

# Cell invCTLn;1{sch}
CinvCTLn;1{sch}||schematic|993433994000|1248729331835||ATTR_Delay(D5G2;HNPX-21.5;Y1;)I100|ATTR_X(D5FLeave alone;G2;HNOLPX-21.5;Y4;)S1|ATTR_sloDelay(D5G2;HNPX-22;Y-1.5;)I175|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|0.5|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@sloDelay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*2.0
INMOS;1{ic}|NMOS@2||0|9.5|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@sloDelay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*2.0
IPMOS;1{ic}|PMOS@1||0|22|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||12.5|16||||
NOff-Page|conn@1||-12|16||||
NOff-Page|conn@2||-13|9.5||||
NGround|gnd@0||0|-6.5||||
IinvCTLn;1{ic}|invCTLn@0||15|27.75|||D0G4;|ATTR_Delay(D5G1;NPX4.5;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S2|ATTR_sloDelay(D5G1;NPX4.5;Y-3;)I175
NWire_Pin|pin@0||-5|16||||
NWire_Pin|pin@1||0|16||||
Ngeneric:Invisible-Pin|pin@2||0|33|||||ART_message(D5G3;)S[invCTLn]
NWire_Pin|pin@3||-5|22||||
NWire_Pin|pin@4||-2.5|22||||
NWire_Pin|pin@5||0|20.5||||
NWire_Pin|pin@6||-5|0.5||||
NPower|pwr@0||0|28||||
Awire|net@0|||0|pin@0||-5|16|conn@1|y|-10|16
Awire|net@1|||1800|pin@1||0|16|conn@0|a|10.5|16|SIM_verilog_wire_type(D5G1;)Strireg
Awire|net@2|||900|pin@3||-5|22|pin@0||-5|16
Awire|net@3|||1800|pin@3||-5|22|pin@4||-2.5|22
Awire|net@4|||2700|PMOS@1|d|0|20|pin@5||0|20.5
Awire|net@5|||900|pwr@0||0|28|PMOS@1|s|0|24
Awire|net@6|||1800|PMOS@1|g|-3|22|pin@4||-2.5|22
Awire|net@7|||1800|pin@6||-5|0.5|NMOS@1|g|-3|0.5
Awire|net@8|||900|NMOS@1|s|0|-1.5|gnd@0||0|-4.5
Awire|net@9|||2700|pin@6||-5|0.5|pin@0||-5|16
Awire|net@10|||900|pin@1||0|16|NMOS@2|d|0|11.5
Awire|net@11|||2700|NMOS@1|d|0|2.5|NMOS@2|s|0|7.5
Awire|net@12|||2700|pin@1||0|16|PMOS@1|d|0|20
Awire|net@13|||0|NMOS@2|g|-3|9.5|conn@2|y|-11|9.5
Ectl||D5G2;X-4;|conn@2|y|I
Ein||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell invCTLp;1{ic}
CinvCTLp;1{ic}||artwork|993434516000|1204140525662|E|ATTR_Delay(D5G1;HNPX4.25;Y-1.75;)I100|ATTR_X(D5G1.5;HNPX1.5;Y2;)I1|ATTR_sloDelay(D5G1;HNPX4.75;Y-3.25;)I175|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||0|-1.5|1|1|||ART_color()I10
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
NPin|pin@0||-1.5|0|1|1|R|
NPin|pin@1||-2.5|0|1|1|R|
Ngeneric:Invisible-Pin|pin@2||0|-2||||
Ngeneric:Invisible-Pin|pin@3||0|0|||||ART_message(D5G1.5;)S[CTLp]
NPin|pin@4||1.5|0|0.5|0.5||
NPin|pin@5||-1.5|-2|0.5|0.5||
NPin|pin@6||-1.5|2|0.5|0.5||
Ngeneric:Invisible-Pin|pin@7||2.5|0||||
Ngeneric:Invisible-Pin|pin@8||-2.5|0||||
AThicker|net@0|||FS1800|pin@1||-2.5|0|pin@0||-1.5|0|ART_color()I10
AThicker|net@1|||FS2137|pin@5||-1.5|-2|pin@4||1.5|0|ART_color()I10
AThicker|net@2|||FS3263|pin@4||1.5|0|pin@6||-1.5|2|ART_color()I10
AThicker|net@3|||FS900|pin@6||-1.5|2|pin@5||-1.5|-2|ART_color()I10
Ectl||D5G2;|pin@2||I
Ein||D5G2;|pin@8||I
Eout||D5G2;|pin@7||O
X

# Cell invCTLp;1{sch}
CinvCTLp;1{sch}||schematic|993433994000|1248729232899||ATTR_Delay(D5G2;HNPX-21;Y-1;)I100|ATTR_X(D5G2;HNPX-21;Y1.5;)I1|ATTR_sloDelay(D5G2;HNPX-21;Y-3.5;)I175|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|0.5|||D0G4;|ATTR_Delay(D5G1;NOLPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@1||0|22|||D0G4;|ATTR_Delay(D5G1;NOLPX3.5;Y-2;)S@sloDelay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X*2.0
IPMOS;1{ic}|PMOS@2||0|15|||D0G4;|ATTR_Delay(D5G1;NOLPX3.5;Y-2;)S@sloDelay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X*2.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-13|15||||
NOff-Page|conn@1||-12|8||||
NOff-Page|conn@2||12.5|8||||
NGround|gnd@0||0|-6.5||||
IinvCTLp;1{ic}|invCTLp@0||15|27.75|||D0G4;|ATTR_Delay(D5G1;NPX4.25;Y-1.75;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)I2|ATTR_sloDelay(D5G1;NPX4.75;Y-3.25;)I175
NWire_Pin|pin@0||-5|0.5||||
NWire_Pin|pin@1||0|20.5||||
NWire_Pin|pin@2||-2.5|22||||
NWire_Pin|pin@3||-5|22||||
Ngeneric:Invisible-Pin|pin@4||0|33|||||ART_message(D5G3;)S[invCTLp]
NWire_Pin|pin@5||0|8||||
NWire_Pin|pin@6||-5|8||||
NPower|pwr@0||0|28||||
Awire|net@0|||0|PMOS@2|g|-3|15|conn@0|y|-11|15
Awire|net@1|||2700|pin@5||0|8|PMOS@2|d|0|13
Awire|net@2|||900|PMOS@1|d|0|20|PMOS@2|s|0|17
Awire|net@3|||900|pin@5||0|8|NMOS@1|d|0|2.5
Awire|net@4|||2700|pin@0||-5|0.5|pin@6||-5|8
Awire|net@5|||900|NMOS@1|s|0|-1.5|gnd@0||0|-4.5
Awire|net@6|||1800|pin@0||-5|0.5|NMOS@1|g|-3|0.5
Awire|net@7|||1800|PMOS@1|g|-3|22|pin@2||-2.5|22
Awire|net@8|||900|pwr@0||0|28|PMOS@1|s|0|24
Awire|net@9|||2700|PMOS@1|d|0|20|pin@1||0|20.5
Awire|net@10|||1800|pin@3||-5|22|pin@2||-2.5|22
Awire|net@11|||900|pin@3||-5|22|pin@6||-5|8
Awire|net@12|||1800|pin@5||0|8|conn@2|a|10.5|8|SIM_verilog_wire_type(D5G1;)Strireg
Awire|net@13|||0|pin@6||-5|8|conn@1|y|-10|8
Ectl||D5G2;X-4;|conn@0|y|I
Ein||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell invHT;1{ic}
CinvHT;1{ic}||artwork|1021415734000|1228431906734|E|ATTR_Delay(D5G1;HNPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
NPin|pin@0||1.5|0|1|1||
NPin|pin@1||-1.5|0|1|1||
NPin|pin@2||-2.5|0||||
NPin|pin@3||-1.5|2|1|1||
NPin|pin@4||-1.5|-2|1|1||
Nschematic:Bus_Pin|pin@5||-2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@6||2.5|0|-2|-2||
Ngeneric:Invisible-Pin|pin@7||-0.5|0|||||ART_message(C10;D5G1.5;)SH
AThicker|net@0|||FS0|pin@1||-1.5|0|pin@2||-2.5|0|ART_color()I10
AThicker|net@1|||FS2700|pin@4||-1.5|-2|pin@3||-1.5|2|ART_color()I10
AThicker|net@2|||FS337|pin@0||1.5|0|pin@4||-1.5|-2|ART_color()I10
AThicker|net@3|||FS3263|pin@0||1.5|0|pin@3||-1.5|2|ART_color()I10
Ein||D5G1;|pin@5||I
Eout||D5G1;|pin@6||O
X

# Cell invHT;1{sch}
CinvHT;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-12;Y-5.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-12;Y-4.5;)S1|ATTR_drive0(D5G1;HNPTX-12;Y-6.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-12;Y-7.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX25.5;Y-15;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@1||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*2.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-11|0||||
NOff-Page|conn@1||8|0||||
NGround|gnd@0||0|-12.5||||
IinvHT;1{ic}|invHT@0||16|10.5|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
IinvHTI;2{ic}|invHT@1||26|10.5|||D5G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ngeneric:Invisible-Pin|pin@0||26.5|-10|||||ART_message(D5G2;)S[X is drive strength,P drive strength is twice N strength]
Ngeneric:Invisible-Pin|pin@1||1|17|||||ART_message(D5G2;)S[P to N width ratio is 4 to 1]
NWire_Pin|pin@2||-4|0||||
NWire_Pin|pin@3||-4|-6||||
NWire_Pin|pin@4||-4|6||||
NWire_Pin|pin@5||0|0||||
Ngeneric:Invisible-Pin|pin@6||0|19|||||ART_message(D5G2;)S[HI-threshold fixed-size (non-LE) inverter]
Ngeneric:Invisible-Pin|pin@7||-1|24|||||ART_message(D5G6;)S[invHT]
NPower|pwr@0||0|12.5||||
Awire|net@0|||900|pwr@0||0|12.5|PMOS@1|s|0|8
Awire|net@1|||1800|pin@4||-4|6|PMOS@1|g|-3|6
Awire|net@2|||2700|pin@5||0|0|PMOS@1|d|0|4
Awire|net@3|||2700|gnd@0||0|-10.5|NMOS@1|s|0|-8
Awire|net@4|||900|pin@5||0|0|NMOS@1|d|0|-4
Awire|net@5|||1800|pin@3||-4|-6|NMOS@1|g|-3|-6
Awire|net@6|||0|pin@2||-4|0|conn@0|y|-9|0
Awire|net@7|||2700|pin@3||-4|-6|pin@2||-4|0
Awire|net@8|||2700|pin@2||-4|0|pin@4||-4|6
Awire|net@9|||0|conn@1|a|6|0|pin@5||0|0
Ein||D5G2;|conn@0|a|I
Eout||D5G2;|conn@1|y|O
X

# Cell invHTI;2{ic}
CinvHTI;2{ic}|invHT|artwork|1021415734000|1228431964199|E|ATTR_Delay(D5G1;HNPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@2||-2|0|1|1|||ART_color()I10
NPin|pin@0||1.5|0|1|1||
NPin|pin@1||2.5|0|1|1||
NPin|pin@2||1.5|0||||
NPin|pin@3||-1.5|2|1|1||
NPin|pin@4||-1.5|-2|1|1||
Nschematic:Bus_Pin|pin@5||-2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@6||2.5|0|-2|-2||
Ngeneric:Invisible-Pin|pin@7||-0.5|0|||||ART_message(C10;D5G1.5;)SH
AThicker|net@0|||FS0|pin@1||2.5|0|pin@2||1.5|0|ART_color()I10
AThicker|net@1|||FS2700|pin@4||-1.5|-2|pin@3||-1.5|2|ART_color()I10
AThicker|net@2|||FS337|pin@0||1.5|0|pin@4||-1.5|-2|ART_color()I10
AThicker|net@3|||FS3263|pin@0||1.5|0|pin@3||-1.5|2|ART_color()I10
Ein||D5G1;|pin@5||I
Eout||D5G1;|pin@6||O
X

# Cell invI;2{ic}
CinvI;2{ic}|inv|artwork|1021415734000|1228431072751|E|ATTR_Delay(D5G1;HNPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-2|0|1|1|||ART_color()I10
NPin|pin@0||1.5|0|1|1||
Nschematic:Bus_Pin|pin@1||-2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@4||2.5|0|-2|-2||
NPin|pin@5||-1.5|2|1|1||
NPin|pin@6||-1.5|-2|1|1||
NPin|pin@7||2.5|0|1|1||
NPin|pin@8||1.5|0||||
AThicker|net@0|||FS3263|pin@0||1.5|0|pin@5||-1.5|2|ART_color()I10
AThicker|net@1|||FS337|pin@0||1.5|0|pin@6||-1.5|-2|ART_color()I10
AThicker|net@3|||FS2700|pin@6||-1.5|-2|pin@5||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@7||2.5|0|pin@8||1.5|0|ART_color()I10
Ein||D5G1;|pin@1||I
Eout||D5G1;|pin@4||O
X

# Cell invK;1{ic}
CinvK;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNOJPX2;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sweak0|ATTR_drive1(D5G1;HPT)Sweak1|prototype_center()I[2000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-2|0|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@2||-0.5|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,-0.25/0,0.25/0.5,-0.25/0,0.25/-0.5]
Nschematic:Bus_Pin|pin@0||2.5|0|-2|-2||
NPin|pin@1||1.5|0|1|1||
NPin|pin@2||2.5|0||||
Nschematic:Bus_Pin|pin@3||-2.5|0|-2|-2||
NPin|pin@4||-1.5|-2|1|1||
NPin|pin@5||-1.5|2|1|1||
NPin|pin@6||1.5|0|1|1||
AThicker|net@0|||FS0|pin@2||2.5|0|pin@1||1.5|0|ART_color()I10
AThicker|net@1|||FS3263|pin@6||1.5|0|pin@5||-1.5|2|ART_color()I10
AThicker|net@2|||FS337|pin@6||1.5|0|pin@4||-1.5|-2|ART_color()I10
AThicker|net@3|||FS2700|pin@4||-1.5|-2|pin@5||-1.5|2|ART_color()I10
Ein||D5G1;|pin@3||I
Eout||D5G1;|pin@0||O
X

# Cell invK;1{sch}
CinvK;1{sch}||schematic|1021415734000|1248729331835||ATTR_Delay(D5G1;HNOJPX-14;Y-6.5;)S@Delay|ATTR_X(D5FLeave alone;G1;HNOLPX-14;Y-5.5;)S1|ATTR_drive0(D5G1;HNPTX-14;Y-7.5;)Sweak0|ATTR_drive1(D5G1;HNPTX-14;Y-8.5;)Sweak1|ATTR_verilog_template(D5G1;NTX30;Y-15;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@0||2|-5|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@0||2|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||8|0||||
NOff-Page|conn@1||-11|0||||
NGround|gnd@0||2|-12||||
IinvK;1{ic}|invK@0||18.5|12|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sweak0|ATTR_drive1(P)Sweak1|ATTR_LEKEEPER(T)I1|ATTR_LEPARALLGRP()I-1|ATTR_su()I-1
Ngeneric:Invisible-Pin|pin@0||-1|18|||||ART_message(D5G2;)S[LO threshold fixed-size keeper inverter]
Ngeneric:Invisible-Pin|pin@1||-1|23.5|||||ART_message(D5G6;)S[invK]
Ngeneric:Invisible-Pin|pin@2||-2|16|||||ART_message(D5G2;)S[P to N width ratio is 2 to 1]
Ngeneric:Invisible-Pin|pin@3||28.5|-10.5|||||ART_message(D5G2;)S[X is drive strength,P and N drive strengths are equal]
NWire_Pin|pin@4||-2|-5|0.5|0.5||
NWire_Pin|pin@5||-2|6|0.5|0.5||
NWire_Pin|pin@6||-2|0||||
NWire_Pin|pin@7||2|0||||
NPower|pwr@0||2|11.5||||
Awire|net@0|||2700|PMOS@0|s|2|8|pwr@0||2|11.5
Awire|net@1|||0|PMOS@0|g|-1|6|pin@5||-2|6
Awire|net@2|||2700|pin@7||2|0|PMOS@0|d|2|4
Awire|net@3|||2700|gnd@0||2|-10|NMOS@0|s|2|-7
Awire|net@4|||2700|NMOS@0|d|2|-3|pin@7||2|0
Awire|net@5|||0|NMOS@0|g|-1|-5|pin@4||-2|-5
Awire|net@6|||2700|pin@4||-2|-5|pin@6||-2|0
Awire|net@7|||2700|pin@6||-2|0|pin@5||-2|6
Awire|net@8|||0|conn@0|a|6|0|pin@7||2|0
Awire|net@9|||1800|conn@1|y|-9|0|pin@6||-2|0
Ein||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell invKV;1{ic}
CinvKV;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2;Y-4;)I100|ATTR_XN(D5FLeave alone;G1.5;HNOLPX1.5;Y-2.25;)S1|ATTR_XP(D5FLeave alone;G1.5;HNOLPX1.5;Y1.75;)S1|ATTR_drive0(D5G1;HPT)Sweak0|ATTR_drive1(D5G1;HPT)Sweak1|prototype_center()I[2000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||-0.5|0.5|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,-0.25/0,0.25/0.5,-0.25/0,0.25/-0.5]
NThick-Circle|art@2||-2|0|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@3||-0.5|-0.75|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,0/-0.5,0.25/0.5]
NPin|pin@0||1.5|0|1|1||
NPin|pin@1||-1.5|2|1|1||
NPin|pin@2||-1.5|-2|1|1||
NPin|pin@3||2.5|0||||
NPin|pin@4||1.5|0|1|1||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@6||-2.5|0|-2|-2||
AThicker|net@0|||FS2700|pin@2||-1.5|-2|pin@1||-1.5|2|ART_color()I10
AThicker|net@1|||FS337|pin@0||1.5|0|pin@2||-1.5|-2|ART_color()I10
AThicker|net@2|||FS3263|pin@0||1.5|0|pin@1||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@3||2.5|0|pin@4||1.5|0|ART_color()I10
Ein||D5G1;|pin@6||I
Eout||D5G1;|pin@5||O
X

# Cell invKV;1{sch}
CinvKV;1{sch}||schematic|1021415734000|1248729331835||ATTR_Delay(D5G1;HNPX-11.5;Y-5.5;)I100|ATTR_XN(D5FLeave alone;G1;HNOLPX-11.5;Y-3.5;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX-11.5;Y-4.5;)S1|ATTR_drive0(D5G1;HNPTX-11;Y-6.5;)Sweak0|ATTR_drive1(D5G1;HNPTX-11;Y-7.5;)Sweak1|ATTR_verilog_template(D5G1;NTX24.5;Y-13;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@0||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@XN
IPMOS;1{ic}|PMOS@0||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@XP
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-11|0||||
NOff-Page|conn@1||8|0||||
NGround|gnd@0||0|-11||||
IinvKV;1{ic}|invKV@0||21.5|9|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-4;)I100|ATTR_XN(D5FLeave alone;G1.5;NOLPX1.5;Y-2.25;)S1|ATTR_XP(D5FLeave alone;G1.5;NOLPX1.5;Y1.75;)S1|ATTR_drive0(P)Sweak0|ATTR_drive1(P)Sweak1
Ngeneric:Invisible-Pin|pin@0||26|-7.5|||||ART_message(D5G2;)S[X is drive strength,"P and N drive strengths are XP, XN"]
NWire_Pin|pin@1||-4|-6||||
NWire_Pin|pin@2||-4|6||||
NWire_Pin|pin@3||0|0||||
NWire_Pin|pin@4||-4|0||||
Ngeneric:Invisible-Pin|pin@5||-0.5|17|||||ART_message(D5G6;)S[invKV]
Ngeneric:Invisible-Pin|pin@6||-1|13.5|||||ART_message(D5G2;)S[Two parameter variable ratio keeper]
NPower|pwr@0||0|10.5||||
Awire|net@0|||1800|pin@1||-4|-6|NMOS@0|g|-3|-6
Awire|net@1|||2700|PMOS@0|s|0|8|pwr@0||0|10.5
Awire|net@2|||1800|pin@2||-4|6|PMOS@0|g|-3|6
Awire|net@3|||2700|pin@3||0|0|PMOS@0|d|0|4
Awire|net@4|||900|NMOS@0|s|0|-8|gnd@0||0|-9
Awire|net@5|||2700|NMOS@0|d|0|-4|pin@3||0|0
Awire|net@6|||1800|conn@0|y|-9|0|pin@4||-4|0
Awire|net@7|||0|conn@1|a|6|0|pin@3||0|0
Awire|net@8|||2700|pin@1||-4|-6|pin@4||-4|0
Awire|net@9|||2700|pin@4||-4|0|pin@2||-4|6
Ein||D5G2;|conn@0|a|I
Eout||D5G2;|conn@1|y|O
X

# Cell invLT;1{ic}
CinvLT;1{ic}||artwork|1021415734000|1228431575062|E|ATTR_Delay(D5G1;HNPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@1||-2.5|0|-2|-2||
NPin|pin@2||-1.5|-2|1|1||
NPin|pin@3||-1.5|2|1|1||
NPin|pin@4||-2.5|0||||
NPin|pin@5||-1.5|0|1|1||
NPin|pin@6||1.5|0|1|1||
Ngeneric:Invisible-Pin|pin@7||-0.5|0|||||ART_message(C10;D5G1.5;)SL
AThicker|net@0|||FS3263|pin@6||1.5|0|pin@3||-1.5|2|ART_color()I10
AThicker|net@1|||FS337|pin@6||1.5|0|pin@2||-1.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@2||-1.5|-2|pin@3||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@5||-1.5|0|pin@4||-2.5|0|ART_color()I10
Ein||D5G1;|pin@1||I
Eout||D5G1;|pin@0||O
X

# Cell invLT;1{sch}
CinvLT;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-12;Y-5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-12;Y-4;)S1|ATTR_drive0(D5G1;HNPTX-12;Y-6;)Sstrong0|ATTR_drive1(D5G1;HNPTX-12;Y-7;)Sstrong1|ATTR_verilog_template(D5G1;NTX23;Y-13;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*2.0
IPMOS;1{ic}|PMOS@1||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||11|0||||
NOff-Page|conn@1||-11.5|0||||
NGround|gnd@0||0|-12.5||||
IinvLT;1{ic}|invLT@0||16|10.5|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
IinvLTI;2{ic}|invLTI@0||27|10.5|||D5G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
NWire_Pin|pin@0||-4|0||||
NWire_Pin|pin@1||0|0||||
Ngeneric:Invisible-Pin|pin@2||-1|24|||||ART_message(D5G6;)S[invLT]
Ngeneric:Invisible-Pin|pin@3||0|19|||||ART_message(D5G2;)S[LO-threshold fixed-size (non-LE) inverter]
NWire_Pin|pin@4||-4|6||||
NWire_Pin|pin@5||-4|-6||||
Ngeneric:Invisible-Pin|pin@6||0.5|17|||||ART_message(D5G2;)S[This is a 2 to 2 width ratio inverter]
Ngeneric:Invisible-Pin|pin@7||24|-9|||||ART_message(D5G2;)S[X is drive strength,N drive strength is twice P strength]
NPower|pwr@0||0|12.5||||
Awire|net@0|||0|pin@0||-4|0|conn@1|y|-9.5|0
Awire|net@1|||900|pin@4||-4|6|pin@0||-4|0
Awire|net@2|||900|pin@0||-4|0|pin@5||-4|-6
Awire|net@3|||1800|pin@1||0|0|conn@0|a|9|0
Awire|net@4|||2700|NMOS@1|d|0|-4|pin@1||0|0
Awire|net@5|||2700|pin@1||0|0|PMOS@1|d|0|4
Awire|net@6|||900|pwr@0||0|12.5|PMOS@1|s|0|8
Awire|net@7|||1800|pin@4||-4|6|PMOS@1|g|-3|6
Awire|net@8|||2700|gnd@0||0|-10.5|NMOS@1|s|0|-8
Awire|net@9|||1800|pin@5||-4|-6|NMOS@1|g|-3|-6
Ein||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell invLTI;2{ic}
CinvLTI;2{ic}|invLT|artwork|1021415734000|1228431729256|E|ATTR_Delay(D5G1;HNPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-2|0|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@1||-2.5|0|-2|-2||
NPin|pin@2||-1.5|-2|1|1||
NPin|pin@3||-1.5|2|1|1||
NPin|pin@4||1.5|0||||
NPin|pin@5||2.5|0|1|1||
NPin|pin@6||1.5|0|1|1||
Ngeneric:Invisible-Pin|pin@7||-0.5|0|||||ART_message(C10;D5G1.5;)SL
AThicker|net@0|||FS3263|pin@6||1.5|0|pin@3||-1.5|2|ART_color()I10
AThicker|net@1|||FS337|pin@6||1.5|0|pin@2||-1.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@2||-1.5|-2|pin@3||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@5||2.5|0|pin@4||1.5|0|ART_color()I10
Ein||D5G1;|pin@1||I
Eout||D5G1;|pin@0||O
X

# Cell invV;1{ic}
CinvV;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX1.5;Y-4;)I100|ATTR_XN(D5FLeave alone;G1.5;HNOLPX1.75;Y-2.5;)S1|ATTR_XP(D5FLeave alone;G1.5;HNOLPX1.75;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@2||-0.5|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,0/-0.5,0.25/0.5]
Nschematic:Bus_Pin|pin@0||-2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@1||2.5|0|-2|-2||
NPin|pin@2||-1.5|-2|1|1||
NPin|pin@3||-1.5|2|1|1||
NPin|pin@4||-2.5|0||||
NPin|pin@5||-1.5|0|1|1||
NPin|pin@6||1.5|0|1|1||
AThicker|net@0|||FS0|pin@5||-1.5|0|pin@4||-2.5|0|ART_color()I10
AThicker|net@1|||FS3263|pin@6||1.5|0|pin@3||-1.5|2|ART_color()I10
AThicker|net@2|||FS337|pin@6||1.5|0|pin@2||-1.5|-2|ART_color()I10
AThicker|net@3|||FS2700|pin@2||-1.5|-2|pin@3||-1.5|2|ART_color()I10
Ein||D5G1;|pin@0||I
Eout||D5G1;|pin@1||O
X

# Cell invV;1{sch}
CinvV;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-12;Y-7;)I100|ATTR_XN(D5FLeave alone;G1;HNOLPX-12;Y-5;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX-12;Y-6;)S1|ATTR_drive0(D5G1;HNPTX-12;Y-8;)Sstrong0|ATTR_drive1(D5G1;HNPTX-12;Y-9;)Sstrong1|ATTR_verilog_template(D5G1;NTX19.5;Y-16;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@XN
IPMOS;1{ic}|PMOS@1||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@XP
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||7|0||||
NOff-Page|conn@1||-12|0||||
NGround|gnd@0||0|-12||||
IinvV;1{ic}|invV@0||24|10.5|||D0G4;|ATTR_Delay(D5G1;NPX1.5;Y-4;)I100|ATTR_XN(D5FLeave alone;G1.5;NOLPX1.75;Y-2.5;)S1|ATTR_XP(D5FLeave alone;G1.5;NOLPX1.75;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ngeneric:Invisible-Pin|pin@0||0.5|17.5|||||ART_message(D5G2;)S[two-parameter variable ratio inverter]
Ngeneric:Invisible-Pin|pin@1||-0.5|21.5|||||ART_message(D5G6;)S[invV]
NWire_Pin|pin@2||0|0||||
NWire_Pin|pin@3||-5|0||||
NWire_Pin|pin@4||-5|-6||||
NWire_Pin|pin@5||-5|6||||
Ngeneric:Invisible-Pin|pin@6||28|-11.5|||||ART_message(D5G2;)S[X is drive strength,"P and N drive strengths are XP, XN"]
NPower|pwr@0||0|10.5||||
Awire|net@0|||900|NMOS@1|s|0|-8|gnd@0||0|-10
Awire|net@1|||900|pin@2||0|0|NMOS@1|d|0|-4
Awire|net@2|||1800|pin@4||-5|-6|NMOS@1|g|-3|-6
Awire|net@3|||2700|PMOS@1|s|0|8|pwr@0||0|10.5
Awire|net@4|||1800|pin@5||-5|6|PMOS@1|g|-3|6
Awire|net@5|||2700|pin@2||0|0|PMOS@1|d|0|4
Awire|net@6|||1800|pin@2||0|0|conn@0|a|5|0
Awire|net@7|||0|pin@3||-5|0|conn@1|y|-10|0
Awire|net@8|||2700|pin@4||-5|-6|pin@3||-5|0
Awire|net@9|||2700|pin@3||-5|0|pin@5||-5|6
Ein||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell invVn;1{ic}
CinvVn;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2;Y-3;)I100|ATTR_NPdrvR(D5FLeave alone;G1;HNOLPX2;Y-2;)S1|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@2||-0.5|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,0/-0.5,0.25/0.5]
NOpened-Thicker-Polygon|art@3||0.25|-0.12|0.5|0.75|||ART_color()I10|trace()V[-0.25/-0.375,-0.25/0.375,0.25/-0.375,0.25/0.375]
Nschematic:Bus_Pin|pin@0||-2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@1||2.5|0|-2|-2||
NPin|pin@2||-1.5|-2|1|1||
NPin|pin@3||-1.5|2|1|1||
NPin|pin@4||-2.5|0||||
NPin|pin@5||-1.5|0|1|1||
NPin|pin@6||1.5|0|1|1||
AThicker|net@0|||FS0|pin@5||-1.5|0|pin@4||-2.5|0|ART_color()I10
AThicker|net@1|||FS3263|pin@6||1.5|0|pin@3||-1.5|2|ART_color()I10
AThicker|net@2|||FS337|pin@6||1.5|0|pin@2||-1.5|-2|ART_color()I10
AThicker|net@3|||FS2700|pin@2||-1.5|-2|pin@3||-1.5|2|ART_color()I10
Ein||D5G1;|pin@0||I
Eout||D5G1;|pin@1||O
X

# Cell invVn;1{sch}
CinvVn;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-15.5;Y-7.5;)I100|ATTR_NPdrvR(D5FLeave alone;G1;HNOLPX-15.5;Y-6.5;)S1|ATTR_X(D5FLeave alone;G1;HNOLPX-15.5;Y-5.5;)S1|ATTR_drive0(D5G1;HNPTX-15.5;Y-8.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-15.5;Y-9.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX18.5;Y-19.5;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*@NPdrvR
IPMOS;1{ic}|PMOS@1||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||7|0||||
NOff-Page|conn@1||-12|0||||
NGround|gnd@0||0|-12||||
IinvVn;1{ic}|invVn@0||26.75|6|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-3;)I100|ATTR_NPdrvR(D5FLeave alone;G1;NOLPX2;Y-2;)S1|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ngeneric:Invisible-Pin|pin@0||0.5|17.5|||||ART_message(D5G2;)S[variable ratio inverter]
Ngeneric:Invisible-Pin|pin@1||-0.5|22|||||ART_message(D5G6;)S[invVn]
NWire_Pin|pin@2||0|0||||
NWire_Pin|pin@3||-5|0||||
NWire_Pin|pin@4||-5|-6||||
NWire_Pin|pin@5||-5|6||||
Ngeneric:Invisible-Pin|pin@6||19.5|-15.5|||||ART_message(D5G2;)S[X is drive strength,"P drive strength is X, N drive strength is X*NPdrvR"]
Ngeneric:Invisible-Pin|pin@7||0.5|15.5|||||ART_message(D5G2;)S["PMOS sized normally, NMOS sized by ratio value"]
NPower|pwr@0||0|11||||
Awire|net@0|||900|NMOS@1|s|0|-8|gnd@0||0|-10
Awire|net@1|||2700|NMOS@1|d|0|-4|pin@2||0|0
Awire|net@2|||1800|pin@4||-5|-6|NMOS@1|g|-3|-6
Awire|net@3|||2700|PMOS@1|s|0|8|pwr@0||0|11
Awire|net@4|||1800|pin@5||-5|6|PMOS@1|g|-3|6
Awire|net@5|||2700|pin@2||0|0|PMOS@1|d|0|4
Awire|net@6|||1800|pin@2||0|0|conn@0|a|5|0
Awire|net@7|||0|pin@3||-5|0|conn@1|y|-10|0
Awire|net@8|||2700|pin@4||-5|-6|pin@3||-5|0
Awire|net@9|||2700|pin@3||-5|0|pin@5||-5|6
Ein||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell invVp;1{ic}
CinvVp;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2;Y-3;)I100|ATTR_PNdrvR(D5G1;HNOLPX2;Y-2;)S1|ATTR_X(D5FLeave alone;G1.5;HNOLPX1.5;Y2;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||-0.5|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,0/-0.5,0.25/0.5]
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@3||0.25|-0.25|0.5|1|||ART_color()I10|trace()V[-0.25/-0.5,-0.25/0.5,0.25/0.5,0.25/0,-0.25/0]
NPin|pin@0||1.5|0|1|1||
NPin|pin@1||-1.5|0|1|1||
NPin|pin@2||-2.5|0||||
NPin|pin@3||-1.5|2|1|1||
NPin|pin@4||-1.5|-2|1|1||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@6||-2.5|0|-2|-2||
AThicker|net@0|||FS2700|pin@4||-1.5|-2|pin@3||-1.5|2|ART_color()I10
AThicker|net@1|||FS337|pin@0||1.5|0|pin@4||-1.5|-2|ART_color()I10
AThicker|net@2|||FS3263|pin@0||1.5|0|pin@3||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@1||-1.5|0|pin@2||-2.5|0|ART_color()I10
Ein||D5G1;|pin@6||I
Eout||D5G1;|pin@5||O
X

# Cell invVp;1{sch}
CinvVp;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-12;Y-7;)I100|ATTR_PNdrvR(D5FLeave alone;G1;HNOLPX-12;Y-6;)S1|ATTR_X(D5FLeave alone;G1;HNOLPX-12.5;Y-5;)S1|ATTR_drive0(D5G1;HNPTX-12;Y-8;)Sstrong0|ATTR_drive1(D5G1;HNPTX-12;Y-9;)Sstrong1|ATTR_verilog_template(D5G1;NTX22;Y-15.5;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0.5|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@1||0.5|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3;)S@X*@PNdrvR
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-12|0||||
NOff-Page|conn@1||7|0||||
NGround|gnd@0||0.5|-12||||
IinvVp;1{ic}|invVp@0||26.5|6.5|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-3;)I100|ATTR_PNdrvR(D5G1;NPX2;Y-2;)I1|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
NWire_Pin|pin@0||-4.5|6||||
NWire_Pin|pin@1||-4.5|-6||||
NWire_Pin|pin@2||-4.5|0||||
NWire_Pin|pin@3||0.5|0||||
Ngeneric:Invisible-Pin|pin@4||0.5|14.5|||||ART_message(D5G2;)S["NMOS sized normally, PMOS sized by ratio value"]
Ngeneric:Invisible-Pin|pin@5||25.5|-11.5|||||ART_message(D5G2;)S[X is drive strength,"N drive strength is X, P drive strength is X*PNdrvR"]
Ngeneric:Invisible-Pin|pin@6||-0.5|21|||||ART_message(D5G6;)S[invVp]
Ngeneric:Invisible-Pin|pin@7||0.5|16.5|||||ART_message(D5G2;)S[variable ratio inverter]
NPower|pwr@0||0.5|11||||
Awire|net@0|||1800|conn@0|y|-10|0|pin@2||-4.5|0
Awire|net@1|||0|conn@1|a|5|0|pin@3||0.5|0
Awire|net@2|||2700|pin@2||-4.5|0|pin@0||-4.5|6
Awire|net@3|||2700|pin@1||-4.5|-6|pin@2||-4.5|0
Awire|net@4|||1800|pin@0||-4.5|6|PMOS@1|g|-2.5|6
Awire|net@5|||2700|pin@3||0.5|0|PMOS@1|d|0.5|4
Awire|net@6|||2700|PMOS@1|s|0.5|8|pwr@0||0.5|11
Awire|net@7|||2700|NMOS@1|d|0.5|-4|pin@3||0.5|0
Awire|net@8|||1800|pin@1||-4.5|-6|NMOS@1|g|-2.5|-6
Awire|net@9|||900|NMOS@1|s|0.5|-8|gnd@0||0.5|-10
Ein||D5G2;|conn@0|a|I
Eout||D5G2;|conn@1|y|O
X

# Cell mullerC;1{ic}
CmullerC;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||-0.12|0|0.75|1.25|||ART_color()I10|trace()V[0.375/-0.625,-0.375/-0.625,-0.375/0.625,0.375/0.625]
NThick-Circle|art@2||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
NPin|pin@0||-0.25|-2|1|1||
NPin|pin@1||-1.5|-0.75|1|1||
Nschematic:Bus_Pin|pin@2||-2.5|-1|-2|-2||
NPin|pin@3||-1.5|-1|1|1||
NPin|pin@4||-2.5|-1||||
NPin|pin@5||-0.5|2|1|1||
Nschematic:Bus_Pin|pin@6||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@7||2.5|0|-2|-2||
NPin|pin@8||-1.5|2|1|1||
NPin|pin@9||-1.5|-2|1|1||
NPin|pin@10||-0.5|-2|1|1||
NPin|pin@11||-2.5|1||||
NPin|pin@12||-1.5|1|1|1||
AThicker|net@0|||FS3150|pin@0||-0.25|-2|pin@1||-1.5|-0.75|ART_color()I10
AThicker|net@1|||FS0|pin@3||-1.5|-1|pin@4||-2.5|-1|ART_color()I10
AThicker|net@2|||FS0|pin@5||-0.5|2|pin@8||-1.5|2|ART_color()I10
AThicker|net@3|||FS2700|pin@9||-1.5|-2|pin@8||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@10||-0.5|-2|pin@9||-1.5|-2|ART_color()I10
AThicker|net@5|||FS0|pin@12||-1.5|1|pin@11||-2.5|1|ART_color()I10
Eina||D5G1;|pin@2||I
Einb||D5G1;|pin@6||I
Eout||D5G1;|pin@7||O
X

# Cell mullerC;1{sch}
CmullerC;1{sch}||schematic|1021415734000|1157995398986||ATTR_Delay(D5G1;HNPX-16;Y-5.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-16;Y-4.5;)S1|ATTR_drive0(D5G1;HNPTX-16;Y-6.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16;Y-7.5;)Sstrong1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-19|0||||
NOff-Page|conn@1||15.5|-5|||RR|
NOff-Page|conn@2||15.5|0||||
ImullerC;1{ic}|mullerC@0||26.5|16.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms2b;1{ic}|nms2@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2.25;Y1.5;)S@X
NWire_Pin|pin@0||-6.5|0||||
Ngeneric:Invisible-Pin|pin@1||23|-14|||||ART_message(D5G2;)S[X is drive strength,Pull-up and pull-down have the same strength]
Ngeneric:Invisible-Pin|pin@2||-0.5|17.5|||||ART_message(D5G2;)S[P to N width ratio is 4 to 2]
NWire_Pin|pin@3||-6.5|8.5||||
NWire_Pin|pin@4||6|-5||||
Ngeneric:Invisible-Pin|pin@5||-0.5|20|||||ART_message(D5G2;)S[one-parameter muller C-element]
NWire_Pin|pin@6||6|4.5||||
Ngeneric:Invisible-Pin|pin@7||-0.5|25|||||ART_message(D5G6;)S[mullerC]
NWire_Pin|pin@8||-6.5|-9||||
NWire_Pin|pin@9||0|0||||
Ipms2;1{ic}|pms2@0||0|8.5|||D0G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y1;)S@X
Awire|net@0|||0|conn@2|a|13.5|0|pin@9||0|0
Awire|net@1|||0|pin@0||-6.5|0|conn@0|y|-17|0
Awire|net@2|||2700|pin@8||-6.5|-9|pin@0||-6.5|0
Awire|net@3|||2700|pin@0||-6.5|0|pin@3||-6.5|8.5
Awire|net@4|||1800|pin@4||6|-5|conn@1|y|13.5|-5
Awire|net@5|||0|pms2@0|g|-3|8.5|pin@3||-6.5|8.5
Awire|net@6|||1800|pms2@0|g2|3|4.5|pin@6||6|4.5
Awire|net@7|||2700|pin@9||0|0|pms2@0|d|0|2.5
Awire|net@8|||2700|pin@4||6|-5|pin@6||6|4.5
Awire|net@9|||1800|pin@8||-6.5|-9|nms2@0|g|-3|-9
Awire|net@10|||1800|nms2@0|g2|3|-5|pin@4||6|-5
Awire|net@11|||900|pin@9||0|0|nms2@0|d|0|-3
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell mullerC_sy;1{ic}
CmullerC_sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NThick-Circle|art@2||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NOpened-Thicker-Polygon|art@3||-0.12|0|0.75|1.25|||ART_color()I10|trace()V[0.375/-0.625,-0.375/-0.625,-0.375/0.625,0.375/0.625]
NPin|pin@0||-1.5|1|1|1||
NPin|pin@1||-2.5|1||||
NPin|pin@2||-0.5|-2|1|1||
NPin|pin@3||-1.5|-2|1|1||
NPin|pin@4||-1.5|2|1|1||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@6||-2.5|1|-2|-2||
NPin|pin@7||-0.5|2|1|1||
NPin|pin@8||-2.5|-1||||
NPin|pin@9||-1.5|-1|1|1||
Nschematic:Bus_Pin|pin@10||-2.5|-1|-2|-2||
AThicker|net@0|||FS0|pin@0||-1.5|1|pin@1||-2.5|1|ART_color()I10
AThicker|net@1|||FS0|pin@2||-0.5|-2|pin@3||-1.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@3||-1.5|-2|pin@4||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@7||-0.5|2|pin@4||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@9||-1.5|-1|pin@8||-2.5|-1|ART_color()I10
Eina||D5G1;|pin@10||I
Einb||D5G1;|pin@6||I
Eout||D5G1;|pin@5||O
X

# Cell mullerC_sy;1{sch}
CmullerC_sy;1{sch}||schematic|1021415734000|1157995387844||ATTR_Delay(D5G1;HNPX-16;Y-5.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-16;Y-4.5;)S1|ATTR_drive0(D5G1;HNPTX-16;Y-6.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16;Y-7.5;)Sstrong1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||15.5|0||||
NOff-Page|conn@1||15.5|-5|||RR|
NOff-Page|conn@2||-19|0||||
ImullerC_sy;1{ic}|mullerC_@0||26.5|16.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms2_sy;1{ic}|nms2_sy@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX5.5;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S@X
NWire_Pin|pin@0||0|0||||
NWire_Pin|pin@1||-6.5|-9||||
Ngeneric:Invisible-Pin|pin@2||-0.5|25|||||ART_message(D5G6;)S[mullerC_sy]
NWire_Pin|pin@3||6|4.5||||
Ngeneric:Invisible-Pin|pin@4||-0.5|20|||||ART_message(D5G2;)S[one-parameter symmetric muller C-element]
NWire_Pin|pin@5||6|-5||||
NWire_Pin|pin@6||-6.5|8.5||||
Ngeneric:Invisible-Pin|pin@7||-0.5|17.5|||||ART_message(D5G2;)S[P to N width ratio is 4 to 2]
Ngeneric:Invisible-Pin|pin@8||23|-14|||||ART_message(D5G2;)S[X is drive strength,Pull-up and pull-down have the same strength]
NWire_Pin|pin@9||-6.5|0||||
Ipms2_sy;1{ic}|pms2_sy@0||0|8.5|||D0G4;|ATTR_Delay(D5G1;NOJPX-5;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX4;Y2;)S@X
Awire|net@0|||1800|nms2_sy@0|g2|3|-5|pin@5||6|-5
Awire|net@1|||900|pin@0||0|0|nms2_sy@0|d|0|-3
Awire|net@2|||1800|pin@1||-6.5|-9|nms2_sy@0|g|-3|-9
Awire|net@3|||1800|pms2_sy@0|g2|3|4.5|pin@3||6|4.5
Awire|net@4|||0|pms2_sy@0|g|-3|8.5|pin@6||-6.5|8.5
Awire|net@5|||2700|pin@0||0|0|pms2_sy@0|d|0|2.5
Awire|net@6|||2700|pin@5||6|-5|pin@3||6|4.5
Awire|net@7|||1800|pin@5||6|-5|conn@1|y|13.5|-5
Awire|net@8|||2700|pin@9||-6.5|0|pin@6||-6.5|8.5
Awire|net@9|||2700|pin@1||-6.5|-9|pin@9||-6.5|0
Awire|net@10|||0|pin@9||-6.5|0|conn@2|y|-17|0
Awire|net@11|||0|conn@0|a|13.5|0|pin@0||0|0
Eina||D5G2;|conn@2|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell mux21_tri;1{ic}
Cmux21_tri;1{ic}||artwork|1092084237000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-4.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX4;Y2;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2.5|0|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||-2|2||||
Nschematic:Bus_Pin|pin@2||-2|-2||||
Nschematic:Bus_Pin|pin@4||3|0||||
Nschematic:Bus_Pin|pin@6||0.5|4.5||||
NPin|pin@8||-1|4|1|1||
NPin|pin@9||-1|-4|1|1||
NPin|pin@10||2|2.5|1|1||
NPin|pin@11||2|-2.5|1|1||
NPin|pin@13||2|-2.5|1|1||
NPin|pin@14||-1|-4|1|1||
NPin|pin@15||-1|4|1|1||
NPin|pin@16||2|2.5|1|1||
NPin|pin@17||-2|-2|1|1||
NPin|pin@18||-1|-2|1|1||
NPin|pin@19||-2|2|1|1||
NPin|pin@20||-1|2|1|1||
NPin|pin@21||0.5|4.5|1|1||
NPin|pin@22||0.5|3.25|1|1||
Ngeneric:Invisible-Pin|pin@25||0|2|||||ART_message(D5G1;)S0
Ngeneric:Invisible-Pin|pin@26||0|-2|||||ART_message(D5G1;)S1
AThicker|net@4|||FS2700|pin@9||-1|-4|pin@8||-1|4|ART_color()I10
AThicker|net@5|||FS2700|pin@11||2|-2.5|pin@10||2|2.5|ART_color()I10
AThicker|net@8|||FS2066|pin@14||-1|-4|pin@13||2|-2.5|ART_color()I10
AThicker|net@9|||FS3334|pin@16||2|2.5|pin@15||-1|4|ART_color()I10
AThicker|net@10|||FS0|pin@18||-1|-2|pin@17||-2|-2|ART_color()I10
AThicker|net@11|||FS0|pin@20||-1|2|pin@19||-2|2|ART_color()I10
AThicker|net@12|||FS2700|pin@22||0.5|3.25|pin@21||0.5|4.5|ART_color()I10
Ein0||D5G1;|pin@0||I
Ein1||D5G1;|pin@2||I
Eout||D5G1;|pin@4||O
Esel||D5G1;|pin@6||I
X

# Cell mux21_tri;1{sch}
Cmux21_tri;1{sch}||schematic|1092081747000|1157998412989||ATTR_Delay(D5G1;HNPX-20;Y-11.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-20;Y-10;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-16|-6||||
NOff-Page|conn@1||-16|0||||
NOff-Page|conn@2||-16|6||||
NOff-Page|conn@3||10|0||||
Iinv;1{ic}|inv@0||-4|0|||D5G4;|ATTR_Delay(D5G1;NOJPX2;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S@X/2.0|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Imux21_tri;1{ic}|mux2@0||22|13|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-4.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX4;Y2;)S1
NWire_Pin|pin@1||5|-6||||
NWire_Pin|pin@2||5|6||||
NWire_Pin|pin@3||0|0||||
NWire_Pin|pin@4||0|10||||
NWire_Pin|pin@5||-8|10||||
NWire_Pin|pin@6||-8|0||||
NWire_Pin|pin@7||-8|-10||||
NWire_Pin|pin@8||0|-10||||
Ngeneric:Invisible-Pin|pin@10||-5|19|||||ART_message(D5G5;)Smux21_tri
Ngeneric:Invisible-Pin|pin@11||-5|15|||||ART_message(D5G2;)Sa 2:1 mux using tristate inverters
NWire_Pin|pin@12||5|0||||
ItriInv;1{ic}|triInv@5||0|6|||D5G4;|ATTR_Delay(D5G1;NOJPX4.5;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3;Y2;)S@X
ItriInv;1{ic}|triInv@6||0|-6|||D5G4;|ATTR_Delay(D5G1;NOJPX4.5;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3;Y2;)S@X
Awire|net@0|||1800|conn@0|y|-14|-6|triInv@6|in|-2.5|-6
Awire|net@1|||1800|conn@2|y|-14|6|triInv@5|in|-2.5|6
Awire|net@4|||0|pin@1||5|-6|triInv@6|out|2.5|-6
Awire|net@6|||0|pin@2||5|6|triInv@5|out|2.5|6
Awire|net@7|||1800|conn@1|y|-14|0|pin@6||-8|0
Awire|net@8|||1800|inv@0|out|-1.5|0|pin@3||0|0
Awire|net@9|||900|pin@3||0|0|triInv@6|enB|0|-4
Awire|net@10|||2700|pin@3||0|0|triInv@5|en|0|4
Awire|net@11|||2700|triInv@5|enB|0|8|pin@4||0|10
Awire|net@12|||0|pin@4||0|10|pin@5||-8|10
Awire|net@13|||1800|pin@6||-8|0|inv@0|in|-6.5|0
Awire|net@14|||900|pin@5||-8|10|pin@6||-8|0
Awire|net@15|||900|pin@6||-8|0|pin@7||-8|-10
Awire|net@16|||1800|pin@7||-8|-10|pin@8||0|-10
Awire|net@17|||2700|pin@8||0|-10|triInv@6|en|0|-8
Awire|net@22|||2700|pin@1||5|-6|pin@12||5|0
Awire|net@23|||2700|pin@12||5|0|pin@2||5|6
Awire|net@24|||0|conn@3|a|8|0|pin@12||5|0
Ein0||D5G2;|conn@2|a|I
Ein1||D5G2;|conn@0|a|I
Eout||D5G2;|conn@3|y|O
Esel||D5G2;|conn@1|a|I
X

# Cell nand2;1{ic}
Cnand2;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NThick-Circle|art@2||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NPin|pin@0||-1.5|1|1|1||
NPin|pin@1||-2.5|1||||
NPin|pin@2||-0.5|-2|1|1||
NPin|pin@3||-1.5|-2|1|1||
NPin|pin@4||-1.5|2|1|1||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@6||-2.5|1|-2|-2||
NPin|pin@7||-0.5|2|1|1||
NPin|pin@8||-2.5|-1||||
NPin|pin@9||-1.5|-1|1|1||
Nschematic:Bus_Pin|pin@10||-2.5|-1|-2|-2||
NPin|pin@11||-1.5|-0.75|1|1||
NPin|pin@12||-0.25|-2|1|1||
AThicker|net@0|||FS0|pin@0||-1.5|1|pin@1||-2.5|1|ART_color()I10
AThicker|net@1|||FS0|pin@2||-0.5|-2|pin@3||-1.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@3||-1.5|-2|pin@4||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@7||-0.5|2|pin@4||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@9||-1.5|-1|pin@8||-2.5|-1|ART_color()I10
AThicker|net@5|||FS3150|pin@12||-0.25|-2|pin@11||-1.5|-0.75|ART_color()I10
Eina||D5G1;|pin@10||I
Einb||D5G1;|pin@6||I
Eout||D5G1;|pin@5||O
X

# Cell nand2;1{sch}
Cnand2;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-16;Y-5.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-16;Y-4.5;)S1|ATTR_drive0(D5G1;HNPTX-16;Y-6.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16;Y-7.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX21;Y-18.5;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@2||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@3||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||15.5|0||||
NOff-Page|conn@1||19.5|-5|||RR|
NOff-Page|conn@2||-21.5|-1||||
Inand2;1{ic}|nand2@0||15.5|12.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms2b;1{ic}|nms2@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2.25;Y1.5;)S@X
NWire_Pin|pin@2||0|0||||
NWire_Pin|pin@3||-9|-9||||
NWire_Pin|pin@15||4.5|7.5||||
NWire_Pin|pin@16||-5|7.5||||
Ngeneric:Invisible-Pin|pin@17||-0.5|25|||||ART_message(D5G6;)S[nand2]
NWire_Pin|pin@18||9|4||||
NWire_Pin|pin@19||4.5|0||||
Ngeneric:Invisible-Pin|pin@20||-0.5|20|||||ART_message(D5G2;)S[one-parameter NAND]
NWire_Pin|pin@21||-5|0||||
NWire_Pin|pin@22||9|-5||||
NWire_Pin|pin@23||-9|4||||
Ngeneric:Invisible-Pin|pin@24||-0.5|17.5|||||ART_message(D5G2;)S[P to N width ratio is 2 to 2]
Ngeneric:Invisible-Pin|pin@25||22.5|-13.5|||||ART_message(D5G2;)S[X is drive strength,One pull-up has the same strength,as the pull-down]
NWire_Pin|pin@26||-9|-1||||
NPower|pwr@0||-5|10.5||||
Awire|net@14|||900|pin@2||0|0|nms2@0|d|0|-3
Awire|net@15|||0|pin@19||4.5|0|pin@2||0|0
Awire|net@16|||0|pin@2||0|0|pin@21||-5|0
Awire|net@17|||1800|nms2@0|g2|3|-5|pin@22||9|-5
Awire|net@18|||1800|pin@3||-9|-9|nms2@0|g|-3|-9
Awire|net@20|||900|pin@16||-5|7.5|PMOS@2|s|-5|6
Awire|net@21|||1800|pin@23||-9|4|PMOS@2|g|-8|4
Awire|net@22|||2700|pin@21||-5|0|PMOS@2|d|-5|2
Awire|net@23|||2700|PMOS@3|s|4.5|6|pin@15||4.5|7.5
Awire|net@24|||1800|PMOS@3|g|7.5|4|pin@18||9|4
Awire|net@25|||2700|pin@19||4.5|0|PMOS@3|d|4.5|2
Awire|net@36|||2700|pin@22||9|-5|pin@18||9|4
Awire|net@38|||2700|pin@16||-5|7.5|pwr@0||-5|10.5
Awire|net@39|||0|pin@15||4.5|7.5|pin@16||-5|7.5
Awire|net@42|||1800|pin@22||9|-5|conn@1|y|17.5|-5
Awire|net@43|||2700|pin@3||-9|-9|pin@26||-9|-1
Awire|net@44|||2700|pin@26||-9|-1|pin@23||-9|4
Awire|net@45|||1800|conn@2|y|-19.5|-1|pin@26||-9|-1
Awire|net@46|||0|conn@0|a|13.5|0|pin@19||4.5|0
Eina||D5G2;|conn@2|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell nand2HLT_sy;1{ic}
Cnand2HLT_sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||-0.5|0|0.5|1|||ART_color()I10|trace()V[-0.25/-0.5,-0.25/0.5,-0.25/0,0.25/0,0.25/0.5,0.25/-0.5]
NThick-Circle|art@2||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@4||0.25|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,0.25/-0.5]
Nschematic:Bus_Pin|pin@0||-2.5|-1|-2|-2||
NPin|pin@1||-1.5|-1|1|1||
NPin|pin@2||-2.5|-1||||
NPin|pin@3||-0.5|2|1|1||
Nschematic:Bus_Pin|pin@4||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
NPin|pin@6||-1.5|2|1|1||
NPin|pin@7||-1.5|-2|1|1||
NPin|pin@8||-0.5|-2|1|1||
NPin|pin@9||-2.5|1||||
NPin|pin@10||-1.5|1|1|1||
AThicker|net@0|||FS0|pin@1||-1.5|-1|pin@2||-2.5|-1|ART_color()I10
AThicker|net@1|||FS0|pin@3||-0.5|2|pin@6||-1.5|2|ART_color()I10
AThicker|net@2|||FS2700|pin@7||-1.5|-2|pin@6||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@8||-0.5|-2|pin@7||-1.5|-2|ART_color()I10
AThicker|net@4|||FS0|pin@10||-1.5|1|pin@9||-2.5|1|ART_color()I10
Eina||D5G1;|pin@0||I
Einb||D5G1;|pin@4||I
Eout||D5G1;|pin@5||O
X

# Cell nand2HLT_sy;1{sch}
Cnand2HLT_sy;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-13.5;Y-16;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-13.5;Y-15;)S1|ATTR_drive0(D5G1;HNPTX-13.5;Y-17;)Sstrong0|ATTR_drive1(D5G1;HNPTX-13.5;Y-18;)Sstrong1|ATTR_verilog_template(D5G1;NTX24.5;Y-20;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@2||6|3.25|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S3.*@X/4.
IPMOS;1{ic}|PMOS@3||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S3.*@X/4.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-17|-9.75||||
NOff-Page|conn@1||21|-5.75|||RR|
NOff-Page|conn@2||22.5|0||||
Inand2HLT_sy;1{ic}|nand2HLT@0||38|18.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms2_sy;1{ic}|nms2_sy@0||0|-9.75|||D0G4;|ATTR_Delay(D5G1;NOJPX5.5;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S@X
Ngeneric:Invisible-Pin|pin@18||32|-14|||||ART_message(D5G2;)S[X is drive strength,The pull-down is 1.5 times as strong as,one pull-up; or both pull-ups together,are as strong as the pull-down]
NWire_Pin|pin@19||-9.5|4||||
NWire_Pin|pin@20||-5|0||||
NWire_Pin|pin@21||-9.5|-9.75||||
NWire_Pin|pin@22||6|0||||
NWire_Pin|pin@23||10.25|3.25||||
NWire_Pin|pin@24||10.25|-5.75||||
Ngeneric:Invisible-Pin|pin@25||3.5|25|||||ART_message(D5G6;)S[nand2HLT_sy]
NWire_Pin|pin@26||-5|7.5||||
NWire_Pin|pin@27||6|7.5||||
Ngeneric:Invisible-Pin|pin@28||2|20|||||ART_message(D5G2;)S[high-LO-threshold NAND]
Ngeneric:Invisible-Pin|pin@29||2.5|18|||||ART_message(D5G2;)S[P to N width ratio is 1.5 to 2]
Ngeneric:Invisible-Pin|pin@30||3|16|||||ART_message(D5G2;)S[Sized assuming both inputs go low together]
NWire_Pin|pin@31||0|0||||
NPower|pwr@0||-5|10.5||||
Awire|net@30|||2700|pin@21||-9.5|-9.75|pin@19||-9.5|4
Awire|net@31|||2700|pin@24||10.25|-5.75|pin@23||10.25|3.25
Awire|net@32|||0|pin@27||6|7.5|pin@26||-5|7.5
Awire|net@33|||2700|pin@26||-5|7.5|pwr@0||-5|10.5
Awire|net@34|||2700|pin@22||6|0|PMOS@2|d|6|1.25
Awire|net@35|||1800|PMOS@2|g|9|3.25|pin@23||10.25|3.25
Awire|net@36|||2700|PMOS@2|s|6|5.25|pin@27||6|7.5
Awire|net@37|||2700|pin@20||-5|0|PMOS@3|d|-5|2
Awire|net@38|||1800|pin@19||-9.5|4|PMOS@3|g|-8|4
Awire|net@39|||900|pin@26||-5|7.5|PMOS@3|s|-5|6
Awire|net@40|||0|pin@31||0|0|pin@20||-5|0
Awire|net@41|||0|pin@22||6|0|pin@31||0|0
Awire|net@42|||900|pin@31||0|0|nms2_sy@0|d|0|-3.75
Awire|net@43|||0|pin@24||10.25|-5.75|nms2_sy@0|g2|3|-5.75
Awire|net@44|||0|nms2_sy@0|g|-3|-9.75|pin@21||-9.5|-9.75
Awire|net@45|||0|conn@2|a|20.5|0|pin@22||6|0
Awire|net@46|||0|conn@1|y|19|-5.75|pin@24||10.25|-5.75
Awire|net@47|||0|pin@21||-9.5|-9.75|conn@0|y|-15|-9.75
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell nand2HT;1{ic}
Cnand2HT;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||0|0|0.5|1|||ART_color()I10|trace()V[-0.25/-0.5,-0.25/0.5,-0.25/0,0.25/0,0.25/0.5,0.25/-0.5]
NThick-Circle|art@2||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
NPin|pin@0||-0.25|-2|1|1||
NPin|pin@1||-1.5|-0.75|1|1||
Nschematic:Bus_Pin|pin@2||-2.5|-1|-2|-2||
NPin|pin@3||-1.5|-1|1|1||
NPin|pin@4||-2.5|-1||||
NPin|pin@5||-0.5|2|1|1||
Nschematic:Bus_Pin|pin@6||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@7||2.5|0|-2|-2||
NPin|pin@8||-1.5|2|1|1||
NPin|pin@9||-1.5|-2|1|1||
NPin|pin@10||-0.5|-2|1|1||
NPin|pin@11||-2.5|1||||
NPin|pin@12||-1.5|1|1|1||
AThicker|net@0|||FS3150|pin@0||-0.25|-2|pin@1||-1.5|-0.75|ART_color()I10
AThicker|net@1|||FS0|pin@3||-1.5|-1|pin@4||-2.5|-1|ART_color()I10
AThicker|net@2|||FS0|pin@5||-0.5|2|pin@8||-1.5|2|ART_color()I10
AThicker|net@3|||FS2700|pin@9||-1.5|-2|pin@8||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@10||-0.5|-2|pin@9||-1.5|-2|ART_color()I10
AThicker|net@5|||FS0|pin@12||-1.5|1|pin@11||-2.5|1|ART_color()I10
Eina||D5G1;|pin@2||I
Einb||D5G1;|pin@6||I
Eout||D5G1;|pin@7||O
X

# Cell nand2HT;1{sch}
Cnand2HT;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-16.5;Y-7;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-16.5;Y-6;)S1|ATTR_drive0(D5G1;HNPTX-16.5;Y-8;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16.5;Y-9;)Sstrong1|ATTR_verilog_template(D5G1;NTX6;Y-17.5;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@2||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S2.*@X
IPMOS;1{ic}|PMOS@3||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S2.*@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-14|-1||||
NOff-Page|conn@1||16.5|-5|||RR|
NOff-Page|conn@2||21|0|||Y|
Inand2HT;1{ic}|nand2HT@0||30|13|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_LEGATE(T)I1|ATTR_LEPARALLGRP()I-1|ATTR_su(T)I-1
Inms2b;1{ic}|nms2@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2.25;Y1.5;)S@X|ATTR_LEGATE(OJT)S@LEGATE|ATTR_LEPARALLGRP(T)I-1
NWire_Pin|pin@0||0|8||||
NWire_Pin|pin@1||-5|8||||
NWire_Pin|pin@2||4.5|8||||
Ngeneric:Invisible-Pin|pin@3||31.5|-12.5|||||ART_message(D5G2;)S[X is drive strength,Pull-up has twice the strength,of the pull-down]
Ngeneric:Invisible-Pin|pin@4||-0.5|17.5|||||ART_message(D5G2;)S[P to N width ratio is 4 to 2]
NWire_Pin|pin@5||-9|4||||
NWire_Pin|pin@6||0|0||||
NWire_Pin|pin@7||-5|0||||
Ngeneric:Invisible-Pin|pin@8||-0.5|20|||||ART_message(D5G2;)S[one-parameter high-threshold NAND]
NWire_Pin|pin@9||-9|-1||||
NWire_Pin|pin@10||4.5|0||||
NWire_Pin|pin@11||9|4||||
NWire_Pin|pin@12||9|-5||||
Ngeneric:Invisible-Pin|pin@13||0.5|25|||||ART_message(D5G6;)S[nand2HT]
NWire_Pin|pin@14||-9|-9||||
NPower|pwr@0||0|11.5||||
Awire|net@0|||0|nms2@0|g|-3|-9|pin@14||-9|-9
Awire|net@1|||1800|nms2@0|g2|3|-5|pin@12||9|-5
Awire|net@2|||2700|pin@0||0|8|pwr@0||0|11.5
Awire|net@3|||1800|pin@1||-5|8|pin@0||0|8
Awire|net@4|||1800|pin@0||0|8|pin@2||4.5|8
Awire|net@5|||1800|pin@10||4.5|0|conn@2|a|19|0
Awire|net@6|||2700|PMOS@2|s|-5|6|pin@1||-5|8
Awire|net@7|||900|pin@2||4.5|8|PMOS@3|s|4.5|6
Awire|net@8|||1800|pin@5||-9|4|PMOS@2|g|-8|4
Awire|net@9|||2700|pin@7||-5|0|PMOS@2|d|-5|2
Awire|net@10|||2700|pin@10||4.5|0|PMOS@3|d|4.5|2
Awire|net@11|||0|pin@11||9|4|PMOS@3|g|7.5|4
Awire|net@12|||2700|pin@9||-9|-1|pin@5||-9|4
Awire|net@13|||900|pin@6||0|0|nms2@0|d|0|-3
Awire|net@14|||0|pin@10||4.5|0|pin@6||0|0
Awire|net@15|||0|pin@6||0|0|pin@7||-5|0
Awire|net@16|||0|pin@9||-9|-1|conn@0|y|-12|-1
Awire|net@17|||2700|pin@12||9|-5|pin@11||9|4
Awire|net@18|||1800|pin@12||9|-5|conn@1|y|14.5|-5
Awire|net@19|||2700|pin@14||-9|-9|pin@9||-9|-1
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell nand2HTen;1{ic}
Cnand2HTen;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NThick-Circle|art@2||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NOpened-Thicker-Polygon|art@3||0|0|0.5|1|||ART_color()I10|trace()V[-0.25/-0.5,-0.25/0.5,-0.25/0,0.25/0,0.25/0.5,0.25/-0.5]
Ngeneric:Invisible-Pin|pin@0||-0.38|-1.25|||||ART_message(D5G1.5;)S[en]
NPin|pin@1||-1.5|1|1|1||
NPin|pin@2||-2.5|1||||
NPin|pin@3||-0.5|-2|1|1||
NPin|pin@4||-1.5|-2|1|1||
NPin|pin@5||-1.5|2|1|1||
Nschematic:Bus_Pin|pin@6||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@7||-2.5|1|-2|-2||
NPin|pin@8||-0.5|2|1|1||
NPin|pin@9||-2.5|-1||||
NPin|pin@10||-1.5|-1|1|1||
Nschematic:Bus_Pin|pin@11||-2.5|-1|-2|-2||
NPin|pin@12||-1.5|-0.75|1|1||
NPin|pin@13||-0.25|-2|1|1||
AThicker|net@0|||FS0|pin@1||-1.5|1|pin@2||-2.5|1|ART_color()I10
AThicker|net@1|||FS0|pin@3||-0.5|-2|pin@4||-1.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@4||-1.5|-2|pin@5||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@8||-0.5|2|pin@5||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@10||-1.5|-1|pin@9||-2.5|-1|ART_color()I10
AThicker|net@5|||FS3150|pin@13||-0.25|-2|pin@12||-1.5|-0.75|ART_color()I10
Eina||D5G1;|pin@11||I
Einb||D5G1;|pin@7||I
Eout||D5G1;|pin@6||O
X

# Cell nand2HTen;1{sch}
Cnand2HTen;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-16.5;Y-7;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-16.5;Y-6;)S1|ATTR_drive0(D5G1;HNPTX-16.5;Y-8;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16.5;Y-9;)Sstrong1|ATTR_verilog_template(D5G1;NTX6;Y-17.5;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@2||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S2.*@X
IPMOS;1{ic}|PMOS@3||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)Smax(@X/5., 5./6.)
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||21|0|||Y|
NOff-Page|conn@1||16.5|-5|||RR|
NOff-Page|conn@2||-14|-1||||
Inand2HTen;1{ic}|nand2HTe@0||30|13|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_LEGATE(T)I1|ATTR_LEPARALLGRP()I-1|ATTR_su(T)I-1
Inms2b;1{ic}|nms2@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2.25;Y1.5;)S@X|ATTR_LEGATE(OJT)S@LEGATE|ATTR_LEPARALLGRP(T)I-1
NWire_Pin|pin@0||-9|-9||||
Ngeneric:Invisible-Pin|pin@1||9|6|||||ART_message(D5G1;)S[fixed size]
Ngeneric:Invisible-Pin|pin@2||0.5|25|||||ART_message(D5G6;)S[nand2HTen]
NWire_Pin|pin@3||9|-5||||
NWire_Pin|pin@4||9|4||||
NWire_Pin|pin@5||4.5|0||||
NWire_Pin|pin@6||-9|-1||||
Ngeneric:Invisible-Pin|pin@7||-0.5|20|||||ART_message(D5G2;)S[one-parameter high-threshold NAND where ina is enable (DC) input]
NWire_Pin|pin@8||-5|0||||
NWire_Pin|pin@9||0|0||||
NWire_Pin|pin@10||-9|4||||
Ngeneric:Invisible-Pin|pin@11||-0.5|17.5|||||ART_message(D5G2;)S[P to N width ratio is 4 to 2]
Ngeneric:Invisible-Pin|pin@12||31.5|-12.5|||||ART_message(D5G2;)S[X is drive strength,Pull-up has twice the strength,of the pull-down]
NWire_Pin|pin@13||4.5|8||||
NWire_Pin|pin@14||-5|8||||
NWire_Pin|pin@15||0|8||||
NPower|pwr@0||0|11.5||||
Awire|net@0|||2700|pin@0||-9|-9|pin@6||-9|-1
Awire|net@1|||1800|pin@3||9|-5|conn@1|y|14.5|-5
Awire|net@2|||2700|pin@3||9|-5|pin@4||9|4
Awire|net@3|||0|pin@6||-9|-1|conn@2|y|-12|-1
Awire|net@4|||0|pin@9||0|0|pin@8||-5|0
Awire|net@5|||0|pin@5||4.5|0|pin@9||0|0
Awire|net@6|||900|pin@9||0|0|nms2@0|d|0|-3
Awire|net@7|||2700|pin@6||-9|-1|pin@10||-9|4
Awire|net@8|||0|pin@4||9|4|PMOS@2|g|7.5|4
Awire|net@9|||2700|pin@5||4.5|0|PMOS@2|d|4.5|2
Awire|net@10|||2700|pin@8||-5|0|PMOS@3|d|-5|2
Awire|net@11|||1800|pin@10||-9|4|PMOS@3|g|-8|4
Awire|net@12|||900|pin@13||4.5|8|PMOS@2|s|4.5|6
Awire|net@13|||2700|PMOS@3|s|-5|6|pin@14||-5|8
Awire|net@14|||1800|pin@5||4.5|0|conn@0|a|19|0
Awire|net@15|||1800|pin@15||0|8|pin@13||4.5|8
Awire|net@16|||1800|pin@14||-5|8|pin@15||0|8
Awire|net@17|||2700|pin@15||0|8|pwr@0||0|11.5
Awire|net@18|||1800|nms2@0|g2|3|-5|pin@3||9|-5
Awire|net@19|||0|nms2@0|g|-3|-9|pin@0||-9|-9
Eina||D5G2;|conn@2|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell nand2LT;1{ic}
Cnand2LT;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@3||0|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,0.25/-0.5]
NPin|pin@0||-0.25|-2|0.5|0.5||
NPin|pin@1||-1.5|-0.75|0.5|0.5||
Nschematic:Bus_Pin|pin@2||-2.5|-1|-2|-2||
NPin|pin@3||-1.5|-1|1|1||
NPin|pin@4||-2.5|-1||||
NPin|pin@5||-0.5|2|1|1||
Nschematic:Bus_Pin|pin@6||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@7||2.5|0|-2|-2||
NPin|pin@8||-1.5|2|1|1||
NPin|pin@9||-1.5|-2|1|1||
NPin|pin@10||-0.5|-2|1|1||
NPin|pin@11||-2.5|1||||
NPin|pin@12||-1.5|1|1|1||
AThicker|net@0|||FS3150|pin@0||-0.25|-2|pin@1||-1.5|-0.75|ART_color()I10
AThicker|net@1|||FS0|pin@3||-1.5|-1|pin@4||-2.5|-1|ART_color()I10
AThicker|net@2|||FS0|pin@5||-0.5|2|pin@8||-1.5|2|ART_color()I10
AThicker|net@3|||FS2700|pin@9||-1.5|-2|pin@8||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@10||-0.5|-2|pin@9||-1.5|-2|ART_color()I10
AThicker|net@5|||FS0|pin@12||-1.5|1|pin@11||-2.5|1|ART_color()I10
Eina||D5G1;|pin@2||I
Einb||D5G1;|pin@6||I
Eout||D5G1;|pin@7||O
X

# Cell nand2LT;1{sch}
Cnand2LT;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-13.5;Y-16;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-13.5;Y-15;)S1|ATTR_drive0(D5G1;HNPTX-13.5;Y-17;)Sstrong0|ATTR_drive1(D5G1;HNPTX-13.5;Y-18;)Sstrong1|ATTR_verilog_template(D5G1;NTX26.5;Y-17;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@2||6|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S@X/2.
IPMOS;1{ic}|PMOS@3||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S@X/2.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-14.5|-9||||
NOff-Page|conn@1||17|-5|||RR|
NOff-Page|conn@2||17|0||||
Inand2LT;1{ic}|nand2LT@0||29|14.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms2b;1{ic}|nms2@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX5.5;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S@X
Ngeneric:Invisible-Pin|pin@0||36.5|-10|||||ART_message(D5G2;)S[X is drive strength,The pull-down is twice as strong as,one pull-up; or both pull-ups together,are as strong as the pull-down]
NWire_Pin|pin@1||-9.5|4||||
NWire_Pin|pin@2||-5|0||||
NWire_Pin|pin@3||-9.5|-9||||
NWire_Pin|pin@4||6|0||||
NWire_Pin|pin@5||11|4||||
NWire_Pin|pin@6||11|-5||||
Ngeneric:Invisible-Pin|pin@7||3.5|25|||||ART_message(D5G6;)S[nand2LT]
NWire_Pin|pin@8||-5|7.5||||
NWire_Pin|pin@9||6|7.5||||
Ngeneric:Invisible-Pin|pin@10||2|20|||||ART_message(D5G2;)S[LO-threshold NAND]
Ngeneric:Invisible-Pin|pin@11||2.5|18|||||ART_message(D5G2;)S[P to N width ratio is 1 to 2]
Ngeneric:Invisible-Pin|pin@12||3|16|||||ART_message(D5G2;)S[Sized assuming both inputs go low together]
NWire_Pin|pin@13||0|0||||
NPower|pwr@0||-5|10.5||||
Awire|net@0|||0|pin@6||11|-5|nms2@0|g2|3|-5
Awire|net@1|||900|pin@13||0|0|nms2@0|d|0|-3
Awire|net@2|||0|nms2@0|g|-3|-9|pin@3||-9.5|-9
Awire|net@3|||2700|pin@3||-9.5|-9|pin@1||-9.5|4
Awire|net@4|||0|pin@3||-9.5|-9|conn@0|y|-12.5|-9
Awire|net@5|||2700|pin@6||11|-5|pin@5||11|4
Awire|net@6|||1800|pin@6||11|-5|conn@1|y|15|-5
Awire|net@7|||0|pin@9||6|7.5|pin@8||-5|7.5
Awire|net@8|||2700|pin@8||-5|7.5|pwr@0||-5|10.5
Awire|net@9|||1800|pin@4||6|0|conn@2|a|15|0
Awire|net@10|||2700|pin@4||6|0|PMOS@2|d|6|2
Awire|net@11|||1800|PMOS@2|g|9|4|pin@5||11|4
Awire|net@12|||2700|PMOS@2|s|6|6|pin@9||6|7.5
Awire|net@13|||2700|pin@2||-5|0|PMOS@3|d|-5|2
Awire|net@14|||1800|pin@1||-9.5|4|PMOS@3|g|-8|4
Awire|net@15|||900|pin@8||-5|7.5|PMOS@3|s|-5|6
Awire|net@16|||0|pin@13||0|0|pin@2||-5|0
Awire|net@17|||0|pin@4||6|0|pin@13||0|0
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell nand2LT_sy;1{ic}
Cnand2LT_sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||0|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,0.25/-0.5]
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
NThick-Circle|art@3||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NPin|pin@0||-1.5|1|1|1||
NPin|pin@1||-2.5|1||||
NPin|pin@2||-0.5|-2|1|1||
NPin|pin@3||-1.5|-2|1|1||
NPin|pin@4||-1.5|2|1|1||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@6||-2.5|1|-2|-2||
NPin|pin@7||-0.5|2|1|1||
NPin|pin@8||-2.5|-1||||
NPin|pin@9||-1.5|-1|1|1||
Nschematic:Bus_Pin|pin@10||-2.5|-1|-2|-2||
AThicker|net@0|||FS0|pin@0||-1.5|1|pin@1||-2.5|1|ART_color()I10
AThicker|net@1|||FS0|pin@2||-0.5|-2|pin@3||-1.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@3||-1.5|-2|pin@4||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@7||-0.5|2|pin@4||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@9||-1.5|-1|pin@8||-2.5|-1|ART_color()I10
Eina||D5G1;|pin@10||I
Einb||D5G1;|pin@6||I
Eout||D5G1;|pin@5||O
X

# Cell nand2LT_sy;1{sch}
Cnand2LT_sy;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-13.5;Y-16;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-13.5;Y-15;)S1|ATTR_drive0(D5G1;HNPTX-13.5;Y-17;)Sstrong0|ATTR_drive1(D5G1;HNPTX-13.5;Y-18;)Sstrong1|ATTR_verilog_template(D5G1;NTX26.5;Y-17;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@2||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/2.
IPMOS;1{ic}|PMOS@3||6|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/2.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||17|0||||
NOff-Page|conn@1||17|-5|||RR|
NOff-Page|conn@2||-14.5|-9||||
Inand2LT_sy;1{ic}|nand2LT_@0||38.5|19|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms2_sy;1{ic}|nms2_sy@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX5.5;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S@X
NWire_Pin|pin@0||0|0||||
Ngeneric:Invisible-Pin|pin@1||3|16|||||ART_message(D5G2;)S[Sized assuming both inputs go low together]
Ngeneric:Invisible-Pin|pin@2||2.5|18|||||ART_message(D5G2;)S[P to N width ratio is 1 to 2]
Ngeneric:Invisible-Pin|pin@3||2|20|||||ART_message(D5G2;)S[LO-threshold NAND]
NWire_Pin|pin@4||6|7.5||||
NWire_Pin|pin@5||-5|7.5||||
Ngeneric:Invisible-Pin|pin@6||3.5|25|||||ART_message(D5G6;)S[nand2LT_sy]
NWire_Pin|pin@7||11|-5||||
NWire_Pin|pin@8||11|4||||
NWire_Pin|pin@9||6|0||||
NWire_Pin|pin@10||-9.5|-9||||
NWire_Pin|pin@11||-5|0||||
NWire_Pin|pin@12||-9.5|4||||
Ngeneric:Invisible-Pin|pin@13||36.5|-10|||||ART_message(D5G2;)S[X is drive strength,The pull-down is twice as strong as,one pull-up; or both pull-ups together,are as strong as the pull-down]
NPower|pwr@0||-5|10.5||||
Awire|net@0|||0|nms2_sy@0|g|-3|-9|pin@10||-9.5|-9
Awire|net@1|||0|pin@7||11|-5|nms2_sy@0|g2|3|-5
Awire|net@2|||900|pin@0||0|0|nms2_sy@0|d|0|-3
Awire|net@3|||0|pin@9||6|0|pin@0||0|0
Awire|net@4|||0|pin@0||0|0|pin@11||-5|0
Awire|net@5|||900|pin@5||-5|7.5|PMOS@2|s|-5|6
Awire|net@6|||1800|pin@12||-9.5|4|PMOS@2|g|-8|4
Awire|net@7|||2700|pin@11||-5|0|PMOS@2|d|-5|2
Awire|net@8|||2700|PMOS@3|s|6|6|pin@4||6|7.5
Awire|net@9|||1800|PMOS@3|g|9|4|pin@8||11|4
Awire|net@10|||2700|pin@9||6|0|PMOS@3|d|6|2
Awire|net@11|||1800|pin@9||6|0|conn@0|a|15|0
Awire|net@12|||2700|pin@5||-5|7.5|pwr@0||-5|10.5
Awire|net@13|||0|pin@4||6|7.5|pin@5||-5|7.5
Awire|net@14|||1800|pin@7||11|-5|conn@1|y|15|-5
Awire|net@15|||2700|pin@7||11|-5|pin@8||11|4
Awire|net@16|||0|pin@10||-9.5|-9|conn@2|y|-12.5|-9
Awire|net@17|||2700|pin@10||-9.5|-9|pin@12||-9.5|4
Eina||D5G2;|conn@2|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell nand2LTen;1{ic}
Cnand2LTen;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||0|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,0.25/-0.5]
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
NThick-Circle|art@3||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
Ngeneric:Invisible-Pin|pin@0||-0.5|-1.25|||||ART_message(D5G1.5;)S[en]
NPin|pin@1||-1.5|1|1|1||
NPin|pin@2||-2.5|1||||
NPin|pin@3||-0.5|-2|1|1||
NPin|pin@4||-1.5|-2|1|1||
NPin|pin@5||-1.5|2|1|1||
Nschematic:Bus_Pin|pin@6||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@7||-2.5|1|-2|-2||
NPin|pin@8||-0.5|2|1|1||
NPin|pin@9||-2.5|-1||||
NPin|pin@10||-1.5|-1|1|1||
Nschematic:Bus_Pin|pin@11||-2.5|-1|-2|-2||
NPin|pin@12||-1.5|-0.75|0.5|0.5||
NPin|pin@13||-0.25|-2|0.5|0.5||
AThicker|net@0|||FS0|pin@1||-1.5|1|pin@2||-2.5|1|ART_color()I10
AThicker|net@1|||FS0|pin@3||-0.5|-2|pin@4||-1.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@4||-1.5|-2|pin@5||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@8||-0.5|2|pin@5||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@10||-1.5|-1|pin@9||-2.5|-1|ART_color()I10
AThicker|net@5|||FS3150|pin@13||-0.25|-2|pin@12||-1.5|-0.75|ART_color()I10
Eina||D5G1;|pin@11||I
Einb||D5G1;|pin@7||I
Eout||D5G1;|pin@6||O
X

# Cell nand2LTen;1{sch}
Cnand2LTen;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-13.5;Y-16;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-13.5;Y-15;)S1|ATTR_drive0(D5G1;HNPTX-13.5;Y-17;)Sstrong0|ATTR_drive1(D5G1;HNPTX-13.5;Y-18;)Sstrong1|ATTR_verilog_template(D5G1;NTX26.5;Y-17;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@2||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)Smax(@X/20., 0.5)
IPMOS;1{ic}|PMOS@3||6|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S@X/2.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||17|0||||
NOff-Page|conn@1||17|-5|||RR|
NOff-Page|conn@2||-14.5|-9||||
Inand2LTen;1{ic}|nand2LTe@0||42|18|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms2b;1{ic}|nms2@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX5.5;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S@X
NWire_Pin|pin@0||0|0||||
Ngeneric:Invisible-Pin|pin@1||3|16|||||ART_message(D5G2;)S[Sized assuming both inputs go low together]
Ngeneric:Invisible-Pin|pin@2||2.5|18|||||ART_message(D5G2;)S[P to N width ratio is 1 to 2]
Ngeneric:Invisible-Pin|pin@3||2|20|||||ART_message(D5G2;)S[LO-threshold NAND where ina is enable (DC) input]
NWire_Pin|pin@4||6|7.5||||
NWire_Pin|pin@5||-5|7.5||||
Ngeneric:Invisible-Pin|pin@6||3.5|25|||||ART_message(D5G6;)S[nand2LTen]
NWire_Pin|pin@7||11|-5||||
NWire_Pin|pin@8||11|4||||
NWire_Pin|pin@9||6|0||||
NWire_Pin|pin@10||-9.5|-9||||
NWire_Pin|pin@11||-5|0||||
NWire_Pin|pin@12||-9.5|4||||
Ngeneric:Invisible-Pin|pin@13||36.5|-10|||||ART_message(D5G2;)S[X is drive strength,The pull-down is twice as strong as,one pull-up; or both pull-ups together,are as strong as the pull-down]
NPower|pwr@0||-5|10.5||||
Awire|net@0|||0|pin@9||6|0|pin@0||0|0
Awire|net@1|||0|pin@0||0|0|pin@11||-5|0
Awire|net@2|||900|pin@5||-5|7.5|PMOS@2|s|-5|6
Awire|net@3|||1800|pin@12||-9.5|4|PMOS@2|g|-8|4
Awire|net@4|||2700|pin@11||-5|0|PMOS@2|d|-5|2
Awire|net@5|||2700|PMOS@3|s|6|6|pin@4||6|7.5
Awire|net@6|||1800|PMOS@3|g|9|4|pin@8||11|4
Awire|net@7|||2700|pin@9||6|0|PMOS@3|d|6|2
Awire|net@8|||1800|pin@9||6|0|conn@0|a|15|0
Awire|net@9|||2700|pin@5||-5|7.5|pwr@0||-5|10.5
Awire|net@10|||0|pin@4||6|7.5|pin@5||-5|7.5
Awire|net@11|||1800|pin@7||11|-5|conn@1|y|15|-5
Awire|net@12|||2700|pin@7||11|-5|pin@8||11|4
Awire|net@13|||0|pin@10||-9.5|-9|conn@2|y|-12.5|-9
Awire|net@14|||2700|pin@10||-9.5|-9|pin@12||-9.5|4
Awire|net@15|||0|nms2@0|g|-3|-9|pin@10||-9.5|-9
Awire|net@16|||900|pin@0||0|0|nms2@0|d|0|-3
Awire|net@17|||0|pin@7||11|-5|nms2@0|g2|3|-5
Eina||D5G2;|conn@2|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell nand2_sy;1{ic}
Cnand2_sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||-2.5|-1|-2|-2||
NPin|pin@1||-1.5|-1|1|1||
NPin|pin@2||-2.5|-1||||
NPin|pin@3||-0.5|2|1|1||
Nschematic:Bus_Pin|pin@4||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
NPin|pin@6||-1.5|2|1|1||
NPin|pin@7||-1.5|-2|1|1||
NPin|pin@8||-0.5|-2|1|1||
NPin|pin@9||-2.5|1||||
NPin|pin@10||-1.5|1|1|1||
AThicker|net@0|||FS0|pin@1||-1.5|-1|pin@2||-2.5|-1|ART_color()I10
AThicker|net@1|||FS0|pin@3||-0.5|2|pin@6||-1.5|2|ART_color()I10
AThicker|net@2|||FS2700|pin@7||-1.5|-2|pin@6||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@8||-0.5|-2|pin@7||-1.5|-2|ART_color()I10
AThicker|net@4|||FS0|pin@10||-1.5|1|pin@9||-2.5|1|ART_color()I10
Eina||D5G1;|pin@0||I
Einb||D5G1;|pin@4||I
Eout||D5G1;|pin@5||O
X

# Cell nand2_sy;1{sch}
Cnand2_sy;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-17.5;Y-16;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-17.5;Y-15;)S1|ATTR_drive0(D5G1;HNPTX-17.5;Y-17;)Sstrong0|ATTR_drive1(D5G1;HNPTX-17.5;Y-18;)Sstrong1|ATTR_verilog_template(D5G1;NTX25;Y-17.5;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@2||5.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@3||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-23.5|-9||||
NOff-Page|conn@1||19.5|-5|||RR|
NOff-Page|conn@2||19.5|0||||
Inand2_sy;1{ic}|nand2_sy@0||29|14.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms2_sy;1{ic}|nms2_sy@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX5.5;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S@X
NWire_Pin|pin@4||13.5|-5||||
NWire_Pin|pin@5||0|0||||
Ngeneric:Invisible-Pin|pin@6||35|-11|||||ART_message(D5G2;)S[X is drive strength,One pull-up has the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@7||3.5|17.5|||||ART_message(D5G2;)S[P to N width ratio is 2 to 2]
NWire_Pin|pin@8||-9.5|4||||
NWire_Pin|pin@9||-5|0||||
Ngeneric:Invisible-Pin|pin@10||3.5|20|||||ART_message(D5G2;)S[one-parameter symmetric NAND]
NWire_Pin|pin@11||-9.5|-9||||
NWire_Pin|pin@12||5.5|0||||
NWire_Pin|pin@13||13.5|4||||
Ngeneric:Invisible-Pin|pin@14||3.5|25|||||ART_message(D5G6;)S[nand2_sy]
NWire_Pin|pin@15||-5|7.5||||
NWire_Pin|pin@16||5.5|7.5||||
NPower|pwr@0||-5|10.5||||
Awire|net@8|||1800|pin@12||5.5|0|conn@2|a|17.5|0
Awire|net@9|||2700|pin@4||13.5|-5|pin@13||13.5|4
Awire|net@10|||0|conn@1|y|17.5|-5|pin@4||13.5|-5
Awire|net@11|||0|nms2_sy@0|g|-3|-9|pin@11||-9.5|-9
Awire|net@12|||900|pin@5||0|0|nms2_sy@0|d|0|-3
Awire|net@13|||1800|pin@9||-5|0|pin@5||0|0
Awire|net@14|||1800|pin@5||0|0|pin@12||5.5|0
Awire|net@15|||2700|PMOS@2|s|5.5|6|pin@16||5.5|7.5
Awire|net@16|||1800|PMOS@2|g|8.5|4|pin@13||13.5|4
Awire|net@17|||2700|pin@12||5.5|0|PMOS@2|d|5.5|2
Awire|net@18|||900|pin@15||-5|7.5|PMOS@3|s|-5|6
Awire|net@19|||1800|pin@8||-9.5|4|PMOS@3|g|-8|4
Awire|net@20|||2700|pin@9||-5|0|PMOS@3|d|-5|2
Awire|net@21|||2700|pin@11||-9.5|-9|pin@8||-9.5|4
Awire|net@22|||0|pin@16||5.5|7.5|pin@15||-5|7.5
Awire|net@23|||2700|pin@15||-5|7.5|pwr@0||-5|10.5
Awire|net@30|||1800|nms2_sy@0|g2|3|-5|pin@4||13.5|-5
Awire|net@31|||1800|conn@0|y|-21.5|-9|pin@11||-9.5|-9
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell nand2en;1{ic}
Cnand2en;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
Ngeneric:Invisible-Pin|pin@0||-0.5|-1.25|||||ART_message(D5G1.5;)S[en]
NPin|pin@1||-0.25|-2|1|1||
NPin|pin@2||-1.5|-0.75|1|1||
Nschematic:Bus_Pin|pin@3||-2.5|-1|-2|-2||
NPin|pin@4||-1.5|-1|1|1||
NPin|pin@5||-2.5|-1||||
NPin|pin@6||-0.5|2|1|1||
Nschematic:Bus_Pin|pin@7||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@8||2.5|0|-2|-2||
NPin|pin@9||-1.5|2|1|1||
NPin|pin@10||-1.5|-2|1|1||
NPin|pin@11||-0.5|-2|1|1||
NPin|pin@12||-2.5|1||||
NPin|pin@13||-1.5|1|1|1||
AThicker|net@0|||FS3150|pin@1||-0.25|-2|pin@2||-1.5|-0.75|ART_color()I10
AThicker|net@1|||FS0|pin@4||-1.5|-1|pin@5||-2.5|-1|ART_color()I10
AThicker|net@2|||FS0|pin@6||-0.5|2|pin@9||-1.5|2|ART_color()I10
AThicker|net@3|||FS2700|pin@10||-1.5|-2|pin@9||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@11||-0.5|-2|pin@10||-1.5|-2|ART_color()I10
AThicker|net@5|||FS0|pin@13||-1.5|1|pin@12||-2.5|1|ART_color()I10
Eina||D5G1;|pin@3||I
Einb||D5G1;|pin@7||I
Eout||D5G1;|pin@8||O
X

# Cell nand2en;1{sch}
Cnand2en;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-16;Y-5.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-16;Y-4.5;)S1|ATTR_drive0(D5G1;HNPTX-16;Y-6.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16;Y-7.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX25.5;Y-14;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@2||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)Smax(@X/10., 5.2/6.)
IPMOS;1{ic}|PMOS@3||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-14|-1||||
NOff-Page|conn@1||14|-5|||RR|
NOff-Page|conn@2||14|0||||
Inand2en;1{ic}|nand2en@0||25|12.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms2b;1{ic}|nms2@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2.25;Y1.5;)S@X
NWire_Pin|pin@0||4.5|0||||
NWire_Pin|pin@1||-9|-9||||
NWire_Pin|pin@2||0|0||||
Ngeneric:Invisible-Pin|pin@3||31.5|-8|||||ART_message(D5G2;)S[X is drive strength,One pull-up has the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@4||-0.5|17.5|||||ART_message(D5G2;)S[P to N width ratio is 2 to 2 (2/10 for enable input)]
NWire_Pin|pin@5||-9|4||||
NWire_Pin|pin@6||-5|0||||
Ngeneric:Invisible-Pin|pin@7||-0.5|20|||||ART_message(D5G2;)S[one-parameter NAND where ina is DC signal (enable)]
NWire_Pin|pin@8||-9|-1||||
NWire_Pin|pin@9||9|4||||
NWire_Pin|pin@10||9|-5||||
Ngeneric:Invisible-Pin|pin@11||-0.5|25|||||ART_message(D5G6;)S[nand2en]
NWire_Pin|pin@12||-5|7.5||||
NWire_Pin|pin@13||4.5|7.5||||
NPower|pwr@0||-5|10.5||||
Awire|net@0|||900|pin@12||-5|7.5|PMOS@2|s|-5|6
Awire|net@1|||1800|pin@5||-9|4|PMOS@2|g|-8|4
Awire|net@2|||2700|pin@6||-5|0|PMOS@2|d|-5|2
Awire|net@3|||900|pin@13||4.5|7.5|PMOS@3|s|4.5|6
Awire|net@4|||0|pin@9||9|4|PMOS@3|g|7.5|4
Awire|net@5|||2700|pin@0||4.5|0|PMOS@3|d|4.5|2
Awire|net@6|||0|pin@10||9|-5|nms2@0|g2|3|-5
Awire|net@7|||0|conn@2|a|12|0|pin@0||4.5|0
Awire|net@8|||0|pin@0||4.5|0|pin@2||0|0
Awire|net@9|||1800|pin@1||-9|-9|nms2@0|g|-3|-9
Awire|net@10|||2700|pin@1||-9|-9|pin@8||-9|-1
Awire|net@11|||900|pin@2||0|0|nms2@0|d|0|-3
Awire|net@12|||1800|pin@6||-5|0|pin@2||0|0
Awire|net@13|||2700|pin@8||-9|-1|pin@5||-9|4
Awire|net@14|||0|pin@8||-9|-1|conn@0|y|-12|-1
Awire|net@15|||2700|pin@10||9|-5|pin@9||9|4
Awire|net@16|||1800|pin@10||9|-5|conn@1|y|12|-5
Awire|net@17|||0|pin@13||4.5|7.5|pin@12||-5|7.5
Awire|net@18|||2700|pin@12||-5|7.5|pwr@0||-5|10.5
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell nand2en_3n;1{ic}
Cnand2en_3n;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5G1.5;HNPX2.5;Y2.5;)I1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NThick-Circle|art@2||-0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
Ngeneric:Invisible-Pin|pin@0||0|0.5|||||ART_message(D5G1;)S[3n]
NPin|pin@1||-1.5|1|1|1||
NPin|pin@2||-2.5|1||||
NPin|pin@3||-0.5|-2|1|1||
NPin|pin@4||-1.5|-2|1|1||
NPin|pin@5||-1.5|2|1|1||
Nschematic:Bus_Pin|pin@6||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@7||-2.5|1|-2|-2||
NPin|pin@8||-0.5|2|1|1||
NPin|pin@9||-2.5|-1||||
NPin|pin@10||-1.5|-1|1|1||
Nschematic:Bus_Pin|pin@11||-2.5|-1|-2|-2||
NPin|pin@12||-1.5|-0.75|1|1||
NPin|pin@13||-0.25|-2|1|1||
Ngeneric:Invisible-Pin|pin@14||-0.5|-1.25|||||ART_message(D5G1.5;)S[en]
AThicker|net@0|||FS0|pin@1||-1.5|1|pin@2||-2.5|1|ART_color()I10
AThicker|net@1|||FS0|pin@3||-0.5|-2|pin@4||-1.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@4||-1.5|-2|pin@5||-1.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@8||-0.5|2|pin@5||-1.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@10||-1.5|-1|pin@9||-2.5|-1|ART_color()I10
AThicker|net@5|||FS3150|pin@13||-0.25|-2|pin@12||-1.5|-0.75|ART_color()I10
Eina||D5G1;|pin@11||I
Einb||D5G1;|pin@7||I
Eout||D5G1;|pin@6||O
X

# Cell nand2en_3n;1{sch}
Cnand2en_3n;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-20;Y-5.5;)I100|ATTR_X(D5G1;HNPX-20;Y-4.5;)I1|ATTR_drive0(D5G1;HNPTX-20;Y-6.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-20;Y-7.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX25.5;Y-14;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@2||5.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@3||-9|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)SMath.max(((Number)@X).doubleValue()/10., 5./6.)
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||15|0||||
NOff-Page|conn@1||15|-5|||RR|
NOff-Page|conn@2||-18|-1||||
Inand2en_3n;1{ic}|nand2en_@0||25|12.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)I1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms2b;1{ic}|nms2@0||-2|-9|||D0G4;|ATTR_Delay(D5G1;NPX3;Y-0.5;)I100|ATTR_X(D5G1.5;NOJPX-2.25;Y1.5;)S@X/3.
Inms2b;1{ic}|nms2@1||5.5|-9|||D0G4;|ATTR_Delay(D5G1;NPX3;Y-0.5;)I100|ATTR_X(D5G1.5;NOJPX-2.25;Y1.5;)S@X/3.
Inms2b;1{ic}|nms2@2||-9|-9|||D0G4;|ATTR_Delay(D5G1;NPX3;Y-0.5;)I100|ATTR_X(D5G1.5;NOJPX-2.25;Y1.5;)S@X/3.
NWire_Pin|pin@0||-2|0||||
Ngeneric:Invisible-Pin|pin@1||-0.5|15|||||ART_message(D5G2;)S[3 n-stacks for larger sizes]
NWire_Pin|pin@2||5.5|7.5||||
NWire_Pin|pin@3||-9|7.5||||
Ngeneric:Invisible-Pin|pin@4||-0.5|25|||||ART_message(D5G6;)S[nand2en_3n]
NWire_Pin|pin@5||10|-5||||
NWire_Pin|pin@6||10|4||||
NWire_Pin|pin@7||-13|-1||||
Ngeneric:Invisible-Pin|pin@8||-0.5|20|||||ART_message(D5G2;)S[one-parameter NAND where ina is DC signal (enable)]
NWire_Pin|pin@9||-9|0||||
NWire_Pin|pin@10||-13|4||||
Ngeneric:Invisible-Pin|pin@11||-0.5|17.5|||||ART_message(D5G2;)S[P to N width ratio is 2 to 2 (2/10 for enable input)]
Ngeneric:Invisible-Pin|pin@12||31.5|-8|||||ART_message(D5G2;)S[X is drive strength,One pull-up has the same strength,as the pull-down]
NWire_Pin|pin@13||-13|-9||||
NWire_Pin|pin@14||5.5|0||||
NPower|pwr@0||-9|10.5||||
Awire|net@0|||2700|nms2@1|d|5.5|-3|pin@14||5.5|0
Awire|net@1|||1800|nms2@1|g2|8.5|-5|pin@5||10|-5
Awire|net@2|||1800|nms2@0|g2|1|-5|nms2@1|g2|8.5|-5
Awire|net@3|||900|pin@0||-2|0|nms2@0|d|-2|-3
Awire|net@4|||0|pin@14||5.5|0|pin@0||-2|0
Awire|net@5|||0|pin@0||-2|0|pin@9||-9|0
Awire|net@6|||1800|nms2@2|g2|-6|-5|nms2@0|g2|1|-5
Awire|net@7|||0|nms2@1|g|2.5|-9|nms2@0|g|-5|-9
Awire|net@8|||1800|nms2@2|g|-12|-9|nms2@0|g|-5|-9
Awire|net@9|||900|pin@9||-9|0|nms2@2|d|-9|-3
Awire|net@10|||2700|pin@3||-9|7.5|pwr@0||-9|10.5
Awire|net@11|||0|pin@2||5.5|7.5|pin@3||-9|7.5
Awire|net@12|||1800|pin@5||10|-5|conn@1|y|13|-5
Awire|net@13|||2700|pin@5||10|-5|pin@6||10|4
Awire|net@14|||0|pin@7||-13|-1|conn@2|y|-16|-1
Awire|net@15|||2700|pin@7||-13|-1|pin@10||-13|4
Awire|net@16|||2700|pin@13||-13|-9|pin@7||-13|-1
Awire|net@17|||1800|pin@13||-13|-9|nms2@2|g|-12|-9
Awire|net@18|||0|conn@0|a|13|0|pin@14||5.5|0
Awire|net@19|||2700|pin@14||5.5|0|PMOS@2|d|5.5|2
Awire|net@20|||0|pin@6||10|4|PMOS@2|g|8.5|4
Awire|net@21|||900|pin@2||5.5|7.5|PMOS@2|s|5.5|6
Awire|net@22|||2700|pin@9||-9|0|PMOS@3|d|-9|2
Awire|net@23|||1800|pin@10||-13|4|PMOS@3|g|-12|4
Awire|net@24|||900|pin@3||-9|7.5|PMOS@3|s|-9|6
Eina||D5G2;|conn@2|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell nand2n;1{ic}
Cnand2n;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-1|-1|1|1|||ART_color()I10
NThick-Circle|art@2||-1|-2|8|7|YRRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@3||-1|2|8|7|RRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@4||-3.25|0|6|6|3200||ART_color()I10|ART_degrees()I800
NThick-Circle|art@5||-1|1|1|1|||ART_color()I10
NPin|pin@0||2|0||||
NPin|pin@1||2.5|0|1|1||
NPin|pin@2||-0.5|-1.25|1|1||
NPin|pin@3||0|-1.75|1|1||
Nschematic:Bus_Pin|pin@4||-2.5|-1|-2|-2||
NPin|pin@5||-1.5|-1|1|1||
NPin|pin@6||-2.5|-1||||
Nschematic:Bus_Pin|pin@7||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@8||2.5|0|-2|-2||
NPin|pin@9||-2.5|1||||
NPin|pin@10||-1.5|1|1|1||
AThicker|net@0|||FS0|pin@1||2.5|0|pin@0||2|0|ART_color()I10
AThicker|net@1|||FS3150|pin@3||0|-1.75|pin@2||-0.5|-1.25|ART_color()I10
AThicker|net@2|||FS0|pin@5||-1.5|-1|pin@6||-2.5|-1|ART_color()I10
AThicker|net@3|||FS0|pin@10||-1.5|1|pin@9||-2.5|1|ART_color()I10
Eina||D5G1;|pin@4||I
Einb||D5G1;|pin@7||I
Eout||D5G1;|pin@8||O
X

# Cell nand2n;1{sch}
Cnand2n;1{sch}||schematic|1021415734000|1157998157812||ATTR_Delay(D5G1;HNPX-16;Y-5.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-16;Y-4.5;)S1|ATTR_drive0(D5G1;HNPTX-16;Y-6.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16;Y-7.5;)Sstrong1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-9.5|-1||||
NOff-Page|conn@1||-9.5|1||||
NOff-Page|conn@2||9|0||||
Inand2;1{ic}|nand2@0||0|0|||D0G4;|ATTR_Delay(D5G1;NOJPX2.5;Y-3;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S@X|ATTR_drive0(OJP)S@drive0|ATTR_drive1(OJP)S@drive1
Inand2n;1{ic}|nand2n@0||24|14|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ngeneric:Invisible-Pin|pin@0||22|-9.5|||||ART_message(D5G2;)S[X is drive strength,One pull-up has the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@1||-2.5|11|||||ART_message(D5G2;)S[P to N width ratio is 2 to 2]
Ngeneric:Invisible-Pin|pin@2||-2.5|13.5|||||ART_message(D5G2;)S[one-parameter NAND (NOR rep)]
Ngeneric:Invisible-Pin|pin@3||-2.5|18.5|||||ART_message(D5G6;)S[nand2n]
Awire|net@0|||1800|nand2@0|out|2.5|0|conn@2|a|7|0
Awire|net@1|||0|nand2@0|inb|-2.5|1|conn@1|y|-7.5|1
Awire|net@2|||1800|conn@0|y|-7.5|-1|nand2@0|ina|-2.5|-1
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell nand2n_sy;1{ic}
Cnand2n_sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNPX2;Y2.5;)I1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-1.5|1|1|1|||ART_color()I10
NThick-Circle|art@2||-1.5|-2|8|7|YRRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@3||-1.5|2|8|7|RRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@4||-1.5|-1|1|1|||ART_color()I10
NThick-Circle|art@5||-3.75|0|6|6|3200||ART_color()I10|ART_degrees()I800
Nschematic:Bus_Pin|pin@0||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@1||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@2||-2.5|-1|-2|-2||
NPin|pin@3||-2|1|1|1||
NPin|pin@4||-2.5|1||||
NPin|pin@5||1.5|0|1|1||
NPin|pin@6||2.5|0||||
NPin|pin@7||-2.5|-1||||
NPin|pin@8||-2|-1|1|1||
NPin|pin@9||-1|-1.25|1|1||
AThicker|net@0|||FS0|pin@3||-2|1|pin@4||-2.5|1|ART_color()I10
AThicker|net@1|||FS0|pin@6||2.5|0|pin@5||1.5|0|ART_color()I10
AThicker|net@2|||FS0|pin@8||-2|-1|pin@7||-2.5|-1|ART_color()I10
AThicker|net@3|||FS2700|pin@9||-1|-1.25|pin@9||-1|-1.25|ART_color()I78
Eina||D5G1;|pin@2||I
Einb||D5G1;|pin@1||I
Eout||D5G1;|pin@0||O
X

# Cell nand2n_sy;1{sch}
Cnand2n_sy;1{sch}||schematic|1021415734000|1224793363940||ATTR_Delay(D5G1;HNPX-16.5;Y-6.5;)I100|ATTR_X(D5FLeave alone;G1;HNPX-16.5;Y-5.5;)I1|ATTR_drive0(D5G1;HNPTX-16.5;Y-7.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16.5;Y-8.5;)Sstrong1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-11.5|-1||||
NOff-Page|conn@1||10|0||||
NOff-Page|conn@2||-11.5|1||||
Inand2_sy;1{ic}|nand2_sy@0||0|0|||D0G4;|ATTR_Delay(D5G1;NOJPX2.5;Y-2.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOJPX2.5;Y2.5;)S@X|ATTR_drive0(OJP)S@drive0|ATTR_drive1(OJP)S@drive1|ATTR_LEPARALLGRP()I-1|ATTR_su(OJT)S@su
Inand2n_sy;1{ic}|nand2n_s@0||12.5|14|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;NPX2;Y2.5;)I1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ngeneric:Invisible-Pin|pin@0||-9|18.5|||||ART_message(D5G6;)S[nand2n_sy]
Ngeneric:Invisible-Pin|pin@1||-10|13.5|||||ART_message(D5G2;)S[duplilcate icon for nand2_sy]
Awire|net@0|||0|nand2_sy@0|inb|-2.5|1|conn@2|y|-9.5|1
Awire|net@1|||0|nand2_sy@0|ina|-2.5|-1|conn@0|y|-9.5|-1
Awire|net@2|||0|conn@1|a|8|0|nand2_sy@0|out|2.5|0
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@2|a|I
Eout||D5G2;|conn@1|y|O
X

# Cell nand3;1{ic}
Cnand3;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,4000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-0.5|0|6|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
NPin|pin@0||-0.25|-3|1|1||
NPin|pin@1||-1.5|-1.75|1|1||
Nschematic:Bus_Pin|pin@2||-2.5|-2|-2|-2||
NPin|pin@3||-1.5|-2|1|1||
NPin|pin@4||-2.5|-2||||
NPin|pin@5||-0.5|3|1|1||
Nschematic:Bus_Pin|pin@6||-2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@7||2.5|0|-2|-2||
NPin|pin@8||-1.5|3|1|1||
NPin|pin@9||-1.5|-3|1|1||
NPin|pin@10||-0.5|-3|1|1||
NPin|pin@11||-2.5|0||||
NPin|pin@12||-1.5|0|1|1||
Ngeneric:Invisible-Pin|pin@13||-2.5|2||||
NPin|pin@14||-1.5|2|1|1||
NPin|pin@15||-2.5|2||||
AThicker|net@0|||FS3150|pin@0||-0.25|-3|pin@1||-1.5|-1.75|ART_color()I10
AThicker|net@1|||FS0|pin@3||-1.5|-2|pin@4||-2.5|-2|ART_color()I10
AThicker|net@2|||FS0|pin@5||-0.5|3|pin@8||-1.5|3|ART_color()I10
AThicker|net@3|||FS2700|pin@9||-1.5|-3|pin@8||-1.5|3|ART_color()I10
AThicker|net@4|||FS0|pin@10||-0.5|-3|pin@9||-1.5|-3|ART_color()I10
AThicker|net@5|||FS0|pin@12||-1.5|0|pin@11||-2.5|0|ART_color()I10
AThicker|net@6|||FS0|pin@14||-1.5|2|pin@15||-2.5|2|ART_color()I10
Eina||D5G1;|pin@2||I
Einb||D5G1;|pin@6||I
Einc||D5G1;|pin@13||I
Eout||D5G1;|pin@7||O
X

# Cell nand3;1{sch}
Cnand3;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-29;Y-7;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-29;Y-6;)S1|ATTR_drive0(D5G1;HNPTX-29;Y-8;)Sstrong0|ATTR_drive1(D5G1;HNPTX-29;Y-9;)Sstrong1|ATTR_verilog_template(D5G1;NTX20.5;Y-17.5;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb), $(inc));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@3||-14|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@4||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@5||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-15|-12||||
NOff-Page|conn@1||14|-1|||RR|
NOff-Page|conn@2||0|14.5|||R|
NOff-Page|conn@3||-22|4||||
Inand3;1{ic}|nand3@0||27.5|19|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms3;1{ic}|nms3@0||0|-12|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2;Y0.5;)S@X
NWire_Pin|pin@0||-5|7.5||||
NWire_Pin|pin@1||-14|7.5||||
NWire_Pin|pin@2||4.5|7.5||||
Ngeneric:Invisible-Pin|pin@3||30|-10|||||ART_message(D5G2;)S[X is drive strength,Each pull-up has the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@4||-0.5|19.5|||||ART_message(D5G2;)S[P to N width ratio is 2 to 3]
NWire_Pin|pin@5||-9|4||||
NWire_Pin|pin@6||0|0||||
NWire_Pin|pin@7||-5|0||||
Ngeneric:Invisible-Pin|pin@8||-0.5|22|||||ART_message(D5G2;)S["three input, fixed-size NAND"]
NWire_Pin|pin@9||-9|-12||||
NWire_Pin|pin@10||4.5|0||||
NWire_Pin|pin@11||9|4||||
NWire_Pin|pin@12||9|-1||||
Ngeneric:Invisible-Pin|pin@13||-0.5|27|||||ART_message(D5G6;)S[nand3]
NWire_Pin|pin@14||-14|0||||
NWire_Pin|pin@15||-18|4||||
NWire_Pin|pin@16||-18|-4||||
NWire_Pin|pin@17||9|-8||||
NPower|pwr@0||-5|11.5||||
Awire|net@0|||2700|pin@17||9|-8|pin@12||9|-1
Awire|net@1|||0|nms3@0|g|-3|-12|pin@9||-9|-12
Awire|net@2|||2700|pin@0||-5|7.5|pwr@0||-5|11.5
Awire|net@3|||900|pin@0||-5|7.5|PMOS@5|s|-5|6
Awire|net@4|||1800|pin@1||-14|7.5|pin@0||-5|7.5
Awire|net@5|||1800|pin@0||-5|7.5|pin@2||4.5|7.5
Awire|net@6|||2700|PMOS@3|s|-14|6|pin@1||-14|7.5
Awire|net@7|||900|pin@2||4.5|7.5|PMOS@4|s|4.5|6
Awire|net@8|||0|PMOS@3|g|-17|4|pin@15||-18|4
Awire|net@9|||2700|pin@14||-14|0|PMOS@3|d|-14|2
Awire|net@10|||1800|PMOS@4|g|7.5|4|pin@11||9|4
Awire|net@11|||2700|pin@10||4.5|0|PMOS@4|d|4.5|2
Awire|net@12|||1800|pin@5||-9|4|PMOS@5|g|-8|4
Awire|net@13|||2700|pin@7||-5|0|PMOS@5|d|-5|2
Awire|net@14|||2700|pin@9||-9|-12|pin@5||-9|4
Awire|net@15|||2700|pin@6||0|0|conn@2|a|0|12.5
Awire|net@16|||0|pin@10||4.5|0|pin@6||0|0
Awire|net@17|||0|pin@6||0|0|pin@7||-5|0
Awire|net@18|||0|pin@9||-9|-12|conn@0|y|-13|-12
Awire|net@19|||2700|pin@12||9|-1|pin@11||9|4
Awire|net@20|||1800|pin@12||9|-1|conn@1|y|12|-1
Awire|net@21|||900|pin@6||0|0|nms3@0|d|0|-2
Awire|net@22|||0|pin@7||-5|0|pin@14||-14|0
Awire|net@23|||0|pin@15||-18|4|conn@3|y|-20|4
Awire|net@24|||2700|pin@16||-18|-4|pin@15||-18|4
Awire|net@25|||0|nms3@0|g3|-3|-4|pin@16||-18|-4
Awire|net@26|||0|pin@17||9|-8|nms3@0|g2|3|-8
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Einc||D5G2;|conn@3|y|I
Eout||D5G2;|conn@2|y|O
X

# Cell nand3LT;1{ic}
Cnand3LT;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,4000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NThick-Circle|art@2||-0.5|0|6|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NOpened-Thicker-Polygon|art@3||0|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,0.25/-0.5]
NPin|pin@0||-0.25|-3|1|1||
NPin|pin@1||-1.5|-1.75|1|1||
NPin|pin@2||-2.5|2||||
NPin|pin@3||-1.5|2|1|1||
Ngeneric:Invisible-Pin|pin@4||-2.5|2||||
NPin|pin@5||-1.5|0|1|1||
NPin|pin@6||-2.5|0||||
NPin|pin@7||-0.5|-3|1|1||
NPin|pin@8||-1.5|-3|1|1||
NPin|pin@9||-1.5|3|1|1||
Nschematic:Bus_Pin|pin@10||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@11||-2.5|0|-2|-2||
NPin|pin@12||-0.5|3|1|1||
NPin|pin@13||-2.5|-2||||
NPin|pin@14||-1.5|-2|1|1||
Nschematic:Bus_Pin|pin@15||-2.5|-2|-2|-2||
AThicker|net@0|||FS3150|pin@0||-0.25|-3|pin@1||-1.5|-1.75|ART_color()I10
AThicker|net@1|||FS0|pin@3||-1.5|2|pin@2||-2.5|2|ART_color()I10
AThicker|net@2|||FS0|pin@5||-1.5|0|pin@6||-2.5|0|ART_color()I10
AThicker|net@3|||FS0|pin@7||-0.5|-3|pin@8||-1.5|-3|ART_color()I10
AThicker|net@4|||FS2700|pin@8||-1.5|-3|pin@9||-1.5|3|ART_color()I10
AThicker|net@5|||FS0|pin@12||-0.5|3|pin@9||-1.5|3|ART_color()I10
AThicker|net@6|||FS0|pin@14||-1.5|-2|pin@13||-2.5|-2|ART_color()I10
Eina||D5G1;|pin@15||I
Einb||D5G1;|pin@11||I
Einc||D5G1;|pin@4||I
Eout||D5G1;|pin@10||O
X

# Cell nand3LT;1{sch}
Cnand3LT;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-30;Y-12.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-30;Y-11.5;)S1|ATTR_drive0(D5G1;HNPTX-30;Y-13.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-30;Y-14.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX19;Y-23;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb), $(inc));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@3||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/3.
IPMOS;1{ic}|PMOS@4||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/3.
IPMOS;1{ic}|PMOS@5||-14|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/3.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-28|4||||
NOff-Page|conn@1||0|11|||R|
NOff-Page|conn@2||17|4|||RR|
NOff-Page|conn@3||-27.5|-2.5||||
Inand3LT;1{ic}|nand3LT@0||35|19.5|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_LEGATE()I1|ATTR_su()I-1
Inms3;1{ic}|nms3@0||-5|-16.5|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2;Y0.5;)S@X
NWire_Pin|pin@0||-14|0||||
Ngeneric:Invisible-Pin|pin@1||-0.5|25|||||ART_message(D5G6;)S[nand3LT]
NWire_Pin|pin@2||10.5|4||||
NWire_Pin|pin@3||4.5|0||||
Ngeneric:Invisible-Pin|pin@4||-0.5|20|||||ART_message(D5G2;)S[one-parameter NAND]
NWire_Pin|pin@5||-5|0||||
NWire_Pin|pin@6||0|0||||
NWire_Pin|pin@7||-9|4||||
Ngeneric:Invisible-Pin|pin@8||-0.5|18|||||ART_message(D5G2;)S[P to N width ratio is 2/3 to 3]
Ngeneric:Invisible-Pin|pin@9||28.5|-16|||||ART_message(D5G2;)S[X is drive strength,Three pull-ups have the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@10||-1|15.5|||||ART_message(D5G2;)S[Sized assuming that all 3 inputs go low together]
NWire_Pin|pin@11||-14|7.5||||
NWire_Pin|pin@12||4.5|7.5||||
NWire_Pin|pin@13||-5|7.5||||
NWire_Pin|pin@14||-9|-2.5||||
NWire_Pin|pin@15||-21.5|-2.5||||
NWire_Pin|pin@16||-19.5|4||||
NWire_Pin|pin@17||10.5|-12.5||||
NWire_Pin|pin@18||-21.5|-16.5||||
NWire_Pin|pin@19||-19.5|-8.5||||
NPower|pwr@0||-5|10.5||||
Awire|net@0|||2700|nms3@0|d|-5|-6.5|pin@5||-5|0
Awire|net@1|||1800|pin@19||-19.5|-8.5|nms3@0|g3|-8|-8.5
Awire|net@2|||0|pin@17||10.5|-12.5|nms3@0|g2|-2|-12.5
Awire|net@3|||1800|pin@18||-21.5|-16.5|nms3@0|g|-8|-16.5
Awire|net@4|||0|pin@5||-5|0|pin@0||-14|0
Awire|net@5|||1800|pin@2||10.5|4|conn@2|y|15|4
Awire|net@6|||0|pin@6||0|0|pin@5||-5|0
Awire|net@7|||0|pin@3||4.5|0|pin@6||0|0
Awire|net@8|||2700|pin@6||0|0|conn@1|a|0|9
Awire|net@9|||0|pin@13||-5|7.5|pin@11||-14|7.5
Awire|net@10|||0|pin@12||4.5|7.5|pin@13||-5|7.5
Awire|net@11|||2700|pin@13||-5|7.5|pwr@0||-5|10.5
Awire|net@12|||2700|pin@14||-9|-2.5|pin@7||-9|4
Awire|net@13|||0|pin@15||-21.5|-2.5|conn@3|y|-25.5|-2.5
Awire|net@14|||0|pin@14||-9|-2.5|pin@15||-21.5|-2.5
Awire|net@15|||1800|conn@0|y|-26|4|pin@16||-19.5|4
Awire|net@16|||2700|pin@3||4.5|0|PMOS@3|d|4.5|2
Awire|net@17|||0|pin@2||10.5|4|PMOS@3|g|7.5|4
Awire|net@18|||2700|PMOS@3|s|4.5|6|pin@12||4.5|7.5
Awire|net@19|||2700|pin@5||-5|0|PMOS@4|d|-5|2
Awire|net@20|||1800|pin@7||-9|4|PMOS@4|g|-8|4
Awire|net@21|||900|pin@13||-5|7.5|PMOS@4|s|-5|6
Awire|net@22|||2700|pin@0||-14|0|PMOS@5|d|-14|2
Awire|net@23|||1800|pin@16||-19.5|4|PMOS@5|g|-17|4
Awire|net@24|||900|pin@11||-14|7.5|PMOS@5|s|-14|6
Awire|net@25|||2700|pin@17||10.5|-12.5|pin@2||10.5|4
Awire|net@26|||900|pin@15||-21.5|-2.5|pin@18||-21.5|-16.5
Awire|net@27|||900|pin@16||-19.5|4|pin@19||-19.5|-8.5
Eina||D5G2;|conn@3|a|I
Einb||D5G2;|conn@2|a|I
Einc||D5G2;|conn@0|y|I
Eout||D5G2;|conn@1|y|O
X

# Cell nand3LT_sy3;1{ic}
Cnand3LT_sy3;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,4000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||0|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,0.25/-0.5]
NThick-Circle|art@2||-0.5|0|6|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||-2.5|-2|-2|-2||
NPin|pin@1||-1.5|-2|1|1||
NPin|pin@2||-2.5|-2||||
NPin|pin@3||-0.5|3|1|1||
Nschematic:Bus_Pin|pin@4||-2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
NPin|pin@6||-1.5|3|1|1||
NPin|pin@7||-1.5|-3|1|1||
NPin|pin@8||-0.5|-3|1|1||
NPin|pin@9||-2.5|0||||
NPin|pin@10||-1.5|0|1|1||
Ngeneric:Invisible-Pin|pin@11||-2.5|2||||
NPin|pin@12||-1.5|2|1|1||
NPin|pin@13||-2.5|2||||
Ngeneric:Invisible-Pin|pin@14||-0.5|-2.5|||||ART_message(D5G1;)S[sy3]
AThicker|net@0|||FS0|pin@1||-1.5|-2|pin@2||-2.5|-2|ART_color()I10
AThicker|net@1|||FS0|pin@3||-0.5|3|pin@6||-1.5|3|ART_color()I10
AThicker|net@2|||FS2700|pin@7||-1.5|-3|pin@6||-1.5|3|ART_color()I10
AThicker|net@3|||FS0|pin@8||-0.5|-3|pin@7||-1.5|-3|ART_color()I10
AThicker|net@4|||FS0|pin@10||-1.5|0|pin@9||-2.5|0|ART_color()I10
AThicker|net@5|||FS0|pin@12||-1.5|2|pin@13||-2.5|2|ART_color()I10
Eina||D5G1;|pin@0||I
Einb||D5G1;|pin@4||I
Einc||D5G1;|pin@11||I
Eout||D5G1;|pin@5||O
X

# Cell nand3LT_sy3;1{sch}
Cnand3LT_sy3;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-30;Y-12.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-30;Y-11.5;)S1|ATTR_drive0(D5G1;HNPTX-30;Y-13.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-30;Y-14.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX19;Y-24;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb), $(inc));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@3||-14|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/3.
IPMOS;1{ic}|PMOS@4||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/3.
IPMOS;1{ic}|PMOS@5||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/3.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-34.5|-2.5||||
NOff-Page|conn@1||24|-12.5|||RR|
NOff-Page|conn@2||27|0||||
NOff-Page|conn@3||-35|4||||
Inand3LT_sy3;1{ic}|nand3LT_@0||35|19.5|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_LEGATE()I1|ATTR_su()I-1
Inms3_sy3;1{ic}|nms3_sy3@0||-10|-16.5|||D0G4;|ATTR_Delay(D5G1;NOJPX-8.5;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-8.5;Y1;)S@X
NWire_Pin|pin@10||-19.5|-8.5||||
NWire_Pin|pin@11||-21.5|-16.5||||
NWire_Pin|pin@12||10.5|-12.5||||
NWire_Pin|pin@13||-19.5|4||||
NWire_Pin|pin@14||-21.5|-2.5||||
NWire_Pin|pin@15||-9|-2.5||||
NWire_Pin|pin@16||-5|7.5||||
NWire_Pin|pin@17||4.5|7.5||||
NWire_Pin|pin@18||-14|7.5||||
Ngeneric:Invisible-Pin|pin@19||0|16.5|||||ART_message(D5G2;)S[Sized assuming that all 3 inputs go low together]
Ngeneric:Invisible-Pin|pin@20||28.5|-19|||||ART_message(D5G2;)S[X is drive strength,Three pull-ups have the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@21||-0.5|18|||||ART_message(D5G2;)S[P to N width ratio is 2/3 to 3]
NWire_Pin|pin@22||-9|4||||
NWire_Pin|pin@23||-5|0||||
Ngeneric:Invisible-Pin|pin@24||-0.5|20|||||ART_message(D5G2;)S[one-parameter NAND]
NWire_Pin|pin@25||4.5|0||||
NWire_Pin|pin@26||10.5|4||||
Ngeneric:Invisible-Pin|pin@27||-0.5|25|||||ART_message(D5G6;)S[nand3LT_sy3]
NWire_Pin|pin@28||-14|0||||
NPower|pwr@0||-5|10.5||||
Awire|net@16|||1800|pin@23||-5|0|pin@25||4.5|0
Awire|net@25|||1800|pin@10||-19.5|-8.5|nms3_sy3@0|g3|-13|-8.5
Awire|net@26|||900|pin@13||-19.5|4|pin@10||-19.5|-8.5
Awire|net@27|||1800|pin@11||-21.5|-16.5|nms3_sy3@0|g|-13|-16.5
Awire|net@28|||900|pin@14||-21.5|-2.5|pin@11||-21.5|-16.5
Awire|net@29|||0|pin@12||10.5|-12.5|nms3_sy3@0|g2|1.5|-12.5
Awire|net@30|||2700|pin@12||10.5|-12.5|pin@26||10.5|4
Awire|net@31|||900|pin@23||-5|0|nms3_sy3@0|d|-5|-5.5
Awire|net@32|||900|pin@18||-14|7.5|PMOS@3|s|-14|6
Awire|net@33|||1800|pin@13||-19.5|4|PMOS@3|g|-17|4
Awire|net@34|||2700|pin@28||-14|0|PMOS@3|d|-14|2
Awire|net@35|||900|pin@16||-5|7.5|PMOS@4|s|-5|6
Awire|net@36|||1800|pin@22||-9|4|PMOS@4|g|-8|4
Awire|net@37|||2700|pin@23||-5|0|PMOS@4|d|-5|2
Awire|net@38|||2700|PMOS@5|s|4.5|6|pin@17||4.5|7.5
Awire|net@39|||0|pin@26||10.5|4|PMOS@5|g|7.5|4
Awire|net@40|||2700|pin@25||4.5|0|PMOS@5|d|4.5|2
Awire|net@41|||0|pin@15||-9|-2.5|pin@14||-21.5|-2.5
Awire|net@42|||2700|pin@15||-9|-2.5|pin@22||-9|4
Awire|net@43|||2700|pin@16||-5|7.5|pwr@0||-5|10.5
Awire|net@44|||0|pin@17||4.5|7.5|pin@16||-5|7.5
Awire|net@45|||0|pin@16||-5|7.5|pin@18||-14|7.5
Awire|net@46|||0|pin@23||-5|0|pin@28||-14|0
Awire|net@47|||0|conn@2|a|25|0|pin@25||4.5|0
Awire|net@48|||0|conn@1|y|22|-12.5|pin@12||10.5|-12.5
Awire|net@49|||0|pin@13||-19.5|4|conn@3|y|-33|4
Awire|net@50|||1800|conn@0|y|-32.5|-2.5|pin@14||-21.5|-2.5
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Einc||D5G2;|conn@3|y|I
Eout||D5G2;|conn@2|y|O
X

# Cell nand3LT_sy6;1{ic}
Cnand3LT_sy6;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX4;Y-2.5;)I100|ATTR_X(D5G1.5;HNPX3;Y2.5;)I1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,4000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||0|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,0.25/-0.5]
NThick-Circle|art@2||-0.5|0|6|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||-2.5|-2|-2|-2||
NPin|pin@1||-1.5|-2|1|1||
NPin|pin@2||-2.5|-2||||
NPin|pin@3||-0.5|3|1|1||
Nschematic:Bus_Pin|pin@4||-2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
NPin|pin@6||-1.5|3|1|1||
NPin|pin@7||-1.5|-3|1|1||
NPin|pin@8||-0.5|-3|1|1||
NPin|pin@9||-2.5|0||||
NPin|pin@10||-1.5|0|1|1||
Ngeneric:Invisible-Pin|pin@11||-2.5|2||||
NPin|pin@12||-1.5|2|1|1||
NPin|pin@13||-2.5|2||||
Ngeneric:Invisible-Pin|pin@14||-0.5|-2.5|||||ART_message(D5G1;)Ssy6
AThicker|net@0|||FS1800|pin@2||-2.5|-2|pin@1||-1.5|-2|ART_color()I10
AThicker|net@1|||FS1800|pin@6||-1.5|3|pin@3||-0.5|3|ART_color()I10
AThicker|net@2|||FS900|pin@6||-1.5|3|pin@7||-1.5|-3|ART_color()I10
AThicker|net@3|||FS1800|pin@7||-1.5|-3|pin@8||-0.5|-3|ART_color()I10
AThicker|net@4|||FS1800|pin@9||-2.5|0|pin@10||-1.5|0|ART_color()I10
AThicker|net@5|||FS1800|pin@13||-2.5|2|pin@12||-1.5|2|ART_color()I10
Eina||D5G1;|pin@0||I
Einb||D5G1;|pin@4||I
Einc||D5G1;|pin@11||I
Eout||D5G1;|pin@5||O
X

# Cell nand3LT_sy6;1{sch}
Cnand3LT_sy6;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-30;Y-12.5;)I100|ATTR_X(D5G1;HNPX-30;Y-11.5;)I1|ATTR_drive0(D5G1;HNPTX-30;Y-13.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-30;Y-14.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX19;Y-24;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb), $(inc));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@3||-14|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X/3.
IPMOS;1{ic}|PMOS@4||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X/3.
IPMOS;1{ic}|PMOS@5||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X/3.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@1||24|-12.5|||RR|
NOff-Page|conn@2||27|0||||
NOff-Page|conn@3||-35|4||||
NOff-Page|conn@4||-35|-2.5||||
Inand3LT_sy6;1{ic}|nand3LT_@0||35|19.5|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-2.5;)I100|ATTR_X(D5G1.5;NPX3;Y2.5;)I1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_LEGATE()I1|ATTR_su()I-1
Inms3_sy6;1{ic}|nms3_sy3@0||-10|-16.5|||D0G4;|ATTR_Delay(D5G1;NOJPX-8.5;Y-1.5;)S@Delay|ATTR_X(D5G1.5;NOJPX-8.5;Y2;)S@X
NWire_Pin|pin@10||-19.5|-8.5||||
NWire_Pin|pin@11||-21.5|-16.5||||
NWire_Pin|pin@12||10.5|-12.5||||
NWire_Pin|pin@13||-19.5|4||||
NWire_Pin|pin@14||-21.5|-2.5||||
NWire_Pin|pin@15||-9|-2.5||||
NWire_Pin|pin@16||-5|7.5||||
NWire_Pin|pin@17||4.5|7.5||||
NWire_Pin|pin@18||-14|7.5||||
Ngeneric:Invisible-Pin|pin@19||0|16.5|||||ART_message(D5G2;)S[Sized assuming that all 3 inputs go low together]
Ngeneric:Invisible-Pin|pin@20||28.5|-19|||||ART_message(D5G2;)S[X is drive strength,Three pull-ups have the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@21||-0.5|18|||||ART_message(D5G2;)S[P to N width ratio is 2/3 to 3]
NWire_Pin|pin@22||-9|4||||
NWire_Pin|pin@23||-5|0||||
Ngeneric:Invisible-Pin|pin@24||-0.5|20|||||ART_message(D5G2;)S[one-parameter NAND]
NWire_Pin|pin@25||4.5|0||||
NWire_Pin|pin@26||10.5|4||||
Ngeneric:Invisible-Pin|pin@27||-0.5|25|||||ART_message(D5G6;)Snand3LT_sy6
NWire_Pin|pin@28||-14|0||||
NPower|pwr@0||-5|10.5||||
Awire|net@16|||0|pin@25||4.5|0|pin@23||-5|0
Awire|net@25|||1800|pin@10||-19.5|-8.5|nms3_sy3@0|g3|-7.5|-8.5
Awire|net@26|||2700|pin@10||-19.5|-8.5|pin@13||-19.5|4
Awire|net@27|||1800|pin@11||-21.5|-16.5|nms3_sy3@0|g|-7.5|-16.5
Awire|net@28|||2700|pin@11||-21.5|-16.5|pin@14||-21.5|-2.5
Awire|net@29|||0|pin@12||10.5|-12.5|nms3_sy3@0|g2|-2.5|-12.5
Awire|net@30|||900|pin@26||10.5|4|pin@12||10.5|-12.5
Awire|net@31|||900|pin@23||-5|0|nms3_sy3@0|d|-5|-5.5
Awire|net@32|||2700|PMOS@3|s|-14|6|pin@18||-14|7.5
Awire|net@33|||0|PMOS@3|g|-17|4|pin@13||-19.5|4
Awire|net@34|||900|PMOS@3|d|-14|2|pin@28||-14|0
Awire|net@35|||2700|PMOS@4|s|-5|6|pin@16||-5|7.5
Awire|net@36|||0|PMOS@4|g|-8|4|pin@22||-9|4
Awire|net@37|||900|PMOS@4|d|-5|2|pin@23||-5|0
Awire|net@38|||900|pin@17||4.5|7.5|PMOS@5|s|4.5|6
Awire|net@39|||1800|PMOS@5|g|7.5|4|pin@26||10.5|4
Awire|net@40|||900|PMOS@5|d|4.5|2|pin@25||4.5|0
Awire|net@41|||1800|pin@14||-21.5|-2.5|pin@15||-9|-2.5
Awire|net@42|||900|pin@22||-9|4|pin@15||-9|-2.5
Awire|net@43|||900|pwr@0||-5|10.5|pin@16||-5|7.5
Awire|net@44|||1800|pin@16||-5|7.5|pin@17||4.5|7.5
Awire|net@45|||1800|pin@18||-14|7.5|pin@16||-5|7.5
Awire|net@46|||1800|pin@28||-14|0|pin@23||-5|0
Awire|net@47|||1800|pin@25||4.5|0|conn@2|a|25|0
Awire|net@48|||1800|pin@12||10.5|-12.5|conn@1|y|22|-12.5
Awire|net@49|||1800|conn@3|y|-33|4|pin@13||-19.5|4
Awire|net@50|||1800|conn@4|y|-33|-2.5|pin@14||-21.5|-2.5
Eina||D5G2;|conn@4|y|I
Einb||D5G2;|conn@1|a|I
Einc||D5G2;|conn@3|y|I
Eout||D5G2;|conn@2|y|O
X

# Cell nand3LTen;1{ic}
Cnand3LTen;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,4000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||0|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,0.25/-0.5]
NThick-Circle|art@2||-0.5|0|6|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
Ngeneric:Invisible-Pin|pin@0||-0.5|-2.25|||||ART_message(D5G1.5;)S[en]
Nschematic:Bus_Pin|pin@1||-2.5|-2|-2|-2||
NPin|pin@2||-1.5|-2|1|1||
NPin|pin@3||-2.5|-2||||
NPin|pin@4||-0.5|3|1|1||
Nschematic:Bus_Pin|pin@5||-2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@6||2.5|0|-2|-2||
NPin|pin@7||-1.5|3|1|1||
NPin|pin@8||-1.5|-3|1|1||
NPin|pin@9||-0.5|-3|1|1||
NPin|pin@10||-2.5|0||||
NPin|pin@11||-1.5|0|1|1||
Ngeneric:Invisible-Pin|pin@12||-2.5|2||||
NPin|pin@13||-1.5|2|1|1||
NPin|pin@14||-2.5|2||||
NPin|pin@15||-1.5|-1.75|1|1||
NPin|pin@16||-0.25|-3|1|1||
AThicker|net@0|||FS0|pin@2||-1.5|-2|pin@3||-2.5|-2|ART_color()I10
AThicker|net@1|||FS0|pin@4||-0.5|3|pin@7||-1.5|3|ART_color()I10
AThicker|net@2|||FS2700|pin@8||-1.5|-3|pin@7||-1.5|3|ART_color()I10
AThicker|net@3|||FS0|pin@9||-0.5|-3|pin@8||-1.5|-3|ART_color()I10
AThicker|net@4|||FS0|pin@11||-1.5|0|pin@10||-2.5|0|ART_color()I10
AThicker|net@5|||FS0|pin@13||-1.5|2|pin@14||-2.5|2|ART_color()I10
AThicker|net@6|||FS3150|pin@16||-0.25|-3|pin@15||-1.5|-1.75|ART_color()I10
Eina||D5G1;|pin@1||I
Einb||D5G1;|pin@5||I
Einc||D5G1;|pin@12||I
Eout||D5G1;|pin@6||O
X

# Cell nand3LTen;1{sch}
Cnand3LTen;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-30;Y-12.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-30;Y-11.5;)S1|ATTR_drive0(D5G1;HNPTX-30;Y-13.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-30;Y-14.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX19;Y-23;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb), $(inc));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@3||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX1.5;Y2.5;)Smax(@X/20., 5./6.)
IPMOS;1{ic}|PMOS@4||-14|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/2.
IPMOS;1{ic}|PMOS@5||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/2.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-27.5|-2.5||||
NOff-Page|conn@1||17|4|||RR|
NOff-Page|conn@2||0|11|||R|
NOff-Page|conn@3||-28|4||||
Inand3LTen;1{ic}|nand3LTe@0||44|9|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_LEGATE()I1|ATTR_su()I-1
Inms3;1{ic}|nms3@0||-5|-16.5|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2;Y0.5;)S@X
Ngeneric:Invisible-Pin|pin@0||0|20.5|||||ART_message(D5G2;)S["three input, fixed-size low-threshold NAND where ina is DC signal (enable)"]
NWire_Pin|pin@1||-19.5|-8.5||||
NWire_Pin|pin@2||-21.5|-16.5||||
NWire_Pin|pin@3||10.5|-12.5||||
NWire_Pin|pin@4||-19.5|4||||
NWire_Pin|pin@5||-21.5|-2.5||||
NWire_Pin|pin@6||-9|-2.5||||
NWire_Pin|pin@7||-5|7.5||||
NWire_Pin|pin@8||4.5|7.5||||
NWire_Pin|pin@9||-14|7.5||||
Ngeneric:Invisible-Pin|pin@10||-1|15.5|||||ART_message(D5G2;)S[Sized assuming that all 3 inputs go low together (but one p/u is weak)]
Ngeneric:Invisible-Pin|pin@11||28.5|-16|||||ART_message(D5G2;)S[X is drive strength,Two pull-ups have the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@12||-0.5|18|||||ART_message(D5G2;)S[P to N width ratio is 1 to 3]
NWire_Pin|pin@13||-9|4||||
NWire_Pin|pin@14||0|0||||
NWire_Pin|pin@15||-5|0||||
NWire_Pin|pin@16||4.5|0||||
NWire_Pin|pin@17||10.5|4||||
Ngeneric:Invisible-Pin|pin@18||-0.5|25|||||ART_message(D5G6;)S[nand3LTen]
NWire_Pin|pin@19||-14|0||||
NPower|pwr@0||-5|10.5||||
Awire|net@0|||900|pin@7||-5|7.5|PMOS@3|s|-5|6
Awire|net@1|||1800|pin@13||-9|4|PMOS@3|g|-8|4
Awire|net@2|||2700|pin@15||-5|0|PMOS@3|d|-5|2
Awire|net@3|||900|pin@15||-5|0|nms3@0|d|-5|-6.5
Awire|net@4|||900|pin@4||-19.5|4|pin@1||-19.5|-8.5
Awire|net@5|||900|pin@5||-21.5|-2.5|pin@2||-21.5|-16.5
Awire|net@6|||2700|pin@3||10.5|-12.5|pin@17||10.5|4
Awire|net@7|||900|pin@9||-14|7.5|PMOS@4|s|-14|6
Awire|net@8|||1800|pin@4||-19.5|4|PMOS@4|g|-17|4
Awire|net@9|||2700|pin@19||-14|0|PMOS@4|d|-14|2
Awire|net@10|||2700|PMOS@5|s|4.5|6|pin@8||4.5|7.5
Awire|net@11|||0|pin@17||10.5|4|PMOS@5|g|7.5|4
Awire|net@12|||2700|pin@16||4.5|0|PMOS@5|d|4.5|2
Awire|net@13|||1800|conn@3|y|-26|4|pin@4||-19.5|4
Awire|net@14|||0|pin@6||-9|-2.5|pin@5||-21.5|-2.5
Awire|net@15|||0|pin@5||-21.5|-2.5|conn@0|y|-25.5|-2.5
Awire|net@16|||2700|pin@6||-9|-2.5|pin@13||-9|4
Awire|net@17|||2700|pin@7||-5|7.5|pwr@0||-5|10.5
Awire|net@18|||0|pin@8||4.5|7.5|pin@7||-5|7.5
Awire|net@19|||0|pin@7||-5|7.5|pin@9||-14|7.5
Awire|net@20|||2700|pin@14||0|0|conn@2|a|0|9
Awire|net@21|||0|pin@16||4.5|0|pin@14||0|0
Awire|net@22|||0|pin@14||0|0|pin@15||-5|0
Awire|net@23|||1800|pin@17||10.5|4|conn@1|y|15|4
Awire|net@24|||0|pin@15||-5|0|pin@19||-14|0
Awire|net@25|||1800|pin@2||-21.5|-16.5|nms3@0|g|-8|-16.5
Awire|net@26|||0|pin@3||10.5|-12.5|nms3@0|g2|-2|-12.5
Awire|net@27|||1800|pin@1||-19.5|-8.5|nms3@0|g3|-8|-8.5
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Einc||D5G2;|conn@3|y|I
Eout||D5G2;|conn@2|y|O
X

# Cell nand3LTen_sy;1{ic}
Cnand3LTen_sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,4000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NThick-Circle|art@2||-0.5|0|6|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NOpened-Thicker-Polygon|art@3||0|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,0.25/-0.5]
Ngeneric:Invisible-Pin|pin@0||-0.5|1|||||ART_message(D5G1;)S[sy2]
NPin|pin@1||-0.25|-3|1|1||
NPin|pin@2||-1.5|-1.75|1|1||
NPin|pin@3||-2.5|2||||
NPin|pin@4||-1.5|2|1|1||
Ngeneric:Invisible-Pin|pin@5||-2.5|2||||
NPin|pin@6||-1.5|0|1|1||
NPin|pin@7||-2.5|0||||
NPin|pin@8||-0.5|-3|1|1||
NPin|pin@9||-1.5|-3|1|1||
NPin|pin@10||-1.5|3|1|1||
Nschematic:Bus_Pin|pin@11||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@12||-2.5|0|-2|-2||
NPin|pin@13||-0.5|3|1|1||
NPin|pin@14||-2.5|-2||||
NPin|pin@15||-1.5|-2|1|1||
Nschematic:Bus_Pin|pin@16||-2.5|-2|-2|-2||
Ngeneric:Invisible-Pin|pin@17||-0.5|-2.25|||||ART_message(D5G1.5;)S[en]
AThicker|net@0|||FS3150|pin@1||-0.25|-3|pin@2||-1.5|-1.75|ART_color()I10
AThicker|net@1|||FS0|pin@4||-1.5|2|pin@3||-2.5|2|ART_color()I10
AThicker|net@2|||FS0|pin@6||-1.5|0|pin@7||-2.5|0|ART_color()I10
AThicker|net@3|||FS0|pin@8||-0.5|-3|pin@9||-1.5|-3|ART_color()I10
AThicker|net@4|||FS2700|pin@9||-1.5|-3|pin@10||-1.5|3|ART_color()I10
AThicker|net@5|||FS0|pin@13||-0.5|3|pin@10||-1.5|3|ART_color()I10
AThicker|net@6|||FS0|pin@15||-1.5|-2|pin@14||-2.5|-2|ART_color()I10
Eina||D5G1;|pin@16||I
Einb||D5G1;|pin@12||I
Einc||D5G1;|pin@5||I
Eout||D5G1;|pin@11||O
X

# Cell nand3LTen_sy;1{sch}
Cnand3LTen_sy;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-30;Y-12.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-30;Y-11.5;)S1|ATTR_drive0(D5G1;HNPTX-30;Y-13.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-30;Y-14.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX19;Y-23;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb), $(inc));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@3||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX2;Y2.5;)Smax(@X/20., 5./6.)
IPMOS;1{ic}|PMOS@4||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/2.
IPMOS;1{ic}|PMOS@5||-14|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/2.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-28|4||||
NOff-Page|conn@1||0|11|||R|
NOff-Page|conn@2||17|4|||RR|
NOff-Page|conn@3||-27.5|-2.5||||
Inand3LTen_sy;1{ic}|nand3LTe@0||40.5|8.5|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_LEGATE()I1|ATTR_su()I-1
Inms3_2sy;1{ic}|nms3_2sy@0||-5|-16.5|||D0G4;|ATTR_Delay(D5G1;NOJPX5;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S@X
NWire_Pin|pin@0||-14|0||||
Ngeneric:Invisible-Pin|pin@1||-0.5|25|||||ART_message(D5G6;)S[nand3LTen_sy]
NWire_Pin|pin@2||10.5|4||||
NWire_Pin|pin@3||4.5|0||||
NWire_Pin|pin@4||-5|0||||
NWire_Pin|pin@5||0|0||||
NWire_Pin|pin@6||-9|4||||
Ngeneric:Invisible-Pin|pin@7||-0.5|18|||||ART_message(D5G2;)S[P to N width ratio is 1 to 3]
Ngeneric:Invisible-Pin|pin@8||28.5|-16|||||ART_message(D5G2;)S[X is drive strength,Two pull-ups have the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@9||-1|15.5|||||ART_message(D5G2;)S[Sized assuming that all 3 inputs go low together (but one p/u is weak)]
NWire_Pin|pin@10||-14|7.5||||
NWire_Pin|pin@11||4.5|7.5||||
NWire_Pin|pin@12||-5|7.5||||
NWire_Pin|pin@13||-9|-2.5||||
NWire_Pin|pin@14||-21.5|-2.5||||
NWire_Pin|pin@15||-19.5|4||||
NWire_Pin|pin@16||10.5|-12.5||||
NWire_Pin|pin@17||-21.5|-16.5||||
NWire_Pin|pin@18||-19.5|-8.5||||
Ngeneric:Invisible-Pin|pin@19||0|20.5|||||ART_message(D5G2;)S["three input, fixed-size low-threshold NAND where ina is DC signal (enable) and inb/c are symmetric"]
NPower|pwr@0||-5|10.5||||
Awire|net@0|||900|pin@12||-5|7.5|PMOS@3|s|-5|6
Awire|net@1|||1800|pin@6||-9|4|PMOS@3|g|-8|4
Awire|net@2|||2700|pin@4||-5|0|PMOS@3|d|-5|2
Awire|net@3|||900|pin@4||-5|0|nms3_2sy@0|d|-5|-6.5
Awire|net@4|||0|nms3_2sy@0|g|-7.25|-16.5|pin@17||-21.5|-16.5
Awire|net@5|||1800|nms3_2sy@0|g2|-2|-12.5|pin@16||10.5|-12.5
Awire|net@6|||0|nms3_2sy@0|g3|-8|-8.5|pin@18||-19.5|-8.5
Awire|net@7|||0|pin@4||-5|0|pin@0||-14|0
Awire|net@8|||1800|pin@2||10.5|4|conn@2|y|15|4
Awire|net@9|||0|pin@5||0|0|pin@4||-5|0
Awire|net@10|||0|pin@3||4.5|0|pin@5||0|0
Awire|net@11|||2700|pin@5||0|0|conn@1|a|0|9
Awire|net@12|||0|pin@12||-5|7.5|pin@10||-14|7.5
Awire|net@13|||0|pin@11||4.5|7.5|pin@12||-5|7.5
Awire|net@14|||2700|pin@12||-5|7.5|pwr@0||-5|10.5
Awire|net@15|||2700|pin@13||-9|-2.5|pin@6||-9|4
Awire|net@16|||0|pin@14||-21.5|-2.5|conn@3|y|-25.5|-2.5
Awire|net@17|||0|pin@13||-9|-2.5|pin@14||-21.5|-2.5
Awire|net@18|||1800|conn@0|y|-26|4|pin@15||-19.5|4
Awire|net@19|||2700|pin@3||4.5|0|PMOS@4|d|4.5|2
Awire|net@20|||0|pin@2||10.5|4|PMOS@4|g|7.5|4
Awire|net@21|||2700|PMOS@4|s|4.5|6|pin@11||4.5|7.5
Awire|net@22|||2700|pin@0||-14|0|PMOS@5|d|-14|2
Awire|net@23|||1800|pin@15||-19.5|4|PMOS@5|g|-17|4
Awire|net@24|||900|pin@10||-14|7.5|PMOS@5|s|-14|6
Awire|net@25|||2700|pin@16||10.5|-12.5|pin@2||10.5|4
Awire|net@26|||900|pin@14||-21.5|-2.5|pin@17||-21.5|-16.5
Awire|net@27|||900|pin@15||-19.5|4|pin@18||-19.5|-8.5
Eina||D5G2;|conn@3|a|I
Einb||D5G2;|conn@2|a|I
Einc||D5G2;|conn@0|y|I
Eout||D5G2;|conn@1|y|O
X

# Cell nand3MLT;1{ic}
Cnand3MLT;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,4000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||-0.5|0|1|1|||ART_color()I10|trace()V[-0.5/-0.5,-0.5/0.5,0/-0.5,0.5/0.5,0.5/-0.5]
NOpened-Thicker-Polygon|art@2||0.75|0|0.5|1|||ART_color()I10|trace()V[-0.25/0.5,-0.25/-0.5,0.25/-0.5]
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
NThick-Circle|art@4||-0.5|0|6|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NPin|pin@0||-2.5|2||||
NPin|pin@1||-1.5|2|1|1||
Ngeneric:Invisible-Pin|pin@2||-2.5|2||||
NPin|pin@3||-1.5|0|1|1||
NPin|pin@4||-2.5|0||||
NPin|pin@5||-0.5|-3|1|1||
NPin|pin@6||-1.5|-3|1|1||
NPin|pin@7||-1.5|3|1|1||
Nschematic:Bus_Pin|pin@8||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@9||-2.5|0|-2|-2||
NPin|pin@10||-0.5|3|1|1||
NPin|pin@11||-2.5|-2||||
NPin|pin@12||-1.5|-2|1|1||
Nschematic:Bus_Pin|pin@13||-2.5|-2|-2|-2||
NPin|pin@14||-1.5|-1.75|1|1||
NPin|pin@15||-0.25|-3|1|1||
AThicker|net@0|||FS0|pin@1||-1.5|2|pin@0||-2.5|2|ART_color()I10
AThicker|net@1|||FS0|pin@3||-1.5|0|pin@4||-2.5|0|ART_color()I10
AThicker|net@2|||FS0|pin@5||-0.5|-3|pin@6||-1.5|-3|ART_color()I10
AThicker|net@3|||FS2700|pin@6||-1.5|-3|pin@7||-1.5|3|ART_color()I10
AThicker|net@4|||FS0|pin@10||-0.5|3|pin@7||-1.5|3|ART_color()I10
AThicker|net@5|||FS0|pin@12||-1.5|-2|pin@11||-2.5|-2|ART_color()I10
AThicker|net@6|||FS3150|pin@15||-0.25|-3|pin@14||-1.5|-1.75|ART_color()I10
Eina||D5G1;|pin@13||I
Einb||D5G1;|pin@9||I
Einc||D5G1;|pin@2||I
Eout||D5G1;|pin@8||O
X

# Cell nand3MLT;1{sch}
Cnand3MLT;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-29;Y-7;)I100|ATTR_X(D5G1;HNOLPX-29;Y-6;)S1|ATTR_drive0(D5G1;HNPTX-29;Y-8;)Sstrong0|ATTR_drive1(D5G1;HNPTX-29;Y-9;)Sstrong1|ATTR_verilog_template(D5G1;NTX20.5;Y-17.5;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb), $(inc));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@3||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/2.
IPMOS;1{ic}|PMOS@4||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/2.
IPMOS;1{ic}|PMOS@5||-14|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/2.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-34.5|4||||
NOff-Page|conn@1||28.5|10||||
NOff-Page|conn@2||23|-1|||RR|
NOff-Page|conn@3||-23|-12||||
Inand3MLT;1{ic}|nand3MLT@0||38|26|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms3;1{ic}|nms3@0||0|-12|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2;Y0.5;)S@X
NWire_Pin|pin@15||0|10||||
Ngeneric:Invisible-Pin|pin@26||33|-10.5|||||ART_message(D5G2;)S[X is drive strength,Two pull-ups have the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@27||0|21|||||ART_message(D5G2;)S[Sized assuming at least 2 of 3 inputs go low together]
Ngeneric:Invisible-Pin|pin@28||-0.5|23|||||ART_message(D5G2;)S[P to N width ratio is 1 to 3]
NWire_Pin|pin@29||9|-8||||
NWire_Pin|pin@30||-18|-4||||
NWire_Pin|pin@31||-18|4||||
NWire_Pin|pin@32||-14|0||||
Ngeneric:Invisible-Pin|pin@33||-0.5|30|||||ART_message(D5G6;)S[nand3MLT]
NWire_Pin|pin@34||9|4||||
NWire_Pin|pin@35||4.5|0||||
Ngeneric:Invisible-Pin|pin@36||-0.5|25|||||ART_message(D5G2;)S["three input, fixed-size NAND"]
NWire_Pin|pin@37||-5|0||||
NWire_Pin|pin@38||0|0||||
NWire_Pin|pin@39||-9|4||||
NWire_Pin|pin@40||-9|-12||||
NWire_Pin|pin@41||4.5|7.5||||
NWire_Pin|pin@42||-14|7.5||||
NWire_Pin|pin@43||-5|7.5||||
NWire_Pin|pin@44||9|-1||||
NPower|pwr@0||-5|11.5||||
Awire|net@30|||2700|pin@40||-9|-12|pin@39||-9|4
Awire|net@33|||2700|pin@38||0|0|pin@15||0|10
Awire|net@42|||0|pin@29||9|-8|nms3@0|g2|3|-8
Awire|net@43|||0|nms3@0|g3|-3|-4|pin@30||-18|-4
Awire|net@44|||2700|pin@30||-18|-4|pin@31||-18|4
Awire|net@45|||0|pin@37||-5|0|pin@32||-14|0
Awire|net@46|||0|nms3@0|g|-3|-12|pin@40||-9|-12
Awire|net@47|||900|pin@38||0|0|nms3@0|d|0|-2
Awire|net@48|||0|pin@38||0|0|pin@37||-5|0
Awire|net@49|||0|pin@35||4.5|0|pin@38||0|0
Awire|net@50|||2700|pin@37||-5|0|PMOS@3|d|-5|2
Awire|net@51|||1800|pin@39||-9|4|PMOS@3|g|-8|4
Awire|net@52|||2700|pin@35||4.5|0|PMOS@4|d|4.5|2
Awire|net@53|||1800|PMOS@4|g|7.5|4|pin@34||9|4
Awire|net@54|||2700|pin@32||-14|0|PMOS@5|d|-14|2
Awire|net@55|||0|PMOS@5|g|-17|4|pin@31||-18|4
Awire|net@56|||900|pin@41||4.5|7.5|PMOS@4|s|4.5|6
Awire|net@57|||2700|PMOS@5|s|-14|6|pin@42||-14|7.5
Awire|net@58|||1800|pin@43||-5|7.5|pin@41||4.5|7.5
Awire|net@59|||1800|pin@42||-14|7.5|pin@43||-5|7.5
Awire|net@60|||900|pin@43||-5|7.5|PMOS@3|s|-5|6
Awire|net@61|||2700|pin@43||-5|7.5|pwr@0||-5|11.5
Awire|net@62|||900|pin@44||9|-1|pin@29||9|-8
Awire|net@63|||900|pin@34||9|4|pin@44||9|-1
Awire|net@64|||0|conn@2|y|21|-1|pin@44||9|-1
Awire|net@65|||0|conn@1|a|26.5|10|pin@15||0|10
Awire|net@70|||1800|conn@3|y|-21|-12|pin@40||-9|-12
Awire|net@71|||1800|conn@0|y|-32.5|4|pin@31||-18|4
Eina||D5G2;|conn@3|a|I
Einb||D5G2;|conn@2|a|I
Einc||D5G2;|conn@0|y|I
Eout||D5G2;|conn@1|y|O
X

# Cell nand3_sy6;1{ic}
Cnand3_sy6;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX4;Y-2.5;)I100|ATTR_X(D5G1.5;HNPX3;Y2.5;)I1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,4000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@2||-0.5|0|6|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||-2.5|-2|-2|-2||
NPin|pin@1||-1.5|-2|1|1||
NPin|pin@2||-2.5|-2||||
NPin|pin@3||-0.5|3|1|1||
Nschematic:Bus_Pin|pin@4||-2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
NPin|pin@6||-1.5|3|1|1||
NPin|pin@7||-1.5|-3|1|1||
NPin|pin@8||-0.5|-3|1|1||
NPin|pin@9||-2.5|0||||
NPin|pin@10||-1.5|0|1|1||
Ngeneric:Invisible-Pin|pin@11||-2.5|2||||
NPin|pin@12||-1.5|2|1|1||
NPin|pin@13||-2.5|2||||
Ngeneric:Invisible-Pin|pin@14||-0.5|-2.5|||||ART_message(D5G1;)Ssy6
AThicker|net@0|||FS1800|pin@2||-2.5|-2|pin@1||-1.5|-2|ART_color()I10
AThicker|net@1|||FS1800|pin@6||-1.5|3|pin@3||-0.5|3|ART_color()I10
AThicker|net@2|||FS900|pin@6||-1.5|3|pin@7||-1.5|-3|ART_color()I10
AThicker|net@3|||FS1800|pin@7||-1.5|-3|pin@8||-0.5|-3|ART_color()I10
AThicker|net@4|||FS1800|pin@9||-2.5|0|pin@10||-1.5|0|ART_color()I10
AThicker|net@5|||FS1800|pin@13||-2.5|2|pin@12||-1.5|2|ART_color()I10
Eina||D5G1;|pin@0||I
Einb||D5G1;|pin@4||I
Einc||D5G1;|pin@11||I
Eout||D5G1;|pin@5||O
X

# Cell nand3_sy6;1{sch}
Cnand3_sy6;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-30;Y-12.5;)I100|ATTR_X(D5G1;HNPX-30;Y-11.5;)I1|ATTR_drive0(D5G1;HNPTX-30;Y-13.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-30;Y-14.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX19;Y-24;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb), $(inc));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@3||-14|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@4||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@5||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@1||24|-12.5|||RR|
NOff-Page|conn@2||27|0||||
NOff-Page|conn@3||-35|4||||
NOff-Page|conn@4||-35|-2.5||||
Inand3_sy6;1{ic}|nand3LT_@0||35|19.5|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-2.5;)I100|ATTR_X(D5G1.5;NPX3;Y2.5;)I1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_LEGATE()I1|ATTR_su()I-1
Inms3_sy6;1{ic}|nms3_sy3@0||-10|-16.5|||D0G4;|ATTR_Delay(D5G1;NOJPX-8.5;Y-1.5;)S@Delay|ATTR_X(D5G1.5;NOJPX-8.5;Y2;)S@X
NWire_Pin|pin@10||-19.5|-8.5||||
NWire_Pin|pin@11||-21.5|-16.5||||
NWire_Pin|pin@12||10.5|-12.5||||
NWire_Pin|pin@13||-19.5|4||||
NWire_Pin|pin@14||-21.5|-2.5||||
NWire_Pin|pin@15||-9|-2.5||||
NWire_Pin|pin@16||-5|7.5||||
NWire_Pin|pin@17||4.5|7.5||||
NWire_Pin|pin@18||-14|7.5||||
Ngeneric:Invisible-Pin|pin@19||0|15.5|||||ART_message(D5G2;)SSized assuming that only 1 input goes low at a time
Ngeneric:Invisible-Pin|pin@20||28.5|-19|||||ART_message(D5G2;)S[X is drive strength,Three pull-ups have the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@21||-0.5|18|||||ART_message(D5G2;)SP to N width ratio is 2 to 3
NWire_Pin|pin@22||-9|4||||
NWire_Pin|pin@23||-5|0||||
Ngeneric:Invisible-Pin|pin@24||-0.5|20|||||ART_message(D5G2;)S[one-parameter NAND]
NWire_Pin|pin@25||4.5|0||||
NWire_Pin|pin@26||10.5|4||||
Ngeneric:Invisible-Pin|pin@27||-0.5|25|||||ART_message(D5G6;)Snand3_sy6
NWire_Pin|pin@28||-14|0||||
NPower|pwr@0||-5|10.5||||
Awire|net@16|||0|pin@25||4.5|0|pin@23||-5|0
Awire|net@25|||1800|pin@10||-19.5|-8.5|nms3_sy3@0|g3|-7.5|-8.5
Awire|net@26|||2700|pin@10||-19.5|-8.5|pin@13||-19.5|4
Awire|net@27|||1800|pin@11||-21.5|-16.5|nms3_sy3@0|g|-7.5|-16.5
Awire|net@28|||2700|pin@11||-21.5|-16.5|pin@14||-21.5|-2.5
Awire|net@29|||0|pin@12||10.5|-12.5|nms3_sy3@0|g2|-2.5|-12.5
Awire|net@30|||900|pin@26||10.5|4|pin@12||10.5|-12.5
Awire|net@31|||900|pin@23||-5|0|nms3_sy3@0|d|-5|-5.5
Awire|net@32|||2700|PMOS@3|s|-14|6|pin@18||-14|7.5
Awire|net@33|||0|PMOS@3|g|-17|4|pin@13||-19.5|4
Awire|net@34|||900|PMOS@3|d|-14|2|pin@28||-14|0
Awire|net@35|||2700|PMOS@4|s|-5|6|pin@16||-5|7.5
Awire|net@36|||0|PMOS@4|g|-8|4|pin@22||-9|4
Awire|net@37|||900|PMOS@4|d|-5|2|pin@23||-5|0
Awire|net@38|||900|pin@17||4.5|7.5|PMOS@5|s|4.5|6
Awire|net@39|||1800|PMOS@5|g|7.5|4|pin@26||10.5|4
Awire|net@40|||900|PMOS@5|d|4.5|2|pin@25||4.5|0
Awire|net@41|||1800|pin@14||-21.5|-2.5|pin@15||-9|-2.5
Awire|net@42|||900|pin@22||-9|4|pin@15||-9|-2.5
Awire|net@43|||900|pwr@0||-5|10.5|pin@16||-5|7.5
Awire|net@44|||1800|pin@16||-5|7.5|pin@17||4.5|7.5
Awire|net@45|||1800|pin@18||-14|7.5|pin@16||-5|7.5
Awire|net@46|||1800|pin@28||-14|0|pin@23||-5|0
Awire|net@47|||1800|pin@25||4.5|0|conn@2|a|25|0
Awire|net@48|||1800|pin@12||10.5|-12.5|conn@1|y|22|-12.5
Awire|net@49|||1800|conn@3|y|-33|4|pin@13||-19.5|4
Awire|net@50|||1800|conn@4|y|-33|-2.5|pin@14||-21.5|-2.5
Eina||D5G2;|conn@4|y|I
Einb||D5G2;|conn@1|a|I
Einc||D5G2;|conn@3|y|I
Eout||D5G2;|conn@2|y|O
X

# Cell nand3en;1{ic}
Cnand3en;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,4000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NThick-Circle|art@2||-0.5|0|6|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
Ngeneric:Invisible-Pin|pin@0||-0.5|-2.25|||||ART_message(D5G1.5;)S[en]
NPin|pin@1||-2.5|2||||
NPin|pin@2||-1.5|2|1|1||
Ngeneric:Invisible-Pin|pin@3||-2.5|2||||
NPin|pin@4||-1.5|0|1|1||
NPin|pin@5||-2.5|0||||
NPin|pin@6||-0.5|-3|1|1||
NPin|pin@7||-1.5|-3|1|1||
NPin|pin@8||-1.5|3|1|1||
Nschematic:Bus_Pin|pin@9||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@10||-2.5|0|-2|-2||
NPin|pin@11||-0.5|3|1|1||
NPin|pin@12||-2.5|-2||||
NPin|pin@13||-1.5|-2|1|1||
Nschematic:Bus_Pin|pin@14||-2.5|-2|-2|-2||
NPin|pin@15||-1.5|-1.75|1|1||
NPin|pin@16||-0.25|-3|1|1||
AThicker|net@0|||FS0|pin@2||-1.5|2|pin@1||-2.5|2|ART_color()I10
AThicker|net@1|||FS0|pin@4||-1.5|0|pin@5||-2.5|0|ART_color()I10
AThicker|net@2|||FS0|pin@6||-0.5|-3|pin@7||-1.5|-3|ART_color()I10
AThicker|net@3|||FS2700|pin@7||-1.5|-3|pin@8||-1.5|3|ART_color()I10
AThicker|net@4|||FS0|pin@11||-0.5|3|pin@8||-1.5|3|ART_color()I10
AThicker|net@5|||FS0|pin@13||-1.5|-2|pin@12||-2.5|-2|ART_color()I10
AThicker|net@6|||FS3150|pin@16||-0.25|-3|pin@15||-1.5|-1.75|ART_color()I10
Eina||D5G1;|pin@14||I
Einb||D5G1;|pin@10||I
Einc||D5G1;|pin@3||I
Eout||D5G1;|pin@9||O
X

# Cell nand3en;1{sch}
Cnand3en;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-29;Y-7;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-29;Y-6;)S1|ATTR_drive0(D5G1;HNPTX-29;Y-8;)Sstrong0|ATTR_drive1(D5G1;HNPTX-29;Y-9;)Sstrong1|ATTR_verilog_template(D5G1;NTX20.5;Y-17.5;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb), $(inc));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@3||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX2;Y2;)Smax(@X/10., 5./6.)
IPMOS;1{ic}|PMOS@4||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@5||-14|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-22|4||||
NOff-Page|conn@1||0|14.5|||R|
NOff-Page|conn@2||14|-1|||RR|
NOff-Page|conn@3||-15|-12||||
Inand3en;1{ic}|nand3en@0||29|14|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms3;1{ic}|nms3@0||0|-12|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2;Y0.5;)S@X
NWire_Pin|pin@0||9|-8||||
NWire_Pin|pin@1||-18|-4||||
NWire_Pin|pin@2||-18|4||||
NWire_Pin|pin@3||-14|0||||
Ngeneric:Invisible-Pin|pin@4||-0.5|27|||||ART_message(D5G6;)S[nand3en]
NWire_Pin|pin@5||9|-1||||
NWire_Pin|pin@6||9|4||||
NWire_Pin|pin@7||4.5|0||||
NWire_Pin|pin@8||-9|-12||||
Ngeneric:Invisible-Pin|pin@9||-0.5|22|||||ART_message(D5G2;)S["three input, fixed-size NAND where ina is DC signal (enable)"]
NWire_Pin|pin@10||-5|0||||
NWire_Pin|pin@11||0|0||||
NWire_Pin|pin@12||-9|4||||
Ngeneric:Invisible-Pin|pin@13||-0.5|19.5|||||ART_message(D5G2;)S[P to N width ratio is 2 to 3]
Ngeneric:Invisible-Pin|pin@14||30|-10|||||ART_message(D5G2;)S[X is drive strength,Each pull-up has the same strength,as the pull-down]
NWire_Pin|pin@15||4.5|7.5||||
NWire_Pin|pin@16||-14|7.5||||
NWire_Pin|pin@17||-5|7.5||||
NPower|pwr@0||-5|11.5||||
Awire|net@0|||900|pin@17||-5|7.5|PMOS@3|s|-5|6
Awire|net@1|||1800|pin@12||-9|4|PMOS@3|g|-8|4
Awire|net@2|||2700|pin@10||-5|0|PMOS@3|d|-5|2
Awire|net@3|||1800|pin@8||-9|-12|nms3@0|g|-3|-12
Awire|net@4|||900|pin@5||9|-1|pin@0||9|-8
Awire|net@5|||0|pin@0||9|-8|nms3@0|g2|3|-8
Awire|net@6|||0|nms3@0|g3|-3|-4|pin@1||-18|-4
Awire|net@7|||2700|pin@1||-18|-4|pin@2||-18|4
Awire|net@8|||0|pin@2||-18|4|conn@0|y|-20|4
Awire|net@9|||0|pin@10||-5|0|pin@3||-14|0
Awire|net@10|||900|pin@11||0|0|nms3@0|d|0|-2
Awire|net@11|||1800|pin@5||9|-1|conn@2|y|12|-1
Awire|net@12|||2700|pin@5||9|-1|pin@6||9|4
Awire|net@13|||0|pin@8||-9|-12|conn@3|y|-13|-12
Awire|net@14|||0|pin@11||0|0|pin@10||-5|0
Awire|net@15|||0|pin@7||4.5|0|pin@11||0|0
Awire|net@16|||2700|pin@11||0|0|conn@1|a|0|12.5
Awire|net@17|||2700|pin@8||-9|-12|pin@12||-9|4
Awire|net@18|||2700|pin@7||4.5|0|PMOS@4|d|4.5|2
Awire|net@19|||1800|PMOS@4|g|7.5|4|pin@6||9|4
Awire|net@20|||2700|pin@3||-14|0|PMOS@5|d|-14|2
Awire|net@21|||0|PMOS@5|g|-17|4|pin@2||-18|4
Awire|net@22|||900|pin@15||4.5|7.5|PMOS@4|s|4.5|6
Awire|net@23|||2700|PMOS@5|s|-14|6|pin@16||-14|7.5
Awire|net@24|||1800|pin@17||-5|7.5|pin@15||4.5|7.5
Awire|net@25|||1800|pin@16||-14|7.5|pin@17||-5|7.5
Awire|net@26|||2700|pin@17||-5|7.5|pwr@0||-5|11.5
Eina||D5G2;|conn@3|a|I
Einb||D5G2;|conn@2|a|I
Einc||D5G2;|conn@0|y|I
Eout||D5G2;|conn@1|y|O
X

# Cell nand3en_sy;1{ic}
Cnand3en_sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX3;Y2.5;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,4000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-0.5|0|6|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@2||2|0|1|1|||ART_color()I10
Ngeneric:Invisible-Pin|pin@0||-0.5|1|||||ART_message(D5G1;)S[sy2]
NPin|pin@1||-0.25|-3|1|1||
NPin|pin@2||-1.5|-1.75|1|1||
Nschematic:Bus_Pin|pin@3||-2.5|-2|-2|-2||
NPin|pin@4||-1.5|-2|1|1||
NPin|pin@5||-2.5|-2||||
NPin|pin@6||-0.5|3|1|1||
Nschematic:Bus_Pin|pin@7||-2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@8||2.5|0|-2|-2||
NPin|pin@9||-1.5|3|1|1||
NPin|pin@10||-1.5|-3|1|1||
NPin|pin@11||-0.5|-3|1|1||
NPin|pin@12||-2.5|0||||
NPin|pin@13||-1.5|0|1|1||
Ngeneric:Invisible-Pin|pin@14||-2.5|2||||
NPin|pin@15||-1.5|2|1|1||
NPin|pin@16||-2.5|2||||
Ngeneric:Invisible-Pin|pin@17||-0.5|-2.25|||||ART_message(D5G1.5;)S[en]
AThicker|net@0|||FS3150|pin@1||-0.25|-3|pin@2||-1.5|-1.75|ART_color()I10
AThicker|net@1|||FS0|pin@4||-1.5|-2|pin@5||-2.5|-2|ART_color()I10
AThicker|net@2|||FS0|pin@6||-0.5|3|pin@9||-1.5|3|ART_color()I10
AThicker|net@3|||FS2700|pin@10||-1.5|-3|pin@9||-1.5|3|ART_color()I10
AThicker|net@4|||FS0|pin@11||-0.5|-3|pin@10||-1.5|-3|ART_color()I10
AThicker|net@5|||FS0|pin@13||-1.5|0|pin@12||-2.5|0|ART_color()I10
AThicker|net@6|||FS0|pin@15||-1.5|2|pin@16||-2.5|2|ART_color()I10
Eina||D5G1;|pin@3||I
Einb||D5G1;|pin@7||I
Einc||D5G1;|pin@14||I
Eout||D5G1;|pin@8||O
X

# Cell nand3en_sy;1{sch}
Cnand3en_sy;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-29;Y-7;)I100|ATTR_X(D5G1;HNOLPX-29;Y-6;)S1|ATTR_drive0(D5G1;HNPTX-29;Y-8;)Sstrong0|ATTR_drive1(D5G1;HNPTX-29;Y-9;)Sstrong1|ATTR_verilog_template(D5G1;NTX20.5;Y-17.5;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb), $(inc));|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@3||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX2;Y2.5;)Smax(@X/10., 5./6.)
IPMOS;1{ic}|PMOS@4||-14|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
IPMOS;1{ic}|PMOS@5||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-15|-13||||
NOff-Page|conn@1||14|-1|||RR|
NOff-Page|conn@2||0|14.5|||R|
NOff-Page|conn@3||-22|4||||
Inand3en_sy;1{ic}|nand3en_@0||29|14|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inms3_2sy;1{ic}|nms3_2sy@0||0|-13|||D0G4;|ATTR_Delay(D5G1;NOJPX5;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S@X
Inms3_2sy;1{ic}|nms3_2sy@1||0|-13|||D0G4;|ATTR_Delay(D5G1;NOJPX5;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S@X
NWire_Pin|pin@0||-18|-5||||
NWire_Pin|pin@1||-5|7.5||||
NWire_Pin|pin@2||-14|7.5||||
NWire_Pin|pin@3||4.5|7.5||||
Ngeneric:Invisible-Pin|pin@4||30|-10|||||ART_message(D5G2;)S[X is drive strength,Each pull-up has the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@5||-0.5|19.5|||||ART_message(D5G2;)S[P to N width ratio is 2 to 3]
NWire_Pin|pin@6||-9|4||||
NWire_Pin|pin@7||0|0||||
NWire_Pin|pin@8||-5|0||||
Ngeneric:Invisible-Pin|pin@9||-0.5|22|||||ART_message(D5G2;)S["three input, fixed-size NAND where ina is DC signal (enable) and inb/c are symmetric"]
NWire_Pin|pin@10||-9|-13||||
NWire_Pin|pin@11||4.5|0||||
NWire_Pin|pin@12||9|4||||
NWire_Pin|pin@13||9|-1||||
Ngeneric:Invisible-Pin|pin@14||-0.5|27|||||ART_message(D5G6;)S[nand3en_sy]
NWire_Pin|pin@15||-14|0||||
NWire_Pin|pin@16||-18|4||||
NWire_Pin|pin@17||9|-9||||
NPower|pwr@0||-5|11.5||||
Awire|net@0|||900|pin@1||-5|7.5|PMOS@3|s|-5|6
Awire|net@1|||1800|pin@6||-9|4|PMOS@3|g|-8|4
Awire|net@2|||2700|pin@8||-5|0|PMOS@3|d|-5|2
Awire|net@3|||900|pin@16||-18|4|pin@0||-18|-5
Awire|net@4|||2700|pin@17||9|-9|pin@13||9|-1
Awire|net@5|||1800|pin@10||-9|-13|nms3_2sy@0|g|-2.25|-13
Awire|net@6|||1800|nms3_2sy@0|g2|3|-9|pin@17||9|-9
Awire|net@8|||900|pin@7||0|0|nms3_2sy@0|d|0|-3
Awire|net@9|||2700|pin@1||-5|7.5|pwr@0||-5|11.5
Awire|net@10|||1800|pin@2||-14|7.5|pin@1||-5|7.5
Awire|net@11|||1800|pin@1||-5|7.5|pin@3||4.5|7.5
Awire|net@12|||2700|PMOS@4|s|-14|6|pin@2||-14|7.5
Awire|net@13|||900|pin@3||4.5|7.5|PMOS@5|s|4.5|6
Awire|net@14|||0|PMOS@4|g|-17|4|pin@16||-18|4
Awire|net@15|||2700|pin@15||-14|0|PMOS@4|d|-14|2
Awire|net@16|||1800|PMOS@5|g|7.5|4|pin@12||9|4
Awire|net@17|||2700|pin@11||4.5|0|PMOS@5|d|4.5|2
Awire|net@18|||2700|pin@10||-9|-13|pin@6||-9|4
Awire|net@19|||2700|pin@7||0|0|conn@2|a|0|12.5
Awire|net@20|||0|pin@11||4.5|0|pin@7||0|0
Awire|net@21|||0|pin@7||0|0|pin@8||-5|0
Awire|net@22|||0|pin@10||-9|-13|conn@0|y|-13|-13
Awire|net@23|||2700|pin@13||9|-1|pin@12||9|4
Awire|net@24|||1800|pin@13||9|-1|conn@1|y|12|-1
Awire|net@25|||0|pin@8||-5|0|pin@15||-14|0
Awire|net@26|||0|pin@16||-18|4|conn@3|y|-20|4
Awire|net@27|||0|nms3_2sy@1|g3|-3|-5|pin@0||-18|-5
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Einc||D5G2;|conn@3|y|I
Eout||D5G2;|conn@2|y|O
X

# Cell nms1;2{ic}
Cnms1;2{ic}||artwork|1021415734000|1228433765304|E|ATTR_Delay(D5G1;HNPX3;Y-0.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNPX-2.25;Y1.5;)I1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NPin|pin@0||-1|-2|1|1||
NPin|pin@1||0|-3||||
NPin|pin@2||1|-2|1|1||
NPin|pin@3||0|-2|1|1||
NPin|pin@4||0|-2|1|1||
Nschematic:Bus_Pin|pin@5||0|2|-2|-2||
Nschematic:Bus_Pin|pin@6||-3|0|-2|-2||
NPin|pin@8||-1.5|0|1|1|RR|
NPin|pin@9||-3|0|||RR|
NPin|pin@10||-1.5|1|1|1||
NPin|pin@11||-1.5|-1|1|1||
NPin|pin@12||0|-1|1|1||
NPin|pin@13||-0.75|-1|1|1||
NPin|pin@14||-0.75|1|1|1||
NPin|pin@15||0|1|1|1||
NPin|pin@16||0|2|1|1||
NPin|pin@21||0|2|1|1|YRR|
NPin|pin@24||0|2|1|1|YRR|
AThicker|net@0|||FS0|pin@3||0|-2|pin@0||-1|-2|ART_color()I10
AThicker|net@1|||FS0|pin@2||1|-2|pin@3||0|-2|ART_color()I10
AThicker|net@2|||FS1350|pin@0||-1|-2|pin@1||0|-3|ART_color()I10
AThicker|net@3|||FS2250|pin@1||0|-3|pin@2||1|-2|ART_color()I10
AThicker|net@4|||FS900|pin@12||0|-1|pin@4||0|-2|ART_color()I10
AThicker|net@5|||FS900|pin@10||-1.5|1|pin@11||-1.5|-1|ART_color()I10
AThicker|net@6|||FS1800|pin@13||-0.75|-1|pin@12||0|-1|ART_color()I10
AThicker|net@7|||FS900|pin@16||0|2|pin@15||0|1|ART_color()I10
AThicker|net@8|||FS900|pin@14||-0.75|1|pin@13||-0.75|-1|ART_color()I10
AThicker|net@9|||FS0|pin@15||0|1|pin@14||-0.75|1|ART_color()I10
AThicker|net@10|||FS1800|pin@9||-3|0|pin@8||-1.5|0|ART_color()I10
AThicker|net@11|||FS900|pin@21||0|2|pin@24||0|2|ART_color()I10
Ed||D5G1;|pin@5||O
Eg||D5G1;|pin@6||I
X

# Cell nms1;1{sch}
Cnms1;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-9;Y-15.5;)I100|ATTR_X(D5G1;HNPX-9;Y-14.5;)I1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@2||0|-11|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOJPX3.5;Y0.5;)S@X*1.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-10|-11||||
NOff-Page|conn@1||8|0|||Y|
NGround|gnd@0||0|-19||||
Inms1;2{ic}|nms1@0||29|0|||D0G4;|ATTR_Delay(D5G1;NPX3;Y-0.5;)I100|ATTR_X(D5FLeave alone;G1.5;NPX-2.25;Y1.5;)I1
NWire_Pin|pin@0||0|0||||
Ngeneric:Invisible-Pin|pin@1||-0.5|4|||||ART_message(D5G2;)Sone fixed-size N-type transistor to GND
Ngeneric:Invisible-Pin|pin@2||0|8.5|||||ART_message(D5G6;)Snms1
Awire|net@3|||2700|gnd@0||0|-17|NMOS@2|s|0|-13
Awire|net@4|||1800|conn@0|y|-8|-11|NMOS@2|g|-3|-11
Awire|net@5|||1800|pin@0||0|0|conn@1|a|6|0
Awire|net@6|||900|pin@0||0|0|NMOS@2|d|0|-9
Ed||D5G2;|conn@1|y|O
Eg||D5G2;|conn@0|a|I
X

# Cell nms2;1{sch}
Cnms2;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-9;Y-15.5;)I100|ATTR_X(D5G1;HNPX-9;Y-14.5;)I1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@2||0|-4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X*2.0
INMOS;1{ic}|NMOS@3||0|-11|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOJPX3.5;Y0.5;)S@X*2.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-10|-11||||
NOff-Page|conn@1||8|0|||Y|
NOff-Page|conn@2||8|-4|||YRR|
NGround|gnd@0||0|-19||||
Inms2b;1{ic}|nms2@0||29|0|||D0G4;|ATTR_Delay(D5G1;NPX3;Y-0.5;)I100|ATTR_X(D5FLeave alone;G1.5;NPX-2.25;Y1.5;)I1
Inms2a;2{ic}|nms2@1||29|-11|||D5G4;|ATTR_Delay(D5G1;NPX3.75;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NPX-1.5;)I1
NWire_Pin|pin@0||0|0||||
Ngeneric:Invisible-Pin|pin@1||-0.5|4|||||ART_message(D5G2;)S[two fixed-size N-type transistors to GND]
Ngeneric:Invisible-Pin|pin@2||0|8.5|||||ART_message(D5G6;)S[nms2]
Awire|net@0|||2700|NMOS@3|d|0|-9|NMOS@2|s|0|-6
Awire|net@1|||900|pin@0||0|0|NMOS@2|d|0|-2
Awire|net@2|||0|conn@2|y|6|-4|NMOS@2|g|3|-4
Awire|net@3|||2700|gnd@0||0|-17|NMOS@3|s|0|-13
Awire|net@4|||1800|conn@0|y|-8|-11|NMOS@3|g|-3|-11
Awire|net@5|||1800|pin@0||0|0|conn@1|a|6|0
Ed||D5G2;|conn@1|y|O
Eg||D5G2;|conn@0|a|I
Eg2||D5G2;|conn@2|a|I
X

# Cell nms2_sy;1{ic}
Cnms2_sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX5.5;Y-0.5;)I100|ATTR_X(D5G1.5;HNOLPX-3.75;Y2.5;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
Nschematic:Bus_Pin|pin@0||0|6|-2|-2||
Nschematic:Bus_Pin|pin@1||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@2||3|4|-2|-2||
NPin|pin@3||-1.5|0|1|1|RR|
NPin|pin@4||-3|0|||RR|
NPin|pin@5||0|-2|1|1||
NPin|pin@6||1|-2|1|1||
NPin|pin@7||0|-3||||
NPin|pin@8||-1|-2|1|1||
NPin|pin@9||-1.5|1|1|1||
NPin|pin@10||-1.5|-1|1|1||
NPin|pin@11||0|-1|1|1||
NPin|pin@12||-0.75|-1|1|1||
NPin|pin@13||-0.75|1|1|1||
NPin|pin@14||-0.25|1|1|1||
NPin|pin@15||0|6|||RR|
NPin|pin@16||0|5|1|1|YRR|
NPin|pin@17||0.75|5|1|1|YRR|
NPin|pin@18||0.75|3|1|1|YRR|
NPin|pin@19||1.5|3|1|1|YRR|
NPin|pin@20||1.5|5|1|1|YRR|
NPin|pin@21||3|4||||
NPin|pin@22||1.5|4|1|1|Y|
NPin|pin@23||-0.75|5|1|1||
NPin|pin@24||-0.75|3|1|1||
NPin|pin@25||-1.5|4|1|1|RR|
NPin|pin@26||-2.25|4|1|1|RR|
NPin|pin@27||-1.5|5|1|1||
NPin|pin@28||-1.5|3|1|1||
NPin|pin@29||1.5|0|1|1|Y|
NPin|pin@30||2.25|0|1|1|Y|
NPin|pin@31||1.5|1|1|1|YRR|
NPin|pin@32||1.5|-1|1|1|YRR|
NPin|pin@33||0|-1|1|1|YRR|
NPin|pin@34||0.75|-1|1|1|YRR|
NPin|pin@35||0.75|1|1|1|YRR|
NPin|pin@36||0.25|3|1|1||
NPin|pin@37||-0.25|3|1|1||
NPin|pin@38||0.25|1|1|1||
NPin|pin@39||2.25|4|1|1||
NPin|pin@40||-2.25|0|1|1||
AThicker|net@0|||FS900|pin@13||-0.75|1|pin@12||-0.75|-1|ART_color()I10
AThicker|net@1|||FS0|pin@14||-0.25|1|pin@13||-0.75|1|ART_color()I10
AThicker|net@2|||FS1350|pin@8||-1|-2|pin@7||0|-3|ART_color()I10
AThicker|net@3|||FS0|pin@5||0|-2|pin@8||-1|-2|ART_color()I10
AThicker|net@4|||FS900|pin@9||-1.5|1|pin@10||-1.5|-1|ART_color()I10
AThicker|net@5|||FS1800|pin@4||-3|0|pin@3||-1.5|0|ART_color()I10
AThicker|net@6|||FS1800|pin@12||-0.75|-1|pin@11||0|-1|ART_color()I10
AThicker|net@7|||FS900|pin@11||0|-1|pin@5||0|-2|ART_color()I10
AThicker|net@8|||FS2250|pin@7||0|-3|pin@6||1|-2|ART_color()I10
AThicker|net@9|||FS0|pin@6||1|-2|pin@5||0|-2|ART_color()I10
AThicker|net@10|||FS900|pin@15||0|6|pin@16||0|5|ART_color()I10
AThicker|net@11|||FS900|pin@20||1.5|5|pin@19||1.5|3|ART_color()I10
AThicker|net@12|||FS1800|pin@16||0|5|pin@17||0.75|5|ART_color()I10
AThicker|net@13|||FS900|pin@17||0.75|5|pin@18||0.75|3|ART_color()I10
AThicker|net@14|||FS1800|pin@23||-0.75|5|pin@16||0|5|ART_color()I10
AThicker|net@15|||FS2700|pin@24||-0.75|3|pin@23||-0.75|5|ART_color()I10
AThicker|net@16|||FS1800|pin@26||-2.25|4|pin@25||-1.5|4|ART_color()I10
AThicker|net@17|||FS900|pin@27||-1.5|5|pin@28||-1.5|3|ART_color()I10
AThicker|net@18|||FS0|pin@30||2.25|0|pin@29||1.5|0|ART_color()I10
AThicker|net@19|||FS900|pin@35||0.75|1|pin@34||0.75|-1|ART_color()I10
AThicker|net@20|||FS0|pin@34||0.75|-1|pin@33||0|-1|ART_color()I10
AThicker|net@21|||FS900|pin@31||1.5|1|pin@32||1.5|-1|ART_color()I10
AThicker|net@22|||FS760|pin@36||0.25|3|pin@14||-0.25|1|ART_color()I10
AThicker|net@23|||FS0|pin@18||0.75|3|pin@36||0.25|3|ART_color()I10
AThicker|net@24|||FS0|pin@37||-0.25|3|pin@24||-0.75|3|ART_color()I10
AThicker|net@25|||FS2840|pin@38||0.25|1|pin@37||-0.25|3|ART_color()I10
AThicker|net@26|||FS0|pin@35||0.75|1|pin@38||0.25|1|ART_color()I10
AThicker|net@27|||FS0|pin@21||3|4|pin@22||1.5|4|ART_color()I10
AThicker|net@28|||FS900|pin@39||2.25|4|pin@30||2.25|0|ART_color()I10
AThicker|net@29|||FS2700|pin@40||-2.25|0|pin@26||-2.25|4|ART_color()I10
Ed||D5G1;|pin@0||O
Eg||D5G1;|pin@1||I
Eg2||D5G1;|pin@2||I
X

# Cell nms2_sy;1{sch}
Cnms2_sy;1{sch}||schematic|1021415734000|1157998666994||ATTR_Delay(D5G1;HNPX-17;Y-12.5;)I100|ATTR_X(D5G1;HNOLPX-17;Y-11.5;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||16.5|0||||
NOff-Page|conn@1||16|-5.5|||YRR|
NOff-Page|conn@2||-15|-5.5||||
Inms2b;1{ic}|nms2@0||8|-9.5|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5G1.5;NOLPX-2.25;Y1.5;)S@X/2.
Inms2b;1{ic}|nms2@1||-6.5|-9.5|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5G1.5;NOLPX-2.25;Y1.5;)S@X/2.
Inms2_sy;1{ic}|nms2_sy@0||25|11|||D0G4;|ATTR_Delay(D5G1;NPX5.5;Y-0.5;)I100|ATTR_X(D5G1.5;NOLPX-3.75;Y2.5;)S1
Ngeneric:Invisible-Pin|pin@0||-4|14|||||ART_message(D5G6;)S[nms2_sy]
Ngeneric:Invisible-Pin|pin@1||-4|9|||||ART_message(D5G2;)S[symmetric fixed-size N-type two-stack]
NWire_Pin|pin@2||-6.5|0||||
NWire_Pin|pin@3||-1|-9.5||||
NWire_Pin|pin@4||3|-5.5||||
NWire_Pin|pin@5||3|-9.5||||
NWire_Pin|pin@6||-1|-5.5||||
NWire_Pin|pin@7||8|0||||
Awire|net@0|||2250|pin@3||-1|-9.5|pin@4||3|-5.5
Awire|net@1|||3150|pin@5||3|-9.5|pin@6||-1|-5.5
Awire|net@2|||0|pin@6||-1|-5.5|nms2@1|g2|-3.5|-5.5
Awire|net@3|||0|nms2@0|g|5|-9.5|pin@5||3|-9.5
Awire|net@4|||0|nms2@0|g2|11|-5.5|pin@4||3|-5.5
Awire|net@5|||0|conn@1|y|14|-5.5|nms2@0|g2|11|-5.5
Awire|net@6|||1800|nms2@1|g|-9.5|-9.5|pin@3||-1|-9.5
Awire|net@7|||2700|nms2@1|d|-6.5|-3.5|pin@2||-6.5|0
Awire|net@8|||1800|pin@7||8|0|conn@0|a|14.5|0
Awire|net@9|||1800|pin@2||-6.5|0|pin@7||8|0
Awire|net@10|||900|pin@7||8|0|nms2@0|d|8|-3.5
Awire|net@11|||1800|conn@2|y|-13|-5.5|nms2@1|g2|-3.5|-5.5
Ed||D5G2;|conn@0|y|O
Eg||D5G2;|conn@2|a|I
Eg2||D5G2;|conn@1|a|I
X

# Cell nms2a;2{ic}
Cnms2a;2{ic}|nms2|artwork|1021415734000|1228433108557|E|ATTR_Delay(D5G1;HNPX3;Y-0.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNPX-2.25;Y1.5;)I1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NPin|pin@0||-1|-2|1|1||
NPin|pin@1||0|-3||||
NPin|pin@2||1|-2|1|1||
NPin|pin@3||0|-2|1|1||
NPin|pin@4||0|-2|1|1||
Nschematic:Bus_Pin|pin@5||0|6|-2|-2||
Nschematic:Bus_Pin|pin@6||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@7||-3|4|-2|-2||
NPin|pin@8||-1.5|0|1|1|RR|
NPin|pin@9||-3|0|||RR|
NPin|pin@10||-1.5|1|1|1||
NPin|pin@11||-1.5|-1|1|1||
NPin|pin@12||0|-1|1|1||
NPin|pin@13||-0.75|-1|1|1||
NPin|pin@14||-0.75|1|1|1||
NPin|pin@15||0|1|1|1||
NPin|pin@16||0|2|1|1||
NPin|pin@17||0|6|||RR|
NPin|pin@18||0|5|1|1|YRR|
NPin|pin@19||-0.75|5|1|1|YRR|
NPin|pin@20||-0.75|3|1|1|YRR|
NPin|pin@21||0|3|1|1|YRR|
NPin|pin@22||-1.5|3|1|1|YRR|
NPin|pin@23||-1.5|5|1|1|YRR|
NPin|pin@24||0|2|1|1|YRR|
NPin|pin@25||-3|4||||
NPin|pin@26||-1.5|4|1|1|Y|
AThicker|net@0|||FS0|pin@3||0|-2|pin@0||-1|-2|ART_color()I10
AThicker|net@1|||FS0|pin@2||1|-2|pin@3||0|-2|ART_color()I10
AThicker|net@2|||FS1350|pin@0||-1|-2|pin@1||0|-3|ART_color()I10
AThicker|net@3|||FS2250|pin@1||0|-3|pin@2||1|-2|ART_color()I10
AThicker|net@4|||FS900|pin@12||0|-1|pin@4||0|-2|ART_color()I10
AThicker|net@5|||FS900|pin@10||-1.5|1|pin@11||-1.5|-1|ART_color()I10
AThicker|net@6|||FS1800|pin@13||-0.75|-1|pin@12||0|-1|ART_color()I10
AThicker|net@7|||FS900|pin@16||0|2|pin@15||0|1|ART_color()I10
AThicker|net@8|||FS900|pin@14||-0.75|1|pin@13||-0.75|-1|ART_color()I10
AThicker|net@9|||FS0|pin@15||0|1|pin@14||-0.75|1|ART_color()I10
AThicker|net@10|||FS1800|pin@9||-3|0|pin@8||-1.5|0|ART_color()I10
AThicker|net@11|||FS900|pin@21||0|3|pin@24||0|2|ART_color()I10
AThicker|net@12|||FS1800|pin@20||-0.75|3|pin@21||0|3|ART_color()I10
AThicker|net@13|||FS900|pin@17||0|6|pin@18||0|5|ART_color()I10
AThicker|net@14|||FS0|pin@18||0|5|pin@19||-0.75|5|ART_color()I10
AThicker|net@15|||FS900|pin@23||-1.5|5|pin@22||-1.5|3|ART_color()I10
AThicker|net@16|||FS900|pin@19||-0.75|5|pin@20||-0.75|3|ART_color()I10
AThicker|net@17|||FS1800|pin@25||-3|4|pin@26||-1.5|4|ART_color()I10
Ed||D5G1;|pin@5||O
Eg||D5G1;|pin@6||I
Eg2||D5G1;|pin@7||I
X

# Cell nms2b;1{ic}
Cnms2b;1{ic}|nms2|artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3;Y-0.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNPX-2.25;Y1.5;)I1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NPin|pin@0||-1|-2|1|1||
NPin|pin@1||0|-3||||
NPin|pin@2||1|-2|1|1||
NPin|pin@3||0|-2|1|1||
NPin|pin@4||0|-2|1|1||
Nschematic:Bus_Pin|pin@5||0|6|-2|-2||
Nschematic:Bus_Pin|pin@6||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@7||3|4|-2|-2||
NPin|pin@8||-1.5|0|1|1|RR|
NPin|pin@9||-3|0|||RR|
NPin|pin@10||-1.5|1|1|1||
NPin|pin@11||-1.5|-1|1|1||
NPin|pin@12||0|-1|1|1||
NPin|pin@13||-0.75|-1|1|1||
NPin|pin@14||-0.75|1|1|1||
NPin|pin@15||0|1|1|1||
NPin|pin@16||0|2|1|1||
NPin|pin@17||0|6|||RR|
NPin|pin@18||0|5|1|1|YRR|
NPin|pin@19||0.75|5|1|1|YRR|
NPin|pin@20||0.75|3|1|1|YRR|
NPin|pin@21||0|3|1|1|YRR|
NPin|pin@22||1.5|3|1|1|YRR|
NPin|pin@23||1.5|5|1|1|YRR|
NPin|pin@24||0|2|1|1|YRR|
NPin|pin@25||3|4||||
NPin|pin@26||1.5|4|1|1|Y|
AThicker|net@0|||FS0|pin@3||0|-2|pin@0||-1|-2|ART_color()I10
AThicker|net@1|||FS0|pin@2||1|-2|pin@3||0|-2|ART_color()I10
AThicker|net@2|||FS1350|pin@0||-1|-2|pin@1||0|-3|ART_color()I10
AThicker|net@3|||FS2250|pin@1||0|-3|pin@2||1|-2|ART_color()I10
AThicker|net@4|||FS900|pin@12||0|-1|pin@4||0|-2|ART_color()I10
AThicker|net@5|||FS900|pin@10||-1.5|1|pin@11||-1.5|-1|ART_color()I10
AThicker|net@6|||FS1800|pin@13||-0.75|-1|pin@12||0|-1|ART_color()I10
AThicker|net@7|||FS900|pin@16||0|2|pin@15||0|1|ART_color()I10
AThicker|net@8|||FS900|pin@14||-0.75|1|pin@13||-0.75|-1|ART_color()I10
AThicker|net@9|||FS0|pin@15||0|1|pin@14||-0.75|1|ART_color()I10
AThicker|net@10|||FS1800|pin@9||-3|0|pin@8||-1.5|0|ART_color()I10
AThicker|net@11|||FS900|pin@21||0|3|pin@24||0|2|ART_color()I10
AThicker|net@12|||FS0|pin@20||0.75|3|pin@21||0|3|ART_color()I10
AThicker|net@13|||FS900|pin@17||0|6|pin@18||0|5|ART_color()I10
AThicker|net@14|||FS1800|pin@18||0|5|pin@19||0.75|5|ART_color()I10
AThicker|net@15|||FS900|pin@23||1.5|5|pin@22||1.5|3|ART_color()I10
AThicker|net@16|||FS900|pin@19||0.75|5|pin@20||0.75|3|ART_color()I10
AThicker|net@17|||FS0|pin@25||3|4|pin@26||1.5|4|ART_color()I10
Ed||D5G1;|pin@5||O
Eg||D5G1;|pin@6||I
Eg2||D5G1;|pin@7||I
X

# Cell nms3;1{ic}
Cnms3;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3;Y-2;)I100|ATTR_X(D5G1.5;HNOLPX-2;Y0.5;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NPin|pin@0||1.5|4|1|1|Y|
NPin|pin@1||3|4||||
NPin|pin@2||0|2|1|1|YRR|
NPin|pin@3||1.5|5|1|1|YRR|
NPin|pin@4||1.5|3|1|1|YRR|
NPin|pin@5||0|3|1|1|YRR|
NPin|pin@6||0.75|3|1|1|YRR|
NPin|pin@7||0.75|5|1|1|YRR|
NPin|pin@8||0|5|1|1|YRR|
NPin|pin@9||0|6|||RR|
NPin|pin@10||0|2|1|1||
NPin|pin@11||0|1|1|1||
NPin|pin@12||-0.75|1|1|1||
NPin|pin@13||-0.75|-1|1|1||
NPin|pin@14||0|-1|1|1||
NPin|pin@15||-1.5|-1|1|1||
NPin|pin@16||-1.5|1|1|1||
NPin|pin@17||-1|-2|1|1||
NPin|pin@18||0|-3||||
NPin|pin@19||1|-2|1|1||
NPin|pin@20||0|-2|1|1||
NPin|pin@21||-3|0|||RR|
NPin|pin@22||-1.5|0|1|1|RR|
Nschematic:Bus_Pin|pin@23||3|4|-2|-2||
Nschematic:Bus_Pin|pin@24||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@25||0|10|-2|-2||
Ngeneric:Invisible-Pin|pin@26||-3|8||||
NPin|pin@27||-1.5|8|1|1|RR|
NPin|pin@28||-3|8|||RR|
NPin|pin@29||0|6|1|1||
NPin|pin@30||-1.5|9|1|1||
NPin|pin@31||-1.5|7|1|1||
NPin|pin@32||0|7|1|1||
NPin|pin@33||-0.75|7|1|1||
NPin|pin@34||-0.75|9|1|1||
NPin|pin@35||0|9|1|1||
NPin|pin@36||0|10||||
AThicker|net@0|||FS0|pin@1||3|4|pin@0||1.5|4|ART_color()I10
AThicker|net@1|||FS900|pin@7||0.75|5|pin@6||0.75|3|ART_color()I10
AThicker|net@2|||FS900|pin@3||1.5|5|pin@4||1.5|3|ART_color()I10
AThicker|net@3|||FS1800|pin@8||0|5|pin@7||0.75|5|ART_color()I10
AThicker|net@4|||FS900|pin@9||0|6|pin@8||0|5|ART_color()I10
AThicker|net@5|||FS0|pin@6||0.75|3|pin@5||0|3|ART_color()I10
AThicker|net@6|||FS900|pin@5||0|3|pin@2||0|2|ART_color()I10
AThicker|net@7|||FS1800|pin@21||-3|0|pin@22||-1.5|0|ART_color()I10
AThicker|net@8|||FS2250|pin@18||0|-3|pin@19||1|-2|ART_color()I10
AThicker|net@9|||FS0|pin@20||0|-2|pin@17||-1|-2|ART_color()I10
AThicker|net@10|||FS1350|pin@17||-1|-2|pin@18||0|-3|ART_color()I10
AThicker|net@11|||FS0|pin@19||1|-2|pin@20||0|-2|ART_color()I10
AThicker|net@12|||FS0|pin@11||0|1|pin@12||-0.75|1|ART_color()I10
AThicker|net@13|||FS900|pin@12||-0.75|1|pin@13||-0.75|-1|ART_color()I10
AThicker|net@14|||FS900|pin@10||0|2|pin@11||0|1|ART_color()I10
AThicker|net@15|||FS900|pin@14||0|-1|pin@20||0|-2|ART_color()I10
AThicker|net@16|||FS1800|pin@13||-0.75|-1|pin@14||0|-1|ART_color()I10
AThicker|net@17|||FS900|pin@16||-1.5|1|pin@15||-1.5|-1|ART_color()I10
AThicker|net@18|||FS900|pin@34||-0.75|9|pin@33||-0.75|7|ART_color()I10
AThicker|net@19|||FS1800|pin@28||-3|8|pin@27||-1.5|8|ART_color()I10
AThicker|net@20|||FS900|pin@32||0|7|pin@29||0|6|ART_color()I10
AThicker|net@21|||FS1800|pin@33||-0.75|7|pin@32||0|7|ART_color()I10
AThicker|net@22|||FS0|pin@35||0|9|pin@34||-0.75|9|ART_color()I10
AThicker|net@23|||FS900|pin@36||0|10|pin@35||0|9|ART_color()I10
AThicker|net@24|||FS900|pin@30||-1.5|9|pin@31||-1.5|7|ART_color()I10
Ed||D5G1;|pin@25||O
Eg||D5G1;|pin@24||I
Eg2||D5G1;|pin@23||I
Eg3||D5G1;|pin@26||I
X

# Cell nms3;1{sch}
Cnms3;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-9.5;Y-16.5;)I100|ATTR_X(D5G1;HNOLPX-9.5;Y-15.5;)S1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@3||0|2.5|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S3.0*@X
INMOS;1{ic}|NMOS@4||0|-11|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S3.0*@X
INMOS;1{ic}|NMOS@5||0|-4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S3.0*@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||8|-4|||YRR|
NOff-Page|conn@1||5|6||||
NOff-Page|conn@2||-10|-11||||
NOff-Page|conn@3||-10|2.5||||
NGround|gnd@0||0|-19||||
Inms3;1{ic}|nms3@0||34|1|||D0G4;|ATTR_Delay(D5G1;NPX3;Y-2;)I100|ATTR_X(D5G1.5;NOLPX-2;Y0.5;)S1
Inms3a;1{ic}|nms3a@0||35|-15|||D5G4;|ATTR_Delay(D5G1;NPX4.5;Y-0.5;)I100|ATTR_X(D5G1;NOLPX4.5;Y0.5;)S1
Inms3b;1{ic}|nms3b@0||24.5|-17|||D5G4;|ATTR_Delay(D5G1;NPX-3.25;Y0.5;)I100|ATTR_X(D5G1;NOLPX-3.25;Y1.5;)S1
Inms3c;1{ic}|nms3c@0||24.5|1.5|||D5G4;|ATTR_Delay(D5G1;NPX-3.5;Y-3;)I100|ATTR_X(D5G1;NOLPX-3.5;Y-2;)S1
Ngeneric:Invisible-Pin|pin@0||0|13.5|||||ART_message(D5G6;)S[nms3]
Ngeneric:Invisible-Pin|pin@1||0|9|||||ART_message(D5G2;)S[three fixed-size N-type transistors to GND]
NWire_Pin|pin@2||0|6||||
Awire|net@0|||1800|pin@2||0|6|conn@1|a|3|6
Awire|net@1|||0|NMOS@3|g|-3|2.5|conn@3|y|-8|2.5
Awire|net@2|||2700|NMOS@3|d|0|4.5|pin@2||0|6
Awire|net@3|||1800|conn@2|y|-8|-11|NMOS@4|g|-3|-11
Awire|net@4|||2700|gnd@0||0|-17|NMOS@4|s|0|-13
Awire|net@5|||0|conn@0|y|6|-4|NMOS@5|g|3|-4
Awire|net@6|||2700|NMOS@5|d|0|-2|NMOS@3|s|0|0.5
Awire|net@7|||2700|NMOS@4|d|0|-9|NMOS@5|s|0|-6
Ed||D5G2;|conn@1|y|O
Eg||D5G2;|conn@2|a|I
Eg2||D5G2;|conn@0|a|I
Eg3||D5G2;|conn@3|y|I
X

# Cell nms3_2sy;1{ic}
Cnms3_2sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX5;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX-3.75;Y2.5;)S1|prototype_center()I[26000,-36000]
Ngeneric:Facet-Center|art@0||0|0||||AV
Nschematic:Bus_Pin|pin@0||-3|8||||
NPin|pin@2||-3|8|||RR|
NPin|pin@3||2.25|4|1|1|Y|
NPin|pin@4||3|4|1|1|Y|
NPin|pin@5||-1.5|0|1|1|RR|
NPin|pin@6||-2.25|0|1|1|RR|
NPin|pin@7||0|-2|1|1||
NPin|pin@8||-0.75|-1|1|1||
NPin|pin@9||0|-1|1|1|YRR|
NPin|pin@10||0|1|1|1|YRR|
NPin|pin@11||-0.75|1|1|1||
NPin|pin@12||-0.75|-1|1|1||
NPin|pin@13||-1.5|1|1|1||
NPin|pin@14||-1.5|-1|1|1||
NPin|pin@15||-2.25|4|1|1||
NPin|pin@16||2.25|8|1|1||
NPin|pin@17||0.25|5|1|1||
NPin|pin@18||-0.25|7|1|1||
NPin|pin@19||0.25|7|1|1||
NPin|pin@20||0.75|5|1|1|YRR|
NPin|pin@21||0.75|3|1|1|YRR|
NPin|pin@22||0|3|1|1|YRR|
NPin|pin@23||1.5|3|1|1|YRR|
NPin|pin@24||1.5|5|1|1|YRR|
NPin|pin@25||2.25|4|1|1|Y|
NPin|pin@26||1.5|4|1|1|Y|
NPin|pin@27||-1.5|7|1|1||
NPin|pin@28||-1.5|9|1|1||
NPin|pin@29||-2.25|8|1|1|RR|
NPin|pin@30||-1.5|8|1|1|RR|
NPin|pin@31||-0.75|7|1|1||
NPin|pin@32||-0.75|9|1|1||
NPin|pin@33||1.5|8|1|1|Y|
NPin|pin@34||2.25|8||||
NPin|pin@35||1.5|9|1|1|YRR|
NPin|pin@36||1.5|7|1|1|YRR|
NPin|pin@37||0.75|7|1|1|YRR|
NPin|pin@38||0.75|9|1|1|YRR|
NPin|pin@39||0|9|1|1|YRR|
NPin|pin@40||0|10|||RR|
NPin|pin@41||-0.25|5|1|1||
NPin|pin@42||-0.75|5|1|1||
NPin|pin@43||-0.75|3|1|1||
NPin|pin@44||0|3|1|1||
NPin|pin@45||-1.5|3|1|1||
NPin|pin@46||-1.5|5|1|1||
NPin|pin@47||-1|-2|1|1||
NPin|pin@48||0|-3||||
NPin|pin@49||1|-2|1|1||
NPin|pin@50||-2.25|4|||RR|
NPin|pin@51||-1.5|4|1|1|RR|
Nschematic:Bus_Pin|pin@52||3|4|-2|-2||
Nschematic:Bus_Pin|pin@53||-2.25|0|-2|-2||
Nschematic:Bus_Pin|pin@54||0|10|-2|-2||
NPin|pin@55||-3|8|1|1|RR|
NPin|pin@56||-2.25|8|1|1|RR|
AThicker|net@1|||FS0|pin@4||3|4|pin@3||2.25|4|ART_color()I10
AThicker|net@2|||FS1800|pin@6||-2.25|0|pin@5||-1.5|0|ART_color()I10
AThicker|net@3|||FS2700|pin@7||0|-2|pin@9||0|-1|ART_color()I10
AThicker|net@4|||FS1800|pin@47||-1|-2|pin@7||0|-2|ART_color()I10
AThicker|net@5|||FS1800|pin@7||0|-2|pin@49||1|-2|ART_color()I10
AThicker|net@6|||FS1800|pin@8||-0.75|-1|pin@9||0|-1|ART_color()I10
AThicker|net@7|||FS2700|pin@10||0|1|pin@44||0|3|ART_color()I10
AThicker|net@8|||FS900|pin@13||-1.5|1|pin@14||-1.5|-1|ART_color()I10
AThicker|net@9|||FS2700|pin@12||-0.75|-1|pin@11||-0.75|1|ART_color()I10
AThicker|net@10|||FS1800|pin@11||-0.75|1|pin@10||0|1|ART_color()I10
AThicker|net@11|||FS2700|pin@15||-2.25|4|pin@29||-2.25|8|ART_color()I10
AThicker|net@12|||FS900|pin@16||2.25|8|pin@25||2.25|4|ART_color()I10
AThicker|net@13|||FS0|pin@34||2.25|8|pin@33||1.5|8|ART_color()I10
AThicker|net@14|||FS0|pin@20||0.75|5|pin@17||0.25|5|ART_color()I10
AThicker|net@15|||FS2840|pin@17||0.25|5|pin@18||-0.25|7|ART_color()I10
AThicker|net@16|||FS0|pin@18||-0.25|7|pin@31||-0.75|7|ART_color()I10
AThicker|net@17|||FS0|pin@37||0.75|7|pin@19||0.25|7|ART_color()I10
AThicker|net@18|||FS760|pin@19||0.25|7|pin@41||-0.25|5|ART_color()I10
AThicker|net@19|||FS900|pin@24||1.5|5|pin@23||1.5|3|ART_color()I10
AThicker|net@20|||FS0|pin@21||0.75|3|pin@22||0|3|ART_color()I10
AThicker|net@21|||FS900|pin@20||0.75|5|pin@21||0.75|3|ART_color()I10
AThicker|net@22|||FS0|pin@25||2.25|4|pin@26||1.5|4|ART_color()I10
AThicker|net@23|||FS900|pin@28||-1.5|9|pin@27||-1.5|7|ART_color()I10
AThicker|net@24|||FS1800|pin@29||-2.25|8|pin@30||-1.5|8|ART_color()I10
AThicker|net@25|||FS2700|pin@31||-0.75|7|pin@32||-0.75|9|ART_color()I10
AThicker|net@26|||FS1800|pin@32||-0.75|9|pin@39||0|9|ART_color()I10
AThicker|net@27|||FS900|pin@38||0.75|9|pin@37||0.75|7|ART_color()I10
AThicker|net@28|||FS1800|pin@39||0|9|pin@38||0.75|9|ART_color()I10
AThicker|net@29|||FS900|pin@35||1.5|9|pin@36||1.5|7|ART_color()I10
AThicker|net@30|||FS900|pin@40||0|10|pin@39||0|9|ART_color()I10
AThicker|net@31|||FS2250|pin@48||0|-3|pin@49||1|-2|ART_color()I10
AThicker|net@32|||FS1800|pin@43||-0.75|3|pin@44||0|3|ART_color()I10
AThicker|net@33|||FS1800|pin@50||-2.25|4|pin@51||-1.5|4|ART_color()I10
AThicker|net@34|||FS900|pin@46||-1.5|5|pin@45||-1.5|3|ART_color()I10
AThicker|net@35|||FS1350|pin@47||-1|-2|pin@48||0|-3|ART_color()I10
AThicker|net@36|||FS0|pin@41||-0.25|5|pin@42||-0.75|5|ART_color()I10
AThicker|net@37|||FS900|pin@42||-0.75|5|pin@43||-0.75|3|ART_color()I10
AThicker|net@38|||FS1800|pin@55||-3|8|pin@56||-2.25|8|ART_color()I10
Ed||D5G1;|pin@54||O
Eg||D5G1;|pin@53||I
Eg2||D5G1;|pin@52||I
Eg3||D5G1;|pin@0||I
X

# Cell nms3_2sy;1{sch}
Cnms3_2sy;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-17;Y-12.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-17;Y-11.5;)S1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@5||8|-5.5|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*3./2.
INMOS;1{ic}|NMOS@6||8|-11|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*3./2.
INMOS;1{ic}|NMOS@7||1.5|-19.5|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*3.
INMOS;1{ic}|NMOS@8||-6.5|-5.5|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*3./2.
INMOS;1{ic}|NMOS@9||-6.5|-11|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*3./2.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-14.5|-5.5||||
NOff-Page|conn@1||-12.5|-19.5||||
NOff-Page|conn@2||16|-5.5|||YRR|
NOff-Page|conn@3||16.5|0||||
NGround|gnd@0||1.5|-25||||
Inms3_2sy;1{ic}|nms3_2sy@0||26.75|7.75|||D0G4;|ATTR_Delay(D5G1;NPX5;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S1
NWire_Pin|pin@0||8|0||||
NWire_Pin|pin@1||8|-15||||
NWire_Pin|pin@2||-6.5|-15||||
NWire_Pin|pin@3||1.5|-15||||
NWire_Pin|pin@4||-2|-5.5||||
NWire_Pin|pin@5||3.5|-11||||
NWire_Pin|pin@6||3.5|-5.5||||
NWire_Pin|pin@7||-2|-11||||
NWire_Pin|pin@8||-6.5|0||||
Ngeneric:Invisible-Pin|pin@9||-4|9|||||ART_message(D5G2;)S[fixed-size N-type three-stack where two inputs are symmetric]
Ngeneric:Invisible-Pin|pin@10||-4|14|||||ART_message(D5G6;)S[nms3_2sy]
Awire|net@0|||900|NMOS@7|s|1.5|-21.5|gnd@0||1.5|-23
Awire|net@1|||0|NMOS@8|g|-9.5|-5.5|conn@0|y|-12.5|-5.5
Awire|net@2|||1800|NMOS@5|g|11|-5.5|conn@2|y|14|-5.5
Awire|net@3|||0|NMOS@7|g|-1.5|-19.5|conn@1|y|-10.5|-19.5
Awire|net@4|||1800|NMOS@8|g|-9.5|-5.5|pin@4||-2|-5.5
Awire|net@5|||0|NMOS@5|g|11|-5.5|pin@6||3.5|-5.5
Awire|net@6|||2700|NMOS@6|d|8|-9|NMOS@5|s|8|-7.5
Awire|net@7|||900|pin@0||8|0|NMOS@5|d|8|-3.5
Awire|net@8|||0|conn@3|a|14.5|0|pin@0||8|0
Awire|net@9|||0|pin@0||8|0|pin@8||-6.5|0
Awire|net@10|||2700|pin@1||8|-15|NMOS@6|s|8|-13
Awire|net@11|||0|NMOS@6|g|5|-11|pin@5||3.5|-11
Awire|net@12|||0|pin@1||8|-15|pin@3||1.5|-15
Awire|net@13|||900|NMOS@9|s|-6.5|-13|pin@2||-6.5|-15
Awire|net@14|||1800|pin@2||-6.5|-15|pin@3||1.5|-15
Awire|net@15|||900|pin@3||1.5|-15|NMOS@7|d|1.5|-17.5
Awire|net@16|||900|pin@8||-6.5|0|NMOS@8|d|-6.5|-3.5
Awire|net@17|||900|NMOS@8|s|-6.5|-7.5|NMOS@9|d|-6.5|-9
Awire|net@18|||1800|NMOS@9|g|-3.5|-11|pin@7||-2|-11
Awire|net@19|||3150|pin@5||3.5|-11|pin@4||-2|-5.5
Awire|net@20|||2250|pin@7||-2|-11|pin@6||3.5|-5.5
Ed||D5G2;|conn@3|y|O
Eg||D5G2;|conn@1|a|I
Eg2||D5G2;|conn@2|a|I
Eg3||D5G2;|conn@0|a|I
X

# Cell nms3_sy3;1{ic}
Cnms3_sy3;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX-8.5;Y-1.5;)I100|ATTR_X(D5G1.5;HNOLPX-8.5;Y1;)S1|prototype_center()I[28000,-16000]
Ngeneric:Facet-Center|art@0||0|0||||AV
NPin|pin@0||10|8|1|1|Y|
NPin|pin@1||7.75|8|1|1||
NPin|pin@2||3.5|0|1|1|Y|
NPin|pin@3||6|0|1|1|Y|
NPin|pin@4||6|4|1|1||
NPin|pin@5||3.5|4|1|1||
NPin|pin@6||7.75|0|1|1|Y|
NPin|pin@7||10|0|1|1||
NPin|pin@8||10|4|1|1||
NPin|pin@9||7.75|4|1|1|Y|
NPin|pin@10||3.5|8|1|1||
NPin|pin@11||6|8|1|1||
NPin|pin@12||8.5|7|1|1||
NPin|pin@13||8.5|5|1|1||
NPin|pin@14||8.5|1|1|1||
NPin|pin@15||8.5|3|1|1||
NPin|pin@16||0|3|1|1||
NPin|pin@17||0|1|1|1||
NPin|pin@18||5|1|1|1||
NPin|pin@19||5|3|1|1||
NPin|pin@20||5|7|1|1||
NPin|pin@21||5|5|1|1||
NPin|pin@22||1|0|1|1|Y|
NPin|pin@23||-1.5|0|1|1|Y|
NPin|pin@24||2.75|8|1|1||
NPin|pin@25||2.75|0|1|1|Y|
NPin|pin@26||-1.5|4|1|1||
NPin|pin@27||1|4|1|1||
NPin|pin@28||1|8|1|1||
NPin|pin@29||-1.5|8|1|1||
NPin|pin@30||5|11||||
NPin|pin@31||5|10|1|1||
NPin|pin@32||5|-3|1|1||
NPin|pin@33||0|-1|1|1|Y|
NPin|pin@34||0|-2||||
NPin|pin@35||5|-2||||
NPin|pin@36||5|-1|1|1|Y|
NPin|pin@37||8.5|-1|1|1|Y|
NPin|pin@38||8.5|-2||||
NPin|pin@39||8.5|-2|1|1|Y|
NPin|pin@40||8.5|10|1|1||
NPin|pin@41||8.5|10||||
NPin|pin@42||8.5|9|1|1||
NPin|pin@43||5|9|1|1||
NPin|pin@44||5|10||||
NPin|pin@45||0|5|1|1||
NPin|pin@46||11.5|4|1|1|RR|
NPin|pin@47||10|4|||RR|
NPin|pin@48||10|8|||RR|
NPin|pin@49||10.75|8|1|1|RR|
NPin|pin@50||10.75|0||||
NPin|pin@51||10|0|1|1|Y|
NPin|pin@52||2.75|0|1|1|Y|
NPin|pin@53||3.5|0||||
NPin|pin@54||3.5|8||||
NPin|pin@55||2.75|8|1|1|Y|
NPin|pin@56||2.75|4|1|1|Y|
NPin|pin@57||3.5|4||||
NPin|pin@58||8.5|9|1|1|YRR|
NPin|pin@59||9.25|9|1|1|YRR|
NPin|pin@60||9.25|7|1|1|YRR|
NPin|pin@61||8.5|7|1|1|YRR|
NPin|pin@62||8.5|-1|1|1|YRR|
NPin|pin@63||9.25|-1|1|1|YRR|
NPin|pin@64||9.25|1|1|1|YRR|
NPin|pin@65||8.5|1|1|1|YRR|
NPin|pin@66||8.5|5|1|1||
NPin|pin@67||9.25|5|1|1||
NPin|pin@68||9.25|3|1|1||
NPin|pin@69||8.5|3|1|1||
NPin|pin@70||10|3|1|1||
NPin|pin@71||10|5|1|1||
NPin|pin@72||10|9|1|1||
NPin|pin@73||10|7|1|1||
NPin|pin@74||10|-1|1|1||
NPin|pin@75||10|1|1|1||
NPin|pin@76||3.5|1|1|1|YRR|
NPin|pin@77||3.5|-1|1|1|YRR|
NPin|pin@78||3.5|7|1|1|YRR|
NPin|pin@79||3.5|9|1|1|YRR|
NPin|pin@80||3.5|5|1|1|YRR|
NPin|pin@81||3.5|3|1|1|YRR|
NPin|pin@82||5|3|1|1|YRR|
NPin|pin@83||4.25|3|1|1|YRR|
NPin|pin@84||4.25|5|1|1|YRR|
NPin|pin@85||5|5|1|1|YRR|
NPin|pin@86||5|1|1|1||
NPin|pin@87||4.25|1|1|1||
NPin|pin@88||4.25|-1|1|1||
NPin|pin@89||5|-1|1|1||
NPin|pin@90||5|7|1|1||
NPin|pin@91||4.25|7|1|1||
NPin|pin@92||4.25|9|1|1||
NPin|pin@93||5|9|1|1||
NPin|pin@94||0|10||||
NPin|pin@95||0|9|1|1||
NPin|pin@96||-0.75|9|1|1||
NPin|pin@97||-0.75|7|1|1||
NPin|pin@98||0|7|1|1||
NPin|pin@99||-1.5|7|1|1||
NPin|pin@100||-1.5|9|1|1||
NPin|pin@101||-3|8|||RR|
NPin|pin@102||-1.5|8|1|1|RR|
Ngeneric:Invisible-Pin|pin@103||-3|8||||
Nschematic:Bus_Pin|pin@104||5|11|-2|-2||
Nschematic:Bus_Pin|pin@105||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@106||11.5|4|-2|-2||
NPin|pin@107||-1.5|0|1|1|RR|
NPin|pin@108||-3|0|||RR|
NPin|pin@109||6|-3|1|1||
NPin|pin@110||5|-4||||
NPin|pin@111||4|-3|1|1||
NPin|pin@112||-1.5|1|1|1||
NPin|pin@113||-1.5|-1|1|1||
NPin|pin@114||0|-1|1|1||
NPin|pin@115||-0.75|-1|1|1||
NPin|pin@116||-0.75|1|1|1||
NPin|pin@117||0|1|1|1||
NPin|pin@118||0|5|1|1|YRR|
NPin|pin@119||-0.75|5|1|1|YRR|
NPin|pin@120||-0.75|3|1|1|YRR|
NPin|pin@121||0|3|1|1|YRR|
NPin|pin@122||-1.5|3|1|1|YRR|
NPin|pin@123||-1.5|5|1|1|YRR|
NPin|pin@124||-1.5|4||||
NPin|pin@125||-2.25|4|1|1|Y|
ASolid|net@0|||FS777|pin@1||7.75|8|pin@3||6|0|ART_color()I10
ASolid|net@1|||FS0|pin@0||10|8|pin@1||7.75|8|ART_color()I10
ASolid|net@2|||FS0|pin@3||6|0|pin@2||3.5|0|ART_color()I10
ASolid|net@3|||FS2936|pin@6||7.75|0|pin@4||6|4|ART_color()I10
ASolid|net@4|||FS0|pin@7||10|0|pin@6||7.75|0|ART_color()I10
ASolid|net@5|||FS0|pin@4||6|4|pin@5||3.5|4|ART_color()I10
ASolid|net@6|||FS0|pin@8||10|4|pin@9||7.75|4|ART_color()I10
ASolid|net@7|||FS2936|pin@9||7.75|4|pin@11||6|8|ART_color()I10
ASolid|net@8|||FS0|pin@11||6|8|pin@10||3.5|8|ART_color()I10
AThicker|net@9|||FS2700|pin@13||8.5|5|pin@12||8.5|7|ART_color()I10
AThicker|net@10|||FS2700|pin@14||8.5|1|pin@15||8.5|3|ART_color()I10
AThicker|net@11|||FS2700|pin@17||0|1|pin@16||0|3|ART_color()I10
AThicker|net@12|||FS2700|pin@18||5|1|pin@19||5|3|ART_color()I10
AThicker|net@13|||FS2700|pin@21||5|5|pin@20||5|7|ART_color()I10
ASolid|net@14|||FS0|pin@22||1|0|pin@23||-1.5|0|ART_color()I10
ASolid|net@15|||FS777|pin@24||2.75|8|pin@22||1|0|ART_color()I10
ASolid|net@16|||FS2936|pin@25||2.75|0|pin@27||1|4|ART_color()I10
ASolid|net@17|||FS0|pin@27||1|4|pin@26||-1.5|4|ART_color()I10
AThicker|net@18|||FS2700|pin@45||0|5|pin@98||0|7|ART_color()I10
ASolid|net@19|||FS2936|pin@56||2.75|4|pin@28||1|8|ART_color()I10
ASolid|net@20|||FS0|pin@28||1|8|pin@29||-1.5|8|ART_color()I10
AThicker|net@21|||FS900|pin@30||5|11|pin@31||5|10|ART_color()I10
AThicker|net@22|||FS2700|pin@32||5|-3|pin@35||5|-2|ART_color()I10
AThicker|net@23|||FS1800|pin@111||4|-3|pin@32||5|-3|ART_color()I10
AThicker|net@24|||FS1800|pin@32||5|-3|pin@109||6|-3|ART_color()I10
AThicker|net@25|||FS1800|pin@34||0|-2|pin@39||8.5|-2|ART_color()I10
AThicker|net@26|||FS2700|pin@38||8.5|-2|pin@37||8.5|-1|ART_color()I10
AThicker|net@27|||FS2700|pin@34||0|-2|pin@33||0|-1|ART_color()I10
AThicker|net@28|||FS2700|pin@35||5|-2|pin@36||5|-1|ART_color()I10
AThicker|net@29|||FS1800|pin@94||0|10|pin@40||8.5|10|ART_color()I10
AThicker|net@30|||FS900|pin@41||8.5|10|pin@42||8.5|9|ART_color()I10
AThicker|net@31|||FS900|pin@44||5|10|pin@43||5|9|ART_color()I10
AThicker|net@32|||FS1800|pin@47||10|4|pin@46||11.5|4|ART_color()I10
AThicker|net@33|||FS1800|pin@48||10|8|pin@49||10.75|8|ART_color()I10
AThicker|net@34|||FS0|pin@50||10.75|0|pin@51||10|0|ART_color()I10
AThicker|net@35|||FS0|pin@53||3.5|0|pin@52||2.75|0|ART_color()I10
AThicker|net@36|||FS0|pin@54||3.5|8|pin@55||2.75|8|ART_color()I10
AThicker|net@37|||FS0|pin@57||3.5|4|pin@56||2.75|4|ART_color()I10
AThicker|net@38|||FS0|pin@63||9.25|-1|pin@62||8.5|-1|ART_color()I10
AThicker|net@39|||FS1800|pin@66||8.5|5|pin@67||9.25|5|ART_color()I10
AThicker|net@40|||FS900|pin@72||10|9|pin@73||10|7|ART_color()I10
AThicker|net@41|||FS1800|pin@58||8.5|9|pin@59||9.25|9|ART_color()I10
AThicker|net@42|||FS900|pin@59||9.25|9|pin@60||9.25|7|ART_color()I10
AThicker|net@43|||FS0|pin@60||9.25|7|pin@61||8.5|7|ART_color()I10
AThicker|net@44|||FS900|pin@71||10|5|pin@70||10|3|ART_color()I10
AThicker|net@45|||FS900|pin@67||9.25|5|pin@68||9.25|3|ART_color()I10
AThicker|net@46|||FS0|pin@68||9.25|3|pin@69||8.5|3|ART_color()I10
AThicker|net@47|||FS900|pin@75||10|1|pin@74||10|-1|ART_color()I10
AThicker|net@48|||FS900|pin@64||9.25|1|pin@63||9.25|-1|ART_color()I10
AThicker|net@49|||FS1800|pin@65||8.5|1|pin@64||9.25|1|ART_color()I10
AThicker|net@50|||FS900|pin@76||3.5|1|pin@77||3.5|-1|ART_color()I10
AThicker|net@51|||FS900|pin@79||3.5|9|pin@78||3.5|7|ART_color()I10
AThicker|net@52|||FS900|pin@80||3.5|5|pin@81||3.5|3|ART_color()I10
AThicker|net@53|||FS1800|pin@83||4.25|3|pin@82||5|3|ART_color()I10
AThicker|net@54|||FS900|pin@92||4.25|9|pin@91||4.25|7|ART_color()I10
AThicker|net@55|||FS1800|pin@91||4.25|7|pin@90||5|7|ART_color()I10
AThicker|net@56|||FS0|pin@85||5|5|pin@84||4.25|5|ART_color()I10
AThicker|net@57|||FS900|pin@84||4.25|5|pin@83||4.25|3|ART_color()I10
AThicker|net@58|||FS0|pin@93||5|9|pin@92||4.25|9|ART_color()I10
AThicker|net@59|||FS1800|pin@88||4.25|-1|pin@89||5|-1|ART_color()I10
AThicker|net@60|||FS0|pin@86||5|1|pin@87||4.25|1|ART_color()I10
AThicker|net@61|||FS900|pin@87||4.25|1|pin@88||4.25|-1|ART_color()I10
AThicker|net@62|||FS900|pin@100||-1.5|9|pin@99||-1.5|7|ART_color()I10
AThicker|net@63|||FS900|pin@94||0|10|pin@95||0|9|ART_color()I10
AThicker|net@64|||FS0|pin@95||0|9|pin@96||-0.75|9|ART_color()I10
AThicker|net@65|||FS1800|pin@97||-0.75|7|pin@98||0|7|ART_color()I10
AThicker|net@66|||FS1800|pin@101||-3|8|pin@102||-1.5|8|ART_color()I10
AThicker|net@67|||FS900|pin@96||-0.75|9|pin@97||-0.75|7|ART_color()I10
AThicker|net@68|||FS900|pin@112||-1.5|1|pin@113||-1.5|-1|ART_color()I10
AThicker|net@69|||FS1800|pin@115||-0.75|-1|pin@114||0|-1|ART_color()I10
AThicker|net@70|||FS900|pin@116||-0.75|1|pin@115||-0.75|-1|ART_color()I10
AThicker|net@71|||FS0|pin@117||0|1|pin@116||-0.75|1|ART_color()I10
AThicker|net@72|||FS1350|pin@111||4|-3|pin@110||5|-4|ART_color()I10
AThicker|net@73|||FS2250|pin@110||5|-4|pin@109||6|-3|ART_color()I10
AThicker|net@74|||FS1800|pin@108||-3|0|pin@107||-1.5|0|ART_color()I10
AThicker|net@75|||FS1800|pin@120||-0.75|3|pin@121||0|3|ART_color()I10
AThicker|net@76|||FS0|pin@118||0|5|pin@119||-0.75|5|ART_color()I10
AThicker|net@77|||FS900|pin@123||-1.5|5|pin@122||-1.5|3|ART_color()I10
AThicker|net@78|||FS900|pin@119||-0.75|5|pin@120||-0.75|3|ART_color()I10
AThicker|net@79|||FS0|pin@124||-1.5|4|pin@125||-2.25|4|ART_color()I10
Ed||D5G1;|pin@104||O
Eg||D5G1;|pin@105||I
Eg2||D5G1;|pin@106||I
Eg3||D5G1;|pin@103||I
X

# Cell nms3_sy3;1{sch}
Cnms3_sy3;1{sch}||schematic|1021415734000|1157754726659||ATTR_Delay(D5G1;HNPX-9.5;Y-16.5;)I100|ATTR_X(D5G1;HNOLPX-9.5;Y-15.5;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-7|0||||
NOff-Page|conn@1||-7|-8||||
NOff-Page|conn@2||42.5|4||||
NOff-Page|conn@3||45.5|-4|||YRR|
Inms3;1{ic}|nms3@0||36|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2;Y0.5;)S@X/3.
Inms3;1{ic}|nms3@1||19|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2;Y0.5;)S@X/3.
Inms3;1{ic}|nms3@2||2|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2;Y0.5;)S@X/3.
Inms3_sy3;1{ic}|nms3_sy3@0||45|13|||D0G4;|ATTR_Delay(D5G1;NPX-8.5;Y-1.5;)I100|ATTR_X(D5G1.5;NOLPX-8.5;Y1;)S1
NWire_Pin|pin@0||41|-4||||
NWire_Pin|pin@1||41|0||||
NWire_Pin|pin@2||36|4||||
NWire_Pin|pin@3||32|-4||||
NWire_Pin|pin@4||28|0||||
NWire_Pin|pin@5||23.5|-4||||
NWire_Pin|pin@6||27.5|-8||||
NWire_Pin|pin@7||23.5|-8||||
NWire_Pin|pin@8||31.5|0||||
NWire_Pin|pin@9||19|4||||
NWire_Pin|pin@10||2|4||||
NWire_Pin|pin@11||14.5|0||||
NWire_Pin|pin@12||6.5|-8||||
NWire_Pin|pin@13||10.5|-8||||
NWire_Pin|pin@14||6.5|-4||||
NWire_Pin|pin@15||14|-4||||
NWire_Pin|pin@16||10|0||||
Ngeneric:Invisible-Pin|pin@17||8|12.5|||||ART_message(D5G2;)S[three 3-way symmetric fixed-size N-type transistors to GND]
Ngeneric:Invisible-Pin|pin@18||8|17|||||ART_message(D5G6;)S[nms3_sy3]
Awire|net@0|||0|conn@3|y|43.5|-4|pin@0||41|-4
Awire|net@1|||2700|pin@0||41|-4|pin@1||41|0
Awire|net@2|||0|pin@1||41|0|nms3@0|g3|33|0
Awire|net@3|||1800|pin@2||36|4|conn@2|a|40.5|4
Awire|net@4|||2700|nms3@0|d|36|2|pin@2||36|4
Awire|net@5|||0|pin@2||36|4|pin@9||19|4
Awire|net@6|||0|nms3@0|g2|39|-4|pin@3||32|-4
Awire|net@7|||3150|pin@3||32|-4|pin@4||28|0
Awire|net@8|||0|pin@4||28|0|nms3@1|g3|16|0
Awire|net@9|||0|nms3@0|g3|33|0|pin@8||31.5|0
Awire|net@10|||1800|pin@6||27.5|-8|nms3@0|g|33|-8
Awire|net@11|||1800|nms3@1|g2|22|-4|pin@5||23.5|-4
Awire|net@12|||3150|pin@6||27.5|-8|pin@5||23.5|-4
Awire|net@13|||1800|nms3@1|g|16|-8|pin@7||23.5|-8
Awire|net@14|||450|pin@8||31.5|0|pin@7||23.5|-8
Awire|net@15|||2700|nms3@1|d|19|2|pin@9||19|4
Awire|net@16|||0|pin@9||19|4|pin@10||2|4
Awire|net@17|||900|pin@10||2|4|nms3@2|d|2|2
Awire|net@18|||0|nms3@2|g3|-1|0|conn@0|y|-5|0
Awire|net@19|||0|nms3@2|g|-1|-8|conn@1|y|-5|-8
Awire|net@20|||0|nms3@1|g3|16|0|pin@11||14.5|0
Awire|net@21|||450|pin@11||14.5|0|pin@12||6.5|-8
Awire|net@22|||0|pin@12||6.5|-8|nms3@2|g|-1|-8
Awire|net@23|||0|nms3@1|g|16|-8|pin@13||10.5|-8
Awire|net@24|||3150|pin@13||10.5|-8|pin@14||6.5|-4
Awire|net@25|||0|pin@14||6.5|-4|nms3@2|g2|5|-4
Awire|net@26|||0|nms3@1|g2|22|-4|pin@15||14|-4
Awire|net@27|||3150|pin@15||14|-4|pin@16||10|0
Awire|net@28|||0|pin@16||10|0|nms3@2|g3|-1|0
Ed||D5G2;|conn@2|y|O
Eg||D5G2;|conn@1|a|I
Eg2||D5G2;|conn@3|a|I
Eg3||D5G2;|conn@0|y|I
X

# Cell nms3_sy6;1{ic}
Cnms3_sy6;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX-8.5;Y-1.5;)I100|ATTR_X(D5G1.5;HNOJPX-8.5;Y1;)SLE.getdrive()|prototype_center()I[28000,-16000]
NPin|pin@18||5|1|1|1||
NPin|pin@19||5|3|1|1||
NPin|pin@20||5|7|1|1||
NPin|pin@21||5|5|1|1||
NPin|pin@30||5|11||||
NPin|pin@31||5|10|1|1||
NPin|pin@32||5|-3|1|1||
NPin|pin@35||5|-2||||
NPin|pin@36||5|-1|1|1|Y|
NPin|pin@43||5|9|1|1||
NPin|pin@44||5|10||||
NPin|pin@52||2.5|0|1|1|Y|
NPin|pin@53||3.5|0||||
NPin|pin@54||3.5|8||||
NPin|pin@55||2.5|8|1|1|Y|
NPin|pin@56||7.5|4|1|1|XY|
NPin|pin@57||6.5|4||||
NPin|pin@76||3.5|1|1|1|YRR|
NPin|pin@77||3.5|-1|1|1|YRR|
NPin|pin@78||3.5|7|1|1|YRR|
NPin|pin@79||3.5|9|1|1|YRR|
NPin|pin@80||6.5|5|1|1|XYRR|
NPin|pin@81||6.5|3|1|1|XYRR|
NPin|pin@82||5|3|1|1|YRR|
NPin|pin@83||5.75|3|1|1|YRR|
NPin|pin@84||5.75|5|1|1|YRR|
NPin|pin@85||5|5|1|1|YRR|
NPin|pin@86||5|1|1|1||
NPin|pin@87||4.25|1|1|1||
NPin|pin@88||4.25|-1|1|1||
NPin|pin@89||5|-1|1|1||
NPin|pin@90||5|7|1|1||
NPin|pin@91||4.25|7|1|1||
NPin|pin@92||4.25|9|1|1||
NPin|pin@93||5|9|1|1||
Ngeneric:Invisible-Pin|pin@103||2.5|8||||
Nschematic:Bus_Pin|pin@104||5|11|-2|-2||
Nschematic:Bus_Pin|pin@105||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@106||7.5|4|-2|-2||
NPin|pin@109||6|-3|1|1||
NPin|pin@110||5|-4||||
NPin|pin@111||4|-3|1|1||
Ngeneric:Invisible-Pin|pin@126||3.25|4|||||ART_message(D5G1;)S[6-way,sym]
AThicker|net@12|||FS900|pin@19||5|3|pin@18||5|1|ART_color()I10
AThicker|net@13|||FS900|pin@20||5|7|pin@21||5|5|ART_color()I10
AThicker|net@21|||FS2700|pin@31||5|10|pin@30||5|11|ART_color()I10
AThicker|net@22|||FS900|pin@35||5|-2|pin@32||5|-3|ART_color()I10
AThicker|net@23|||FS0|pin@32||5|-3|pin@111||4|-3|ART_color()I10
AThicker|net@24|||FS0|pin@109||6|-3|pin@32||5|-3|ART_color()I10
AThicker|net@28|||FS900|pin@36||5|-1|pin@35||5|-2|ART_color()I10
AThicker|net@31|||FS2700|pin@43||5|9|pin@44||5|10|ART_color()I10
AThicker|net@35|||FS1800|pin@52||2.5|0|pin@53||3.5|0|ART_color()I10
AThicker|net@36|||FS1800|pin@55||2.5|8|pin@54||3.5|8|ART_color()I10
AThicker|net@37|||FS0|pin@56||7.5|4|pin@57||6.5|4|ART_color()I10
AThicker|net@50|||FS2700|pin@77||3.5|-1|pin@76||3.5|1|ART_color()I10
AThicker|net@51|||FS2700|pin@78||3.5|7|pin@79||3.5|9|ART_color()I10
AThicker|net@52|||FS2700|pin@81||6.5|3|pin@80||6.5|5|ART_color()I10
AThicker|net@53|||FS1800|pin@82||5|3|pin@83||5.75|3|ART_color()I10
AThicker|net@54|||FS2700|pin@91||4.25|7|pin@92||4.25|9|ART_color()I10
AThicker|net@55|||FS0|pin@90||5|7|pin@91||4.25|7|ART_color()I10
AThicker|net@56|||FS0|pin@84||5.75|5|pin@85||5|5|ART_color()I10
AThicker|net@57|||FS2700|pin@83||5.75|3|pin@84||5.75|5|ART_color()I10
AThicker|net@58|||FS1800|pin@92||4.25|9|pin@93||5|9|ART_color()I10
AThicker|net@59|||FS0|pin@89||5|-1|pin@88||4.25|-1|ART_color()I10
AThicker|net@60|||FS1800|pin@87||4.25|1|pin@86||5|1|ART_color()I10
AThicker|net@61|||FS2700|pin@88||4.25|-1|pin@87||4.25|1|ART_color()I10
AThicker|net@72|||FS3150|pin@110||5|-4|pin@111||4|-3|ART_color()I10
AThicker|net@73|||FS450|pin@109||6|-3|pin@110||5|-4|ART_color()I10
Ed||D5G1;|pin@104||O
Eg||D5G1;|pin@105||I
Eg2||D5G1;|pin@106||I
Eg3||D5G1;|pin@103||I
X

# Cell nms3_sy6;1{sch}
Cnms3_sy6;1{sch}||schematic|1021415734000|1112291892397||ATTR_Delay(D5G1;HNPX-9.5;Y-16.5;)I100|ATTR_X(D5G1;HNOJPX-9.5;Y-15.5;)SLE.getdrive()|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-7|0||||
NOff-Page|conn@1||-7|-8||||
NOff-Page|conn@2||98.5|4||||
NOff-Page|conn@3||98.5|-4|||YRR|
Inms3;1{ic}|nms3@0||36|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX-2;Y0.5;)S@X/6.
Inms3;1{ic}|nms3@1||19|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX-2;Y0.5;)S@X/6.
Inms3;1{ic}|nms3@2||2|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX-2;Y0.5;)S@X/6.
Inms3;1{ic}|nms3@3||53|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX-2;Y0.5;)S@X/6.
Inms3;1{ic}|nms3@4||70|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX-2;Y0.5;)S@X/6.
Inms3;1{ic}|nms3@5||87|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX-2;Y0.5;)S@X/6.
Inms3_sy6;1{ic}|nms3_sy3@0||69.5|13.5|||D0G4;|ATTR_Delay(D5G1;NPX-8.5;Y-1.5;)I100|ATTR_X(D5G1.5;NOJPX-8.5;Y1;)SLE.getdrive()
NWire_Pin|pin@0||93.5|-4||||
NWire_Pin|pin@1||93.5|-8||||
NWire_Pin|pin@2||36|4||||
NWire_Pin|pin@3||32|-4||||
NWire_Pin|pin@4||28|0||||
NWire_Pin|pin@5||23.5|-4||||
NWire_Pin|pin@6||27.5|-8||||
NWire_Pin|pin@7||23.5|-8||||
NWire_Pin|pin@8||31.5|0||||
NWire_Pin|pin@9||19|4||||
NWire_Pin|pin@10||2|4||||
NWire_Pin|pin@11||14.5|0||||
NWire_Pin|pin@12||6.5|-8||||
NWire_Pin|pin@13||10.5|-8||||
NWire_Pin|pin@14||6.5|-4||||
NWire_Pin|pin@15||14|-4||||
NWire_Pin|pin@16||10|0||||
Ngeneric:Invisible-Pin|pin@17||32.5|13|||||ART_message(D5G2;)Sthree 6-way symmetric fixed-size N-type transistors to GND
Ngeneric:Invisible-Pin|pin@18||32.5|17.5|||||ART_message(D5G6;)Snms3_sy6
NWire_Pin|pin@23||46|-4||||
NWire_Pin|pin@24||42|0||||
NWire_Pin|pin@25||42|-4|||X|
NWire_Pin|pin@26||46|0|||X|
NWire_Pin|pin@27||53|4||||
NWire_Pin|pin@28||59|-4|||X|
NWire_Pin|pin@29||63|0|||X|
NWire_Pin|pin@30||63|-4|||X|
NWire_Pin|pin@31||59|-8|||X|
NWire_Pin|pin@32||65|-8|||X|
NWire_Pin|pin@33||57|0|||X|
NWire_Pin|pin@34||70|4||||
NWire_Pin|pin@35||87|4||||
NWire_Pin|pin@36||80|-4|||X|
NWire_Pin|pin@37||76|-8|||X|
NWire_Pin|pin@38||80|0|||X|
NWire_Pin|pin@39||76|-4|||X|
NWire_Pin|pin@40||82.5|-8|||X|
NWire_Pin|pin@41||74.5|0|||X|
Awire|net@0|||1800|pin@0||93.5|-4|conn@3|y|96.5|-4
Awire|net@1|||2700|pin@1||93.5|-8|pin@0||93.5|-4
Awire|net@3|||0|pin@35||87|4|pin@34||70|4
Awire|net@4|||900|pin@2||36|4|nms3@0|d|36|2
Awire|net@5|||1800|pin@9||19|4|pin@2||36|4
Awire|net@6|||1800|pin@3||32|-4|nms3@0|g2|39|-4
Awire|net@7|||1350|pin@4||28|0|pin@3||32|-4
Awire|net@8|||1800|nms3@1|g3|16|0|pin@4||28|0
Awire|net@9|||1800|pin@8||31.5|0|nms3@0|g3|33|0
Awire|net@10|||0|nms3@0|g|33|-8|pin@6||27.5|-8
Awire|net@11|||0|pin@5||23.5|-4|nms3@1|g2|22|-4
Awire|net@12|||1350|pin@5||23.5|-4|pin@6||27.5|-8
Awire|net@13|||0|pin@7||23.5|-8|nms3@1|g|16|-8
Awire|net@14|||2250|pin@7||23.5|-8|pin@8||31.5|0
Awire|net@15|||900|pin@9||19|4|nms3@1|d|19|2
Awire|net@16|||1800|pin@10||2|4|pin@9||19|4
Awire|net@17|||2700|nms3@2|d|2|2|pin@10||2|4
Awire|net@18|||1800|conn@0|y|-5|0|nms3@2|g3|-1|0
Awire|net@19|||1800|conn@1|y|-5|-8|nms3@2|g|-1|-8
Awire|net@20|||1800|pin@11||14.5|0|nms3@1|g3|16|0
Awire|net@21|||2250|pin@12||6.5|-8|pin@11||14.5|0
Awire|net@22|||1800|nms3@2|g|-1|-8|pin@12||6.5|-8
Awire|net@23|||1800|pin@13||10.5|-8|nms3@1|g|16|-8
Awire|net@24|||1350|pin@14||6.5|-4|pin@13||10.5|-8
Awire|net@25|||1800|nms3@2|g2|5|-4|pin@14||6.5|-4
Awire|net@26|||1800|pin@15||14|-4|nms3@1|g2|22|-4
Awire|net@27|||1350|pin@16||10|0|pin@15||14|-4
Awire|net@28|||1800|nms3@2|g3|-1|0|pin@16||10|0
Awire|net@29|||1800|nms3@0|g|33|-8|nms3@3|g|50|-8
Awire|net@34|||1350|pin@24||42|0|pin@23||46|-4
Awire|net@35|||0|pin@24||42|0|nms3@0|g3|33|0
Awire|net@36|||1800|pin@23||46|-4|nms3@3|g2|56|-4
Awire|net@37|||450|pin@26||46|0|pin@25||42|-4
Awire|net@38|||0|pin@25||42|-4|nms3@0|g2|39|-4
Awire|net@39|||1800|pin@26||46|0|nms3@3|g3|50|0
Awire|net@40|||0|pin@27||53|4|pin@2||36|4
Awire|net@41|||2700|nms3@3|d|53|2|pin@27||53|4
Awire|net@42|||450|pin@29||63|0|pin@28||59|-4
Awire|net@43|||0|pin@28||59|-4|nms3@3|g2|56|-4
Awire|net@44|||1800|pin@29||63|0|nms3@4|g3|67|0
Awire|net@45|||450|pin@30||63|-4|pin@31||59|-8
Awire|net@46|||0|pin@31||59|-8|nms3@3|g|50|-8
Awire|net@47|||1800|pin@30||63|-4|nms3@4|g2|73|-4
Awire|net@48|||3150|pin@32||65|-8|pin@33||57|0
Awire|net@49|||1800|pin@32||65|-8|nms3@4|g|67|-8
Awire|net@50|||0|pin@33||57|0|nms3@3|g3|50|0
Awire|net@51|||0|pin@34||70|4|pin@27||53|4
Awire|net@52|||2700|nms3@4|d|70|2|pin@34||70|4
Awire|net@53|||0|conn@2|a|96.5|4|pin@35||87|4
Awire|net@54|||2700|nms3@5|d|87|2|pin@35||87|4
Awire|net@55|||450|pin@36||80|-4|pin@37||76|-8
Awire|net@56|||0|pin@37||76|-8|nms3@4|g|67|-8
Awire|net@57|||1800|pin@36||80|-4|nms3@5|g2|90|-4
Awire|net@58|||450|pin@38||80|0|pin@39||76|-4
Awire|net@59|||0|pin@39||76|-4|nms3@4|g2|73|-4
Awire|net@60|||1800|pin@38||80|0|nms3@5|g3|84|0
Awire|net@61|||3150|pin@40||82.5|-8|pin@41||74.5|0
Awire|net@62|||1800|pin@40||82.5|-8|nms3@5|g|84|-8
Awire|net@63|||0|pin@41||74.5|0|nms3@4|g3|67|0
Awire|net@64|||0|pin@1||93.5|-8|nms3@5|g|84|-8
Ed||D5G2;|conn@2|y|O
Eg||D5G2;|conn@1|a|I
Eg2||D5G2;|conn@3|a|I
Eg3||D5G2;|conn@0|y|I
X

# Cell nms3a;1{ic}
Cnms3a;1{ic}|nms3|artwork|1021415734000|1228434950634|E|ATTR_Delay(D5G1;HNPX-7.5;Y-3.5;)I100|ATTR_X(D5G1;HNOLPX-7.5;Y-2.5;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NPin|pin@0||-3|4|1|1|Y|
NPin|pin@1||-1.5|4||||
NPin|pin@2||0|2|1|1|YRR|
NPin|pin@3||-1.5|5|1|1|YRR|
NPin|pin@4||-1.5|3|1|1|YRR|
NPin|pin@5||0|3|1|1|YRR|
NPin|pin@6||-0.75|3|1|1|YRR|
NPin|pin@7||-0.75|5|1|1|YRR|
NPin|pin@8||0|5|1|1|YRR|
NPin|pin@9||0|6|||RR|
NPin|pin@10||0|2|1|1||
NPin|pin@11||0|1|1|1||
NPin|pin@12||-0.75|1|1|1||
NPin|pin@13||-0.75|-1|1|1||
NPin|pin@14||0|-1|1|1||
NPin|pin@15||-1.5|-1|1|1||
NPin|pin@16||-1.5|1|1|1||
NPin|pin@17||-1|-2|1|1||
NPin|pin@18||0|-3||||
NPin|pin@19||1|-2|1|1||
NPin|pin@20||0|-2|1|1||
NPin|pin@21||-3|0|||RR|
NPin|pin@22||-1.5|0|1|1|RR|
Nschematic:Bus_Pin|pin@23||-3|4|-2|-2||
Nschematic:Bus_Pin|pin@24||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@25||0|10|-2|-2||
Ngeneric:Invisible-Pin|pin@26||-3|8||||
NPin|pin@27||-1.5|8|1|1|RR|
NPin|pin@28||-3|8|||RR|
NPin|pin@29||0|6|1|1||
NPin|pin@30||-1.5|9|1|1||
NPin|pin@31||-1.5|7|1|1||
NPin|pin@32||0|7|1|1||
NPin|pin@33||-0.75|7|1|1||
NPin|pin@34||-0.75|9|1|1||
NPin|pin@35||0|9|1|1||
NPin|pin@36||0|10||||
AThicker|net@0|||FS0|pin@1||-1.5|4|pin@0||-3|4|ART_color()I10
AThicker|net@1|||FS900|pin@7||-0.75|5|pin@6||-0.75|3|ART_color()I10
AThicker|net@2|||FS900|pin@3||-1.5|5|pin@4||-1.5|3|ART_color()I10
AThicker|net@3|||FS0|pin@8||0|5|pin@7||-0.75|5|ART_color()I10
AThicker|net@4|||FS900|pin@9||0|6|pin@8||0|5|ART_color()I10
AThicker|net@5|||FS1800|pin@6||-0.75|3|pin@5||0|3|ART_color()I10
AThicker|net@6|||FS900|pin@5||0|3|pin@2||0|2|ART_color()I10
AThicker|net@7|||FS1800|pin@21||-3|0|pin@22||-1.5|0|ART_color()I10
AThicker|net@8|||FS2250|pin@18||0|-3|pin@19||1|-2|ART_color()I10
AThicker|net@9|||FS0|pin@20||0|-2|pin@17||-1|-2|ART_color()I10
AThicker|net@10|||FS1350|pin@17||-1|-2|pin@18||0|-3|ART_color()I10
AThicker|net@11|||FS0|pin@19||1|-2|pin@20||0|-2|ART_color()I10
AThicker|net@12|||FS0|pin@11||0|1|pin@12||-0.75|1|ART_color()I10
AThicker|net@13|||FS900|pin@12||-0.75|1|pin@13||-0.75|-1|ART_color()I10
AThicker|net@14|||FS900|pin@10||0|2|pin@11||0|1|ART_color()I10
AThicker|net@15|||FS900|pin@14||0|-1|pin@20||0|-2|ART_color()I10
AThicker|net@16|||FS1800|pin@13||-0.75|-1|pin@14||0|-1|ART_color()I10
AThicker|net@17|||FS900|pin@16||-1.5|1|pin@15||-1.5|-1|ART_color()I10
AThicker|net@18|||FS900|pin@34||-0.75|9|pin@33||-0.75|7|ART_color()I10
AThicker|net@19|||FS1800|pin@28||-3|8|pin@27||-1.5|8|ART_color()I10
AThicker|net@20|||FS900|pin@32||0|7|pin@29||0|6|ART_color()I10
AThicker|net@21|||FS1800|pin@33||-0.75|7|pin@32||0|7|ART_color()I10
AThicker|net@22|||FS0|pin@35||0|9|pin@34||-0.75|9|ART_color()I10
AThicker|net@23|||FS900|pin@36||0|10|pin@35||0|9|ART_color()I10
AThicker|net@24|||FS900|pin@30||-1.5|9|pin@31||-1.5|7|ART_color()I10
Ed||D5G1;|pin@25||O
Eg||D5G1;|pin@24||I
Eg2||D5G1;|pin@23||I
Eg3||D5G1;|pin@26||I
X

# Cell nms3b;1{ic}
Cnms3b;1{ic}|nms3|artwork|1021415734000|1228435116714|E|ATTR_Delay(D5G1;HNPX-9.5;Y-16.5;)I100|ATTR_X(D5G1;HNOLPX-9.5;Y-15.5;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NPin|pin@0||1.5|4|1|1|Y|
NPin|pin@1||3|4||||
NPin|pin@2||0|2|1|1|YRR|
NPin|pin@3||1.5|5|1|1|YRR|
NPin|pin@4||1.5|3|1|1|YRR|
NPin|pin@5||0|3|1|1|YRR|
NPin|pin@6||0.75|3|1|1|YRR|
NPin|pin@7||0.75|5|1|1|YRR|
NPin|pin@8||0|5|1|1|YRR|
NPin|pin@9||0|6|||RR|
NPin|pin@10||0|2|1|1||
NPin|pin@11||0|1|1|1||
NPin|pin@12||-0.75|1|1|1||
NPin|pin@13||-0.75|-1|1|1||
NPin|pin@14||0|-1|1|1||
NPin|pin@15||-1.5|-1|1|1||
NPin|pin@16||-1.5|1|1|1||
NPin|pin@17||-1|-2|1|1||
NPin|pin@18||0|-3||||
NPin|pin@19||1|-2|1|1||
NPin|pin@20||0|-2|1|1||
NPin|pin@21||-3|0|||RR|
NPin|pin@22||-1.5|0|1|1|RR|
Nschematic:Bus_Pin|pin@23||3|4|-2|-2||
Nschematic:Bus_Pin|pin@24||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@25||0|10|-2|-2||
Ngeneric:Invisible-Pin|pin@26||3|8||||
NPin|pin@27||3|8|1|1|RR|
NPin|pin@28||1.5|8|||RR|
NPin|pin@29||0|6|1|1||
NPin|pin@30||1.5|9|1|1||
NPin|pin@31||1.5|7|1|1||
NPin|pin@32||0|7|1|1||
NPin|pin@33||0.75|7|1|1||
NPin|pin@34||0.75|9|1|1||
NPin|pin@35||0|9|1|1||
NPin|pin@36||0|10||||
AThicker|net@0|||FS0|pin@1||3|4|pin@0||1.5|4|ART_color()I10
AThicker|net@1|||FS900|pin@7||0.75|5|pin@6||0.75|3|ART_color()I10
AThicker|net@2|||FS900|pin@3||1.5|5|pin@4||1.5|3|ART_color()I10
AThicker|net@3|||FS1800|pin@8||0|5|pin@7||0.75|5|ART_color()I10
AThicker|net@4|||FS900|pin@9||0|6|pin@8||0|5|ART_color()I10
AThicker|net@5|||FS0|pin@6||0.75|3|pin@5||0|3|ART_color()I10
AThicker|net@6|||FS900|pin@5||0|3|pin@2||0|2|ART_color()I10
AThicker|net@7|||FS1800|pin@21||-3|0|pin@22||-1.5|0|ART_color()I10
AThicker|net@8|||FS2250|pin@18||0|-3|pin@19||1|-2|ART_color()I10
AThicker|net@9|||FS0|pin@20||0|-2|pin@17||-1|-2|ART_color()I10
AThicker|net@10|||FS1350|pin@17||-1|-2|pin@18||0|-3|ART_color()I10
AThicker|net@11|||FS0|pin@19||1|-2|pin@20||0|-2|ART_color()I10
AThicker|net@12|||FS0|pin@11||0|1|pin@12||-0.75|1|ART_color()I10
AThicker|net@13|||FS900|pin@12||-0.75|1|pin@13||-0.75|-1|ART_color()I10
AThicker|net@14|||FS900|pin@10||0|2|pin@11||0|1|ART_color()I10
AThicker|net@15|||FS900|pin@14||0|-1|pin@20||0|-2|ART_color()I10
AThicker|net@16|||FS1800|pin@13||-0.75|-1|pin@14||0|-1|ART_color()I10
AThicker|net@17|||FS900|pin@16||-1.5|1|pin@15||-1.5|-1|ART_color()I10
AThicker|net@18|||FS900|pin@34||0.75|9|pin@33||0.75|7|ART_color()I10
AThicker|net@19|||FS1800|pin@28||1.5|8|pin@27||3|8|ART_color()I10
AThicker|net@20|||FS900|pin@32||0|7|pin@29||0|6|ART_color()I10
AThicker|net@21|||FS0|pin@33||0.75|7|pin@32||0|7|ART_color()I10
AThicker|net@22|||FS1800|pin@35||0|9|pin@34||0.75|9|ART_color()I10
AThicker|net@23|||FS900|pin@36||0|10|pin@35||0|9|ART_color()I10
AThicker|net@24|||FS900|pin@30||1.5|9|pin@31||1.5|7|ART_color()I10
Ed||D5G1;|pin@25||O
Eg||D5G1;|pin@24||I
Eg2||D5G1;|pin@23||I
Eg3||D5G1;|pin@26||I
X

# Cell nms3c;1{ic}
Cnms3c;1{ic}|nms3|artwork|1021415734000|1228435227802|E|ATTR_Delay(D5G1;HNPX-5;Y3;)I100|ATTR_X(D5G1;HNOLPX-5;Y4;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NPin|pin@0||1.5|4|1|1|Y|
NPin|pin@1||3|4||||
NPin|pin@2||0|2|1|1|YRR|
NPin|pin@3||1.5|5|1|1|YRR|
NPin|pin@4||1.5|3|1|1|YRR|
NPin|pin@5||0|3|1|1|YRR|
NPin|pin@6||0.75|3|1|1|YRR|
NPin|pin@7||0.75|5|1|1|YRR|
NPin|pin@8||0|5|1|1|YRR|
NPin|pin@9||0|6|||RR|
NPin|pin@10||0|2|1|1||
NPin|pin@11||0|1|1|1||
NPin|pin@12||0.75|1|1|1||
NPin|pin@13||0.75|-1|1|1||
NPin|pin@14||0|-1|1|1||
NPin|pin@15||1.5|-1|1|1||
NPin|pin@16||1.5|1|1|1||
NPin|pin@17||-1|-2|1|1||
NPin|pin@18||0|-3||||
NPin|pin@19||1|-2|1|1||
NPin|pin@20||0|-2|1|1||
NPin|pin@21||1.5|0|||RR|
NPin|pin@22||3|0|1|1|RR|
Nschematic:Bus_Pin|pin@23||3|4|-2|-2||
Nschematic:Bus_Pin|pin@24||3|0|-2|-2||
Nschematic:Bus_Pin|pin@25||0|10|-2|-2||
Ngeneric:Invisible-Pin|pin@26||-3|8||||
NPin|pin@27||-1.5|8|1|1|RR|
NPin|pin@28||-3|8|||RR|
NPin|pin@29||0|6|1|1||
NPin|pin@30||-1.5|9|1|1||
NPin|pin@31||-1.5|7|1|1||
NPin|pin@32||0|7|1|1||
NPin|pin@33||-0.75|7|1|1||
NPin|pin@34||-0.75|9|1|1||
NPin|pin@35||0|9|1|1||
NPin|pin@36||0|10||||
AThicker|net@0|||FS0|pin@1||3|4|pin@0||1.5|4|ART_color()I10
AThicker|net@1|||FS900|pin@7||0.75|5|pin@6||0.75|3|ART_color()I10
AThicker|net@2|||FS900|pin@3||1.5|5|pin@4||1.5|3|ART_color()I10
AThicker|net@3|||FS1800|pin@8||0|5|pin@7||0.75|5|ART_color()I10
AThicker|net@4|||FS900|pin@9||0|6|pin@8||0|5|ART_color()I10
AThicker|net@5|||FS0|pin@6||0.75|3|pin@5||0|3|ART_color()I10
AThicker|net@6|||FS900|pin@5||0|3|pin@2||0|2|ART_color()I10
AThicker|net@7|||FS1800|pin@21||1.5|0|pin@22||3|0|ART_color()I10
AThicker|net@8|||FS2250|pin@18||0|-3|pin@19||1|-2|ART_color()I10
AThicker|net@9|||FS0|pin@20||0|-2|pin@17||-1|-2|ART_color()I10
AThicker|net@10|||FS1350|pin@17||-1|-2|pin@18||0|-3|ART_color()I10
AThicker|net@11|||FS0|pin@19||1|-2|pin@20||0|-2|ART_color()I10
AThicker|net@12|||FS1800|pin@11||0|1|pin@12||0.75|1|ART_color()I10
AThicker|net@13|||FS900|pin@12||0.75|1|pin@13||0.75|-1|ART_color()I10
AThicker|net@14|||FS900|pin@10||0|2|pin@11||0|1|ART_color()I10
AThicker|net@15|||FS900|pin@14||0|-1|pin@20||0|-2|ART_color()I10
AThicker|net@16|||FS0|pin@13||0.75|-1|pin@14||0|-1|ART_color()I10
AThicker|net@17|||FS900|pin@16||1.5|1|pin@15||1.5|-1|ART_color()I10
AThicker|net@18|||FS900|pin@34||-0.75|9|pin@33||-0.75|7|ART_color()I10
AThicker|net@19|||FS1800|pin@28||-3|8|pin@27||-1.5|8|ART_color()I10
AThicker|net@20|||FS900|pin@32||0|7|pin@29||0|6|ART_color()I10
AThicker|net@21|||FS1800|pin@33||-0.75|7|pin@32||0|7|ART_color()I10
AThicker|net@22|||FS0|pin@35||0|9|pin@34||-0.75|9|ART_color()I10
AThicker|net@23|||FS900|pin@36||0|10|pin@35||0|9|ART_color()I10
AThicker|net@24|||FS900|pin@30||-1.5|9|pin@31||-1.5|7|ART_color()I10
Ed||D5G1;|pin@25||O
Eg||D5G1;|pin@24||I
Eg2||D5G1;|pin@23||I
Eg3||D5G1;|pin@26||I
X

# Cell nor2;1{ic}
Cnor2;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.25;Y2.25;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NThick-Circle|art@2||-1.5|-2|8|7|YRRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@3||-1.5|2|8|7|RRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@4||-3.75|0|6|6|3200||ART_color()I10|ART_degrees()I800
Nschematic:Bus_Pin|pin@0||-2.5|-1|-2|-2||
NPin|pin@1||-1|-1|1|1||
NPin|pin@2||-2.5|-1||||
Nschematic:Bus_Pin|pin@3||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@4||2.5|0|-2|-2||
NPin|pin@5||-2.5|1||||
NPin|pin@6||-1|1|1|1||
NPin|pin@7||-1|-1.25|1|1||
NPin|pin@8||-0.5|-1.75|1|1||
AThicker|net@0|||FS0|pin@1||-1|-1|pin@2||-2.5|-1|ART_color()I10
AThicker|net@1|||FS0|pin@6||-1|1|pin@5||-2.5|1|ART_color()I10
AThicker|net@2|||FS3150|pin@8||-0.5|-1.75|pin@7||-1|-1.25|ART_color()I10
Eina||D5G1;|pin@0||I
Einb||D5G1;|pin@3||I
Eout||D5G1;|pin@4||O
X

# Cell nor2;1{sch}
Cnor2;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-18;Y-6;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-18;Y-5;)S1|ATTR_drive0(D5G1;HNPTX-18;Y-7;)Sstrong0|ATTR_drive1(D5G1;HNPTX-18;Y-8;)Sstrong1|ATTR_verilog_template(D5G1;NTX5.5;Y-18.5;)Snor ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@2||-4|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
INMOS;1{ic}|NMOS@3||4|-8|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-15.5|0||||
NOff-Page|conn@1||14|-8|||RR|
NOff-Page|conn@2||14|0||||
NGround|gnd@0||0|-15||||
Inor2;1{ic}|nor2@0||24.5|14.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NPX2.25;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Inor2nn;1{ic}|nor2nn@0||25|8|||D5G4;|ATTR_Delay(D5G1;NPX-18;Y-6;)I100|ATTR_X(D5FLeave alone;G1;NPX-18;Y-5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
NWire_Pin|pin@0||0|-11.5||||
NWire_Pin|pin@1||-4|-11.5||||
NWire_Pin|pin@2||4|-11.5||||
NWire_Pin|pin@3||-9|-8||||
Ngeneric:Invisible-Pin|pin@4||-2|14.5|||||ART_message(D5G2;)S[one-parameter fixed-size NOR]
NWire_Pin|pin@5||-9|0||||
NWire_Pin|pin@6||9|4||||
NWire_Pin|pin@7||9|-8||||
Ngeneric:Invisible-Pin|pin@8||-2|19.5|||||ART_message(D5G6;)S[nor2]
NWire_Pin|pin@9||-9|8||||
NWire_Pin|pin@10||0|0||||
NWire_Pin|pin@11||4|0||||
NWire_Pin|pin@12||-4|0||||
Ngeneric:Invisible-Pin|pin@13||27|-14|||||ART_message(D5G2;)S[X is drive strength,One pull-down is as strong,as the pull-up]
Ipms2;1{ic}|pms2@0||0|8|||D0G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y1;)S@X
Awire|net@0|||0|pin@7||9|-8|NMOS@3|g|7|-8
Awire|net@1|||900|pin@0||0|-11.5|gnd@0||0|-13
Awire|net@2|||0|pin@2||4|-11.5|pin@0||0|-11.5
Awire|net@3|||0|pin@0||0|-11.5|pin@1||-4|-11.5
Awire|net@4|||900|NMOS@2|s|-4|-10|pin@1||-4|-11.5
Awire|net@5|||2700|pin@2||4|-11.5|NMOS@3|s|4|-10
Awire|net@6|||900|pin@12||-4|0|NMOS@2|d|-4|-6
Awire|net@7|||0|NMOS@2|g|-7|-8|pin@3||-9|-8
Awire|net@8|||900|pin@11||4|0|NMOS@3|d|4|-6
Awire|net@9|||2700|pin@3||-9|-8|pin@5||-9|0
Awire|net@10|||0|pin@5||-9|0|conn@0|y|-13.5|0
Awire|net@11|||2700|pin@7||9|-8|pin@6||9|4
Awire|net@12|||1800|pin@7||9|-8|conn@1|y|12|-8
Awire|net@13|||0|pin@6||9|4|pms2@0|g2|3|4
Awire|net@14|||1800|pin@9||-9|8|pms2@0|g|-3|8
Awire|net@15|||2700|pin@10||0|0|pms2@0|d|0|2
Awire|net@16|||0|pin@11||4|0|pin@10||0|0
Awire|net@17|||0|pin@10||0|0|pin@12||-4|0
Awire|net@18|||2700|pin@5||-9|0|pin@9||-9|8
Awire|net@19|||1800|pin@11||4|0|conn@2|a|12|0
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell nor2HT_sy;1{ic}
Cnor2HT_sy;1{ic}||artwork|1021415734000|1223674999787|E|ATTR_Delay(D5G1;HNPX2.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.25;Y2.25;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-3.75|0|6|6|3200||ART_color()I10|ART_degrees()I800
NThick-Circle|art@2||-1.5|2|8|7|RRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@3||-1.5|-2|8|7|YRRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@4||2|0|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@5||0.2|0|0.5|1|||ART_color()I10|trace()V[-0.25/-0.5,-0.25/0.5,-0.25/0,0.25/0,0.25/0.5,0.25/-0.5]
NPin|pin@0||-1|-1.25|1|1||
NPin|pin@1||-1|1|1|1||
NPin|pin@2||-2.5|1||||
Nschematic:Bus_Pin|pin@3||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@4||-2.5|1|-2|-2||
NPin|pin@5||-2.5|-1||||
NPin|pin@6||-1|-1|1|1||
Nschematic:Bus_Pin|pin@7||-2.5|-1|-2|-2||
AThicker|net@0|||FS2700|pin@0||-1|-1.25|pin@0||-1|-1.25|ART_color()I78
AThicker|net@1|||FS0|pin@1||-1|1|pin@2||-2.5|1|ART_color()I10
AThicker|net@2|||FS0|pin@6||-1|-1|pin@5||-2.5|-1|ART_color()I10
Eina||D5G1;|pin@7||I
Einb||D5G1;|pin@4||I
Eout||D5G1;|pin@3||O
X

# Cell nor2HT_sy;1{sch}
Cnor2HT_sy;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-18;Y-6;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-18;Y-5;)S1|ATTR_drive0(D5G1;HNPTX-18;Y-7;)Sstrong0|ATTR_drive1(D5G1;HNPTX-18;Y-8;)Sstrong1|ATTR_verilog_template(D5G1;NTX5.5;Y-18.5;)Snor ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@2||4|-8|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPY2;)S@X/2.
INMOS;1{ic}|NMOS@3||-4|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPY2;)S@X/2.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||14|0||||
NOff-Page|conn@1||14|-8|||RR|
NOff-Page|conn@2||-15.5|0||||
NGround|gnd@0||0|-15||||
Inor2HT_sy;1{ic}|nor2HT_s@0||29.5|17|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y2.25;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_LEGATE(T)I1|ATTR_LEPARALLGRP()I-1|ATTR_su(T)I-1
Inor2HT_sya;2{ic}|nor2HT_s@1||30.5|9.5|||D5G4;|ATTR_Delay(D5G1;NPX4;Y-1.75;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.75;Y2.75;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ngeneric:Invisible-Pin|pin@0||27|-14|||||ART_message(D5G2;)S[X is drive strength,Both pull-downs are,as strong as the pull-up]
NWire_Pin|pin@1||-4|0||||
NWire_Pin|pin@2||4|0||||
NWire_Pin|pin@3||0|0||||
NWire_Pin|pin@4||-9|8||||
Ngeneric:Invisible-Pin|pin@5||-2|19.5|||||ART_message(D5G6;)Snor2HT_sy
NWire_Pin|pin@6||9|-8||||
NWire_Pin|pin@7||9|4||||
NWire_Pin|pin@8||-9|0||||
Ngeneric:Invisible-Pin|pin@9||-2|14.5|||||ART_message(D5G2;)S[one-parameter fixed-size symmetric NOR]
NWire_Pin|pin@10||-9|-8||||
NWire_Pin|pin@11||4|-11.5||||
NWire_Pin|pin@12||-4|-11.5||||
NWire_Pin|pin@13||0|-11.5||||
Ipms2_sy;1{ic}|pms2_sy@0||0|8|||D0G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX4.25;Y1;)S@X
Awire|net@0|||1800|NMOS@2|g|7|-8|pin@6||9|-8
Awire|net@1|||0|pin@7||9|4|pms2_sy@0|g2|3|4
Awire|net@2|||1800|pin@4||-9|8|pms2_sy@0|g|-3|8
Awire|net@3|||2700|pin@3||0|0|pms2_sy@0|d|0|2
Awire|net@4|||1800|pin@2||4|0|conn@0|a|12|0
Awire|net@5|||2700|pin@8||-9|0|pin@4||-9|8
Awire|net@6|||0|pin@3||0|0|pin@1||-4|0
Awire|net@7|||0|pin@2||4|0|pin@3||0|0
Awire|net@8|||1800|pin@6||9|-8|conn@1|y|12|-8
Awire|net@9|||2700|pin@6||9|-8|pin@7||9|4
Awire|net@10|||0|pin@8||-9|0|conn@2|y|-13.5|0
Awire|net@11|||2700|pin@10||-9|-8|pin@8||-9|0
Awire|net@12|||900|pin@2||4|0|NMOS@2|d|4|-6
Awire|net@13|||0|NMOS@3|g|-7|-8|pin@10||-9|-8
Awire|net@14|||900|pin@1||-4|0|NMOS@3|d|-4|-6
Awire|net@15|||2700|pin@11||4|-11.5|NMOS@2|s|4|-10
Awire|net@16|||900|NMOS@3|s|-4|-10|pin@12||-4|-11.5
Awire|net@17|||0|pin@13||0|-11.5|pin@12||-4|-11.5
Awire|net@18|||0|pin@11||4|-11.5|pin@13||0|-11.5
Awire|net@19|||900|pin@13||0|-11.5|gnd@0||0|-13
Eina||D5G2;|conn@2|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell nor2HT_sya;2{ic}
Cnor2HT_sya;2{ic}|nor2HT_sy|artwork|1021415734000|1223675184366|E|ATTR_Delay(D5G1;HNPX2.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.25;Y2.25;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@5||-1|1|1|1|||ART_color()I10
NThick-Circle|art@6||0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@7||-1|-1|1|1|||ART_color()I10
NOpened-Thicker-Polygon|art@8||1|0|0.5|1|||ART_color()I10|trace()V[-0.25/-0.5,-0.25/0.5,-0.25/0,0.25/0,0.25/0.5,0.25/-0.5]
Nschematic:Bus_Pin|pin@3||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@4||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@7||-2.5|-1|-2|-2||
NPin|pin@8||0.5|-2|1|1||
NPin|pin@9||-0.5|-2|1|1||
NPin|pin@10||-0.5|2|1|1||
NPin|pin@11||0.5|2|1|1||
NPin|pin@15||-2.5|1|1|1||
NPin|pin@16||-1.5|1|1|1||
NPin|pin@22||-2.5|-1|1|1||
NPin|pin@23||-1.5|-1|1|1||
AThicker|net@3|||FS0|pin@16||-1.5|1|pin@15||-2.5|1|ART_color()I10
AThicker|net@4|||FS0|pin@8||0.5|-2|pin@9||-0.5|-2|ART_color()I10
AThicker|net@5|||FS2700|pin@9||-0.5|-2|pin@10||-0.5|2|ART_color()I10
AThicker|net@6|||FS0|pin@11||0.5|2|pin@10||-0.5|2|ART_color()I10
AThicker|net@13|||FS0|pin@23||-1.5|-1|pin@22||-2.5|-1|ART_color()I10
Eina||D5G1;|pin@7||I
Einb||D5G1;|pin@4||I
Eout||D5G1;|pin@3||O
X

# Cell nor2_sy;1{ic}
Cnor2_sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.25;Y2.25;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-3.75|0|6|6|3200||ART_color()I10|ART_degrees()I800
NThick-Circle|art@2||-1.5|2|8|7|RRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@3||-1.5|-2|8|7|YRRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@4||2|0|1|1|||ART_color()I10
NPin|pin@0||-1|-1.25|1|1||
NPin|pin@1||-1|1|1|1||
NPin|pin@2||-2.5|1||||
Nschematic:Bus_Pin|pin@3||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@4||-2.5|1|-2|-2||
NPin|pin@5||-2.5|-1||||
NPin|pin@6||-1|-1|1|1||
Nschematic:Bus_Pin|pin@7||-2.5|-1|-2|-2||
AThicker|net@0|||FS2700|pin@0||-1|-1.25|pin@0||-1|-1.25|ART_color()I78
AThicker|net@1|||FS0|pin@1||-1|1|pin@2||-2.5|1|ART_color()I10
AThicker|net@2|||FS0|pin@6||-1|-1|pin@5||-2.5|-1|ART_color()I10
Eina||D5G1;|pin@7||I
Einb||D5G1;|pin@4||I
Eout||D5G1;|pin@3||O
X

# Cell nor2_sy;1{sch}
Cnor2_sy;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-18;Y-6;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-18;Y-5;)S1|ATTR_drive0(D5G1;HNPTX-18;Y-7;)Sstrong0|ATTR_drive1(D5G1;HNPTX-18;Y-8;)Sstrong1|ATTR_verilog_template(D5G1;NTX5.5;Y-18.5;)Snor ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@2||4|-8|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
INMOS;1{ic}|NMOS@3||-4|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||14|0||||
NOff-Page|conn@1||14|-8|||RR|
NOff-Page|conn@2||-15.5|0||||
NGround|gnd@0||0|-15||||
Inor2_sy;1{ic}|nor2_sy@0||29.5|17|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NPX2.25;Y2.25;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ngeneric:Invisible-Pin|pin@0||27|-14|||||ART_message(D5G2;)S[X is drive strength,One pull-down is as strong,as the pull-up]
NWire_Pin|pin@1||-4|0||||
NWire_Pin|pin@2||4|0||||
NWire_Pin|pin@3||0|0||||
NWire_Pin|pin@4||-9|8||||
Ngeneric:Invisible-Pin|pin@5||-2|19.5|||||ART_message(D5G6;)S[nor2_sy]
NWire_Pin|pin@6||9|-8||||
NWire_Pin|pin@7||9|4||||
NWire_Pin|pin@8||-9|0||||
Ngeneric:Invisible-Pin|pin@9||-2|14.5|||||ART_message(D5G2;)S[one-parameter fixed-size symmetric NOR]
NWire_Pin|pin@10||-9|-8||||
NWire_Pin|pin@11||4|-11.5||||
NWire_Pin|pin@12||-4|-11.5||||
NWire_Pin|pin@13||0|-11.5||||
Ipms2_sy;1{ic}|pms2_sy@0||0|8|||D0G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX4.25;Y1;)S@X
Awire|net@0|||1800|NMOS@2|g|7|-8|pin@6||9|-8
Awire|net@1|||0|pin@7||9|4|pms2_sy@0|g2|3|4
Awire|net@2|||1800|pin@4||-9|8|pms2_sy@0|g|-3|8
Awire|net@3|||2700|pin@3||0|0|pms2_sy@0|d|0|2
Awire|net@4|||1800|pin@2||4|0|conn@0|a|12|0
Awire|net@5|||2700|pin@8||-9|0|pin@4||-9|8
Awire|net@6|||0|pin@3||0|0|pin@1||-4|0
Awire|net@7|||0|pin@2||4|0|pin@3||0|0
Awire|net@8|||1800|pin@6||9|-8|conn@1|y|12|-8
Awire|net@9|||2700|pin@6||9|-8|pin@7||9|4
Awire|net@10|||0|pin@8||-9|0|conn@2|y|-13.5|0
Awire|net@11|||2700|pin@10||-9|-8|pin@8||-9|0
Awire|net@12|||900|pin@2||4|0|NMOS@2|d|4|-6
Awire|net@13|||0|NMOS@3|g|-7|-8|pin@10||-9|-8
Awire|net@14|||900|pin@1||-4|0|NMOS@3|d|-4|-6
Awire|net@15|||2700|pin@11||4|-11.5|NMOS@2|s|4|-10
Awire|net@16|||900|NMOS@3|s|-4|-10|pin@12||-4|-11.5
Awire|net@17|||0|pin@13||0|-11.5|pin@12||-4|-11.5
Awire|net@18|||0|pin@11||4|-11.5|pin@13||0|-11.5
Awire|net@19|||900|pin@13||0|-11.5|gnd@0||0|-13
Eina||D5G2;|conn@2|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell nor2en;1{ic}
Cnor2en;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.25;Y2.25;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-3.75|0|6|6|3200||ART_color()I10|ART_degrees()I800
NThick-Circle|art@2||-1.5|2|8|7|RRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@3||-1.5|-2|8|7|YRRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@4||2|0|1|1|||ART_color()I10
Ngeneric:Invisible-Pin|pin@0||-0.25|-1|||||ART_message(D5G1;)S[en]
NPin|pin@1||-0.5|-1.75|1|1||
NPin|pin@2||-1|-1.25|1|1||
NPin|pin@3||-1|1|1|1||
NPin|pin@4||-2.5|1||||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@6||-2.5|1|-2|-2||
NPin|pin@7||-2.5|-1||||
NPin|pin@8||-1|-1|1|1||
Nschematic:Bus_Pin|pin@9||-2.5|-1|-2|-2||
AThicker|net@0|||FS3150|pin@1||-0.5|-1.75|pin@2||-1|-1.25|ART_color()I10
AThicker|net@1|||FS0|pin@3||-1|1|pin@4||-2.5|1|ART_color()I10
AThicker|net@2|||FS0|pin@8||-1|-1|pin@7||-2.5|-1|ART_color()I10
Eina||D5G1;|pin@9||I
Einb||D5G1;|pin@6||I
Eout||D5G1;|pin@5||O
X

# Cell nor2en;1{sch}
Cnor2en;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-18;Y-6;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-18;Y-5;)S1|ATTR_drive0(D5G1;HNPTX-18;Y-7;)Sstrong0|ATTR_drive1(D5G1;HNPTX-18;Y-8;)Sstrong1|ATTR_verilog_template(D5G1;NTX5.5;Y-18.5;)Snor ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@2||4|-8|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX4;Y-0.5;)S@X
INMOS;1{ic}|NMOS@3||-4|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX4.5;Y1.5;)Smax(@X/3., 5./3.)
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||14|0||||
NOff-Page|conn@1||14|-8|||RR|
NOff-Page|conn@2||-15.5|0||||
NGround|gnd@0||0|-15||||
Inor2en;1{ic}|nor2en@0||31|9.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y2.25;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ngeneric:Invisible-Pin|pin@0||27|-14|||||ART_message(D5G2;)S[X is drive strength,One pull-down is as strong,as the pull-up]
NWire_Pin|pin@1||-4|0||||
NWire_Pin|pin@2||4|0||||
NWire_Pin|pin@3||0|0||||
NWire_Pin|pin@4||-9|8||||
Ngeneric:Invisible-Pin|pin@5||-2|21.5|||||ART_message(D5G6;)S[nor2en]
NWire_Pin|pin@6||9|-8||||
NWire_Pin|pin@7||9|4||||
NWire_Pin|pin@8||-9|0||||
Ngeneric:Invisible-Pin|pin@9||-2|14.5|||||ART_message(D5G2;)S[one-parameter fixed-size NOR where ina is DC signal (enable),P to width ratio is 4 to 1 (1/12 for enable input)]
NWire_Pin|pin@10||-9|-8||||
NWire_Pin|pin@11||4|-11.5||||
NWire_Pin|pin@12||-4|-11.5||||
NWire_Pin|pin@13||0|-11.5||||
Ipms2;1{ic}|pms2@0||0|8|||D0G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y1;)S@X
Awire|net@0|||1800|pin@2||4|0|conn@0|a|12|0
Awire|net@1|||2700|pin@8||-9|0|pin@4||-9|8
Awire|net@2|||0|pin@3||0|0|pin@1||-4|0
Awire|net@3|||0|pin@2||4|0|pin@3||0|0
Awire|net@4|||2700|pin@3||0|0|pms2@0|d|0|2
Awire|net@5|||1800|pin@4||-9|8|pms2@0|g|-3|8
Awire|net@6|||0|pin@7||9|4|pms2@0|g2|3|4
Awire|net@7|||1800|pin@6||9|-8|conn@1|y|12|-8
Awire|net@8|||2700|pin@6||9|-8|pin@7||9|4
Awire|net@9|||0|pin@8||-9|0|conn@2|y|-13.5|0
Awire|net@10|||2700|pin@10||-9|-8|pin@8||-9|0
Awire|net@11|||900|pin@2||4|0|NMOS@2|d|4|-6
Awire|net@12|||0|NMOS@3|g|-7|-8|pin@10||-9|-8
Awire|net@13|||900|pin@1||-4|0|NMOS@3|d|-4|-6
Awire|net@14|||2700|pin@11||4|-11.5|NMOS@2|s|4|-10
Awire|net@15|||900|NMOS@3|s|-4|-10|pin@12||-4|-11.5
Awire|net@16|||0|pin@13||0|-11.5|pin@12||-4|-11.5
Awire|net@17|||0|pin@11||4|-11.5|pin@13||0|-11.5
Awire|net@18|||900|pin@13||0|-11.5|gnd@0||0|-13
Awire|net@19|||0|pin@6||9|-8|NMOS@2|g|7|-8
Eina||D5G2;|conn@2|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell nor2en_2p;1{ic}
Cnor2en_2p;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-2;)I100|ATTR_X(D5G1.5;HNPX2.25;Y2.25;)I1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||2|0|1|1|||ART_color()I10
NThick-Circle|art@2||-1.5|-2|8|7|YRRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@3||-1.5|2|8|7|RRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@4||-3.75|0|6|6|3200||ART_color()I10|ART_degrees()I800
Ngeneric:Invisible-Pin|pin@0||0|0.5|||||ART_message(D5G1;)S[2p]
Nschematic:Bus_Pin|pin@1||-2.5|-1|-2|-2||
NPin|pin@2||-1|-1|1|1||
NPin|pin@3||-2.5|-1||||
Nschematic:Bus_Pin|pin@4||-2.5|1|-2|-2||
Nschematic:Bus_Pin|pin@5||2.5|0|-2|-2||
NPin|pin@6||-2.5|1||||
NPin|pin@7||-1|1|1|1||
NPin|pin@8||-1|-1.25|1|1||
NPin|pin@9||-0.5|-1.75|1|1||
Ngeneric:Invisible-Pin|pin@10||-0.25|-1|||||ART_message(D5G1;)S[en]
AThicker|net@0|||FS0|pin@2||-1|-1|pin@3||-2.5|-1|ART_color()I10
AThicker|net@1|||FS0|pin@7||-1|1|pin@6||-2.5|1|ART_color()I10
AThicker|net@2|||FS3150|pin@9||-0.5|-1.75|pin@8||-1|-1.25|ART_color()I10
Eina||D5G1;|pin@1||I
Einb||D5G1;|pin@4||I
Eout||D5G1;|pin@5||O
X

# Cell nor2en_2p;1{sch}
Cnor2en_2p;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-24;Y-6;)I100|ATTR_X(D5G1;HNPX-24;Y-5;)I1|ATTR_drive0(D5G1;HNPTX-24;Y-7;)Sstrong0|ATTR_drive1(D5G1;HNPTX-24;Y-8;)Sstrong1|ATTR_verilog_template(D5G1;NTX5.5;Y-18.5;)Snor ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@2||-10|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)SMath.max(((Number)@X).doubleValue()/10., 5./3.)
INMOS;1{ic}|NMOS@3||1|-8|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-21.5|0||||
NOff-Page|conn@1||10|-8|||RR|
NOff-Page|conn@2||10|0||||
NGround|gnd@0||-4.5|-15||||
Inor2en_2p;1{ic}|nor2en_2@0||31|9.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-2;)I100|ATTR_X(D5G1.5;NPX2.25;Y2.25;)I1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
NWire_Pin|pin@0||-2.5|0||||
Ngeneric:Invisible-Pin|pin@1||-1.5|14|||||ART_message(D5G2;)S[2 p-stacks for larger sizes]
NWire_Pin|pin@2||-4.5|-11.5||||
NWire_Pin|pin@3||-10|-11.5||||
NWire_Pin|pin@4||1|-11.5||||
NWire_Pin|pin@5||-15|-8||||
Ngeneric:Invisible-Pin|pin@6||-2|17.5|||||ART_message(D5G2;)S[one-parameter fixed-size NOR where ina is DC signal (enable),P to width ratio is 4 to 1 (1/10 for enable input)]
NWire_Pin|pin@7||-15|0||||
NWire_Pin|pin@8||6|4||||
NWire_Pin|pin@9||6|-8||||
Ngeneric:Invisible-Pin|pin@10||-2|24.5|||||ART_message(D5G6;)S[nor2en_2p]
NWire_Pin|pin@11||-15|8||||
NWire_Pin|pin@12||1|0||||
NWire_Pin|pin@13||-10|0||||
Ngeneric:Invisible-Pin|pin@14||27|-14|||||ART_message(D5G2;)S[X is drive strength,One pull-down is as strong,as the pull-up]
Ipms2;1{ic}|pms2@0||-2.5|8|||D0G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5G1.5;NOJPX2.25;Y1;)S@X/2.
Ipms2;1{ic}|pms2@1||-10|8|||D0G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5G1.5;NOJPX2.25;Y1;)S@X/2.
Awire|net@0|||1800|pms2@0|g2|0.5|4|pin@8||6|4
Awire|net@1|||2700|pin@0||-2.5|0|pms2@0|d|-2.5|2
Awire|net@2|||1800|pin@13||-10|0|pin@0||-2.5|0
Awire|net@3|||1800|pin@0||-2.5|0|pin@12||1|0
Awire|net@4|||1800|pms2@1|g2|-7|4|pms2@0|g2|0.5|4
Awire|net@5|||1800|pms2@1|g|-13|8|pms2@0|g|-5.5|8
Awire|net@6|||2700|pin@13||-10|0|pms2@1|d|-10|2
Awire|net@7|||0|pin@9||6|-8|NMOS@3|g|4|-8
Awire|net@8|||900|pin@2||-4.5|-11.5|gnd@0||-4.5|-13
Awire|net@9|||0|pin@4||1|-11.5|pin@2||-4.5|-11.5
Awire|net@10|||0|pin@2||-4.5|-11.5|pin@3||-10|-11.5
Awire|net@11|||900|NMOS@2|s|-10|-10|pin@3||-10|-11.5
Awire|net@12|||2700|pin@4||1|-11.5|NMOS@3|s|1|-10
Awire|net@13|||900|pin@13||-10|0|NMOS@2|d|-10|-6
Awire|net@14|||0|NMOS@2|g|-13|-8|pin@5||-15|-8
Awire|net@15|||900|pin@12||1|0|NMOS@3|d|1|-6
Awire|net@16|||2700|pin@5||-15|-8|pin@7||-15|0
Awire|net@17|||0|pin@7||-15|0|conn@0|y|-19.5|0
Awire|net@18|||2700|pin@9||6|-8|pin@8||6|4
Awire|net@19|||1800|pin@9||6|-8|conn@1|y|8|-8
Awire|net@20|||1800|pin@11||-15|8|pms2@1|g|-13|8
Awire|net@21|||2700|pin@7||-15|0|pin@11||-15|8
Awire|net@22|||1800|pin@12||1|0|conn@2|a|8|0
Eina||D5G2;|conn@0|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@2|y|O
X

# Cell nor2n;1{ic}
Cnor2n;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.25;Y2.25;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-1|1|1|1|||ART_color()I10
NThick-Circle|art@2||0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@3||-1|-1|1|1|||ART_color()I10
NPin|pin@0||-0.5|-0.75|1|1||
NPin|pin@1||0.75|-2|1|1||
NPin|pin@2||0.5|-2|1|1||
NPin|pin@3||-0.5|-2|1|1||
NPin|pin@4||-0.5|2|1|1||
NPin|pin@5||0.5|2|1|1||
NPin|pin@6||-1.5|1|1|1||
NPin|pin@7||-2.5|1||||
Nschematic:Bus_Pin|pin@8||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@9||-2.5|1|-2|-2||
NPin|pin@10||-2.5|-1||||
NPin|pin@11||-1.5|-1|1|1||
Nschematic:Bus_Pin|pin@12||-2.5|-1|-2|-2||
AThicker|net@0|||FS3150|pin@1||0.75|-2|pin@0||-0.5|-0.75|ART_color()I10
AThicker|net@1|||FS0|pin@2||0.5|-2|pin@3||-0.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@3||-0.5|-2|pin@4||-0.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@5||0.5|2|pin@4||-0.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@6||-1.5|1|pin@7||-2.5|1|ART_color()I10
AThicker|net@5|||FS0|pin@11||-1.5|-1|pin@10||-2.5|-1|ART_color()I10
Eina||D5G1;|pin@12||I
Einb||D5G1;|pin@9||I
Eout||D5G1;|pin@8||O
X

# Cell nor2n;1{sch}
Cnor2n;1{sch}||schematic|1021415734000|1209125237179||ATTR_Delay(D5G1;HNPX-18;Y-8.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-18;Y-7.5;)S1|ATTR_drive0(D5G1;HNPTX-18;Y-9.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-18;Y-10.5;)Sstrong1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||10.5|0||||
NOff-Page|conn@1||-15.5|2.5||||
NOff-Page|conn@2||-15.5|-2.5||||
Inor2;1{ic}|nor2@0||0|0|||D0G4;|ATTR_Delay(D5G1;NOJPX2.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y2.25;)S@X|ATTR_drive0(OJP)S@drive0|ATTR_drive1(OJP)S@drive1
Inor2n;1{ic}|nor2n@0||24.5|11.5|||D0G4;|ATTR_Delay(D5G1;NPX3;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y2.25;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
NWire_Pin|pin@0||-7|-2.5||||
NWire_Pin|pin@1||-7|-1||||
NWire_Pin|pin@2||-7|1||||
NWire_Pin|pin@3||-7|2.5||||
Ngeneric:Invisible-Pin|pin@4||20.5|-11|||||ART_message(D5G2;)S[X is drive strength,One pull-down is as strong,as the pull-up]
Ngeneric:Invisible-Pin|pin@5||-2|16.5|||||ART_message(D5G6;)S[nor2n]
Ngeneric:Invisible-Pin|pin@6||-2|11.5|||||ART_message(D5G2;)S[one-parameter fixed-size NOR (AND rep)]
Awire|net@0|||0|pin@0||-7|-2.5|conn@2|y|-13.5|-2.5
Awire|net@1|||2700|pin@0||-7|-2.5|pin@1||-7|-1
Awire|net@2|||1800|pin@1||-7|-1|nor2@0|ina|-2.5|-1
Awire|net@3|||0|nor2@0|inb|-2.5|1|pin@2||-7|1
Awire|net@4|||2700|pin@2||-7|1|pin@3||-7|2.5
Awire|net@5|||0|pin@3||-7|2.5|conn@1|y|-13.5|2.5
Awire|net@6|||0|conn@0|a|8.5|0|nor2@0|out|2.5|0
Eina||D5G2;|conn@2|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell nor2n_sy;1{ic}
Cnor2n_sy;1{ic}||artwork|1021415734000|1209125462708|E|ATTR_Delay(D5G1;HNPX3;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.25;Y2.25;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-1|1|1|1|||ART_color()I10
NThick-Circle|art@2||0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@3||-1|-1|1|1|||ART_color()I10
NPin|pin@2||0.5|-2|1|1||
NPin|pin@3||-0.5|-2|1|1||
NPin|pin@4||-0.5|2|1|1||
NPin|pin@5||0.5|2|1|1||
NPin|pin@6||-1.5|1|1|1||
NPin|pin@7||-2.5|1||||
Nschematic:Bus_Pin|pin@8||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@9||-2.5|1|-2|-2||
NPin|pin@10||-2.5|-1||||
NPin|pin@11||-1.5|-1|1|1||
Nschematic:Bus_Pin|pin@12||-2.5|-1|-2|-2||
AThicker|net@1|||FS0|pin@2||0.5|-2|pin@3||-0.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@3||-0.5|-2|pin@4||-0.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@5||0.5|2|pin@4||-0.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@6||-1.5|1|pin@7||-2.5|1|ART_color()I10
AThicker|net@5|||FS0|pin@11||-1.5|-1|pin@10||-2.5|-1|ART_color()I10
Eina||D5G1;|pin@12||I
Einb||D5G1;|pin@9||I
Eout||D5G1;|pin@8||O
X

# Cell nor2n_sy;1{sch}
Cnor2n_sy;1{sch}||schematic|1021415734000|1239967624447||ATTR_Delay(D5G1;HNPX-18;Y-8.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-18;Y-7.5;)S1|ATTR_drive0(D5G1;HNPTX-18;Y-9.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-18;Y-10.5;)Sstrong1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||10.5|0||||
NOff-Page|conn@1||-15.5|2.5||||
NOff-Page|conn@2||-15.5|-2.5||||
Inor2_sy;1{ic}|nor2@0||0|0|||D0G4;|ATTR_Delay(D5G1;NOJPX2.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y2.25;)S@X|ATTR_drive0(OJP)S@drive0|ATTR_drive1(OJP)S@drive1
Inor2n_sy;1{ic}|nor2n@0||24|5.5|||D0G4;|ATTR_Delay(D5G1;NPX3;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NPX2.25;Y2.25;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
NWire_Pin|pin@0||-7|-2.5||||
NWire_Pin|pin@1||-7|-1||||
NWire_Pin|pin@2||-7|1||||
NWire_Pin|pin@3||-7|2.5||||
Ngeneric:Invisible-Pin|pin@4||20.5|-11|||||ART_message(D5G2;)S[X is drive strength,One pull-down is as strong,as the pull-up]
Ngeneric:Invisible-Pin|pin@5||-2|16.5|||||ART_message(D5G6;)Snor2n_sy
Ngeneric:Invisible-Pin|pin@6||-2|11.5|||||ART_message(D5G2;)Sone-parameter fixed-size symmetric NOR (AND rep)
Awire|net@0|||0|pin@0||-7|-2.5|conn@2|y|-13.5|-2.5
Awire|net@1|||2700|pin@0||-7|-2.5|pin@1||-7|-1
Awire|net@2|||1800|pin@1||-7|-1|nor2@0|ina|-2.5|-1
Awire|net@3|||0|nor2@0|inb|-2.5|1|pin@2||-7|1
Awire|net@4|||2700|pin@2||-7|1|pin@3||-7|2.5
Awire|net@5|||0|pin@3||-7|2.5|conn@1|y|-13.5|2.5
Awire|net@6|||0|conn@0|a|8.5|0|nor2@0|out|2.5|0
Eina||D5G2;|conn@2|a|I
Einb||D5G2;|conn@1|a|I
Eout||D5G2;|conn@0|y|O
X

# Cell nor2nn;1{ic}
Cnor2nn;1{ic}|nor2|artwork|1021415734000|1231517756672|E|ATTR_Delay(D5G1;HNPX-18;Y-6;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-18;Y-5;)S1|ATTR_drive0(D5G1;HNPTX-18;Y-7;)Sstrong0|ATTR_drive1(D5G1;HNPTX-18;Y-8;)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-1|1|1|1|||ART_color()I10
NThick-Circle|art@2||0.5|0|4|4|RRR||ART_color()I10|ART_degrees()F[0.0,3.1415927]
NThick-Circle|art@3||-1|-1|1|1|||ART_color()I10
NPin|pin@0||-0.5|-0.75|1|1||
NPin|pin@1||0.75|-2|1|1||
NPin|pin@2||0.5|-2|1|1||
NPin|pin@3||-0.5|-2|1|1||
NPin|pin@4||-0.5|2|1|1||
NPin|pin@5||0.5|2|1|1||
NPin|pin@6||-1.5|1|1|1||
NPin|pin@7||-2.5|1||||
Nschematic:Bus_Pin|pin@8||2.5|0|-2|-2||
Nschematic:Bus_Pin|pin@9||-2.5|1|-2|-2||
NPin|pin@10||-2.5|-1||||
NPin|pin@11||-1.5|-1|1|1||
Nschematic:Bus_Pin|pin@12||-2.5|-1|-2|-2||
AThicker|net@0|||FS3150|pin@1||0.75|-2|pin@0||-0.5|-0.75|ART_color()I10
AThicker|net@1|||FS0|pin@2||0.5|-2|pin@3||-0.5|-2|ART_color()I10
AThicker|net@2|||FS2700|pin@3||-0.5|-2|pin@4||-0.5|2|ART_color()I10
AThicker|net@3|||FS0|pin@5||0.5|2|pin@4||-0.5|2|ART_color()I10
AThicker|net@4|||FS0|pin@6||-1.5|1|pin@7||-2.5|1|ART_color()I10
AThicker|net@5|||FS0|pin@11||-1.5|-1|pin@10||-2.5|-1|ART_color()I10
Eina||D5G1;|pin@12||I
Einb||D5G1;|pin@9||I
Eout||D5G1;|pin@8||O
X

# Cell passF;1{ic}
CpassF;1{ic}||artwork|1094081205000|1204140525662|E|ATTR_LEPASSGATE(D5G1;HNPTX-31;Y-10;)I1|ATTR_XN(D5FLeave alone;G1;HNOLPX-3.25;Y-0.5;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX3.25;Y-0.5;)S1|ATTR_Xinv(D5FLeave alone;G1;HNOLPY2.5;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@2||0.5|-1.5|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||2|0||||
Nschematic:Bus_Pin|pin@2||0.5|-2||||
Nschematic:Bus_Pin|pin@6||-2|0||||
NPin|pin@9||-1|1|1|1||
NPin|pin@10||1|1|1|1||
NPin|pin@11||1|-1|1|1||
NPin|pin@12||-1|-1|1|1||
NPin|pin@13||-1|-1|1|1||
NPin|pin@14||1|0|1|1||
NPin|pin@15||2|0|1|1||
NPin|pin@16||-2|0|1|1||
NPin|pin@17||-1|0|1|1||
AThicker|net@5|||FS1800|pin@9||-1|1|pin@10||1|1|ART_color()I10
AThicker|net@6|||FS900|pin@10||1|1|pin@11||1|-1|ART_color()I10
AThicker|net@7|||FS0|pin@11||1|-1|pin@12||-1|-1|ART_color()I10
AThicker|net@8|||FS2700|pin@12||-1|-1|pin@9||-1|1|ART_color()I10
ASolid|net@9|||FS2250|pin@13||-1|-1|pin@10||1|1|ART_color()I10
ASolid|net@10|||FS3150|pin@11||1|-1|pin@9||-1|1|ART_color()I10
AThicker|net@11|||FS1800|pin@14||1|0|pin@15||2|0|ART_color()I10
AThicker|net@12|||FS1800|pin@16||-2|0|pin@17||-1|0|ART_color()I10
Edrn||D5G2;|pin@0||O
EpassF||D5G2;|pin@2||I
Esrc||D5G2;|pin@6||I
X

# Cell passF;1{sch}
CpassF;1{sch}||schematic|1094080836000|1248729106644||ATTR_LEPASSGATE(D5G1;HNPTX-31;Y-10;)I1|ATTR_XN(D5FLeave alone;G1;HNOLPX-31;Y-4;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX-31;Y-6;)S1|ATTR_Xinv(D5FLeave alone;G1;HNOLPX-31;Y-8;)S1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|2|RRR||D5G4;|ATTR_Delay(D5G1;NPX-1.5;Y-3.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX-1.5;Y3;)S@XN
IPMOS;1{ic}|PMOS@1||0|-2|R||D5G4;|ATTR_Delay(D5G1;NPX-1.5;Y3.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX-1.5;Y-3;)S@XP/2.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-9|0||||
NOff-Page|conn@1||16.5|0||||
NOff-Page|conn@3||0|-11.5|||R|
Iinv;1{ic}|inv@0||7|10|YRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S@Xinv|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
IpassF;1{ic}|passTF@0||20.5|15|||D5G4;|ATTR_XN(D5FLeave alone;G1;NOLPX-3.25;Y-0.5;)S1|ATTR_XP(D5FLeave alone;G1;NOLPX3.25;Y-0.5;)S1|ATTR_Xinv(D5FLeave alone;G1;NOLPY2.5;)S1
NWire_Pin|pin@0||0|-7||||
NWire_Pin|pin@1||11|-7||||
NWire_Pin|pin@2||11|10||||
NWire_Pin|pin@3||0|10||||
NWire_Pin|pin@4||-5|0||||
NWire_Pin|pin@5||5|0||||
Ngeneric:Invisible-Pin|pin@6||-1|28.5|||||ART_message(D5G5;)SpassF
Ngeneric:Invisible-Pin|pin@7||-1|23.5|||||ART_message(D5G2;)Spass gate with only F control input
NWire_Pin|pin@8||-5|2||||
NWire_Pin|pin@9||-5|-2||||
NWire_Pin|pin@10||5|-2||||
NWire_Pin|pin@11||5|2||||
Awire|net@0|||1800|pin@0||0|-7|pin@1||11|-7
Awire|net@1|||900|pin@11||5|2|pin@5||5|0
Awire|net@2|||0|pin@10||5|-2|PMOS@1|d|2|-2
Awire|net@3|||0|PMOS@1|s|-2|-2|pin@9||-5|-2
Awire|net@4|||2700|pin@9||-5|-2|pin@4||-5|0
Awire|net@5|||1800|pin@8||-5|2|NMOS@1|s|-2|2
Awire|net@6|||2700|pin@4||-5|0|pin@8||-5|2
Awire|net@7|||1800|conn@0|y|-7|0|pin@4||-5|0
Awire|net@8|||900|pin@5||5|0|pin@10||5|-2
Awire|net@9|||1800|pin@5||5|0|conn@1|a|14.5|0
Awire|net@11|||2700|conn@3|y|0|-9.5|pin@0||0|-7
Awire|net@12|||2700|pin@0||0|-7|PMOS@1|g|0|-5
Awire|net@13|||2700|pin@1||11|-7|pin@2||11|10
Awire|net@14|||0|pin@2||11|10|inv@0|in|9.5|10
Awire|net@15|||2700|NMOS@1|g|0|5|pin@3||0|10
Awire|net@16|||1800|pin@3||0|10|inv@0|out|4.5|10
Awire|net@17|||1800|NMOS@1|d|2|2|pin@11||5|2
Edrn||D5G2;|conn@1|y|O
EpassF||D5G2;|conn@3|a|I
Esrc||D5G2;|conn@0|a|I
X

# Cell passT;1{ic}
CpassT;1{ic}||artwork|1094081205000|1204140525662|E|ATTR_LEPASSGATE(D5G1;HNPTX-30.5;Y-9.5;)I1|ATTR_XN(D5FLeave alone;G1;HNOLPX-3.25;Y-0.5;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX3.25;Y-0.5;)S1|ATTR_Xinv(D5FLeave alone;G1;HNOLPY2.5;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
Nschematic:Bus_Pin|pin@0||2|0||||
Nschematic:Bus_Pin|pin@4||-0.5|-2||||
Nschematic:Bus_Pin|pin@6||-2|0||||
NPin|pin@9||-1|1|1|1||
NPin|pin@10||1|1|1|1||
NPin|pin@11||1|-1|1|1||
NPin|pin@12||-1|-1|1|1||
NPin|pin@13||-1|-1|1|1||
NPin|pin@14||1|0|1|1||
NPin|pin@15||2|0|1|1||
NPin|pin@16||-2|0|1|1||
NPin|pin@17||-1|0|1|1||
NPin|pin@18||-0.5|-1|1|1|RRR|
NPin|pin@19||-0.5|-2|1|1|RRR|
AThicker|net@5|||FS1800|pin@9||-1|1|pin@10||1|1|ART_color()I10
AThicker|net@6|||FS900|pin@10||1|1|pin@11||1|-1|ART_color()I10
AThicker|net@7|||FS0|pin@11||1|-1|pin@12||-1|-1|ART_color()I10
AThicker|net@8|||FS2700|pin@12||-1|-1|pin@9||-1|1|ART_color()I10
ASolid|net@9|||FS2250|pin@13||-1|-1|pin@10||1|1|ART_color()I10
ASolid|net@10|||FS3150|pin@11||1|-1|pin@9||-1|1|ART_color()I10
AThicker|net@11|||FS1800|pin@14||1|0|pin@15||2|0|ART_color()I10
AThicker|net@12|||FS1800|pin@16||-2|0|pin@17||-1|0|ART_color()I10
AThicker|net@13|||FS900|pin@18||-0.5|-1|pin@19||-0.5|-2|ART_color()I10
Edrn||D5G2;|pin@0||O
EpassT||D5G2;|pin@4||I
Esrc||D5G2;|pin@6||I
X

# Cell passT;1{sch}
CpassT;1{sch}||schematic|1094080836000|1248729106644||ATTR_LEPASSGATE(D5G1;HNPTX-30.5;Y-9.5;)I1|ATTR_XN(D5FLeave alone;G1;HNOLPX-31;Y-4;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX-31;Y-6;)S1|ATTR_Xinv(D5FLeave alone;G1;HNOLPX-31;Y-8;)S1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|2|RRR||D5G4;|ATTR_Delay(D5G1;NPX-1.5;Y-3.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX-1.5;Y3;)S@XN
IPMOS;1{ic}|PMOS@1||0|-2|R||D5G4;|ATTR_Delay(D5G1;NPX-1.5;Y3.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX-1.5;Y-3;)S@XP/2.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-9|0||||
NOff-Page|conn@1||20.5|0||||
NOff-Page|conn@2||0|12|||RRR|
Iinv;1{ic}|inv@0||6|-9|YRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S@Xinv|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
IpassT;1{ic}|passTF@0||20.5|15|||D5G4;|ATTR_XN(D5FLeave alone;G1;NOLPX-3.25;Y-0.5;)S1|ATTR_XP(D5FLeave alone;G1;NOLPX3.25;Y-0.5;)S1|ATTR_Xinv(D5FLeave alone;G1;NOLPY2.5;)S1
NWire_Pin|pin@0||11|-9||||
NWire_Pin|pin@1||11|8||||
NWire_Pin|pin@2||0|8||||
NWire_Pin|pin@3||0|-9||||
NWire_Pin|pin@4||-5|0||||
NWire_Pin|pin@5||5|0||||
Ngeneric:Invisible-Pin|pin@6||-1|28.5|||||ART_message(D5G5;)SpassT
Ngeneric:Invisible-Pin|pin@7||-1|23.5|||||ART_message(D5G2;)Spass gate with only T control input
NWire_Pin|pin@8||-5|2||||
NWire_Pin|pin@9||-5|-2||||
NWire_Pin|pin@10||5|-2||||
NWire_Pin|pin@11||5|2||||
Awire|net@0|||1800|inv@0|in|8.5|-9|pin@0||11|-9
Awire|net@1|||2700|pin@0||11|-9|pin@1||11|8
Awire|net@2|||0|pin@1||11|8|pin@2||0|8
Awire|net@3|||0|PMOS@1|s|-2|-2|pin@9||-5|-2
Awire|net@4|||2700|pin@9||-5|-2|pin@4||-5|0
Awire|net@5|||1800|pin@8||-5|2|NMOS@1|s|-2|2
Awire|net@6|||2700|pin@4||-5|0|pin@8||-5|2
Awire|net@7|||1800|conn@0|y|-7|0|pin@4||-5|0
Awire|net@8|||900|pin@5||5|0|pin@10||5|-2
Awire|net@9|||1800|pin@5||5|0|conn@1|a|18.5|0
Awire|net@10|||900|conn@2|y|0|10|pin@2||0|8
Awire|net@11|||900|pin@2||0|8|NMOS@1|g|0|5
Awire|net@12|||900|PMOS@1|g|0|-5|pin@3||0|-9
Awire|net@13|||1800|pin@3||0|-9|inv@0|out|3.5|-9
Awire|net@14|||900|pin@11||5|2|pin@5||5|0
Awire|net@15|||0|pin@10||5|-2|PMOS@1|d|2|-2
Awire|net@16|||1800|NMOS@1|d|2|2|pin@11||5|2
Edrn||D5G2;|conn@1|y|O
EpassT||D5G2;|conn@2|a|I
Esrc||D5G2;|conn@0|a|I
X

# Cell passTF;1{ic}
CpassTF;1{ic}||artwork|1094081205000|1204140525662|E|ATTR_LEPASSGATE(D5G1;HNPTX-30.5;Y-8;)I1|ATTR_XN(D5FLeave alone;G1;HNOLPX-3.25;Y-0.5;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX3.25;Y-0.5;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@2||0.5|-1.5|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||2|0||||
Nschematic:Bus_Pin|pin@2||0.5|-2||||
Nschematic:Bus_Pin|pin@4||-0.5|-2||||
Nschematic:Bus_Pin|pin@6||-2|0||||
NPin|pin@9||-1|1|1|1||
NPin|pin@10||1|1|1|1||
NPin|pin@11||1|-1|1|1||
NPin|pin@12||-1|-1|1|1||
NPin|pin@13||-1|-1|1|1||
NPin|pin@14||1|0|1|1||
NPin|pin@15||2|0|1|1||
NPin|pin@16||-2|0|1|1||
NPin|pin@17||-1|0|1|1||
NPin|pin@18||-0.5|-1|1|1|RRR|
NPin|pin@19||-0.5|-2|1|1|RRR|
AThicker|net@5|||FS1800|pin@9||-1|1|pin@10||1|1|ART_color()I10
AThicker|net@6|||FS900|pin@10||1|1|pin@11||1|-1|ART_color()I10
AThicker|net@7|||FS0|pin@11||1|-1|pin@12||-1|-1|ART_color()I10
AThicker|net@8|||FS2700|pin@12||-1|-1|pin@9||-1|1|ART_color()I10
ASolid|net@9|||FS2250|pin@13||-1|-1|pin@10||1|1|ART_color()I10
ASolid|net@10|||FS3150|pin@11||1|-1|pin@9||-1|1|ART_color()I10
AThicker|net@11|||FS1800|pin@14||1|0|pin@15||2|0|ART_color()I10
AThicker|net@12|||FS1800|pin@16||-2|0|pin@17||-1|0|ART_color()I10
AThicker|net@13|||FS900|pin@18||-0.5|-1|pin@19||-0.5|-2|ART_color()I10
Edrn||D5G2;|pin@0||O
EpassF||D5G2;|pin@2||I
EpassT||D5G2;|pin@4||I
Esrc||D5G2;|pin@6||I
X

# Cell passTF;1{sch}
CpassTF;1{sch}||schematic|1094080836000|1248729106644||ATTR_LEPASSGATE(D5G1;HNPTX-30.5;Y-8;)I1|ATTR_XN(D5FLeave alone;G1;HNOLPX-31;Y-4;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX-31;Y-6;)S1|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@1||0|2|RRR||D5G4;|ATTR_Delay(D5G1;NPX-1.5;Y-3.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX-1.5;Y3;)S@XN
IPMOS;1{ic}|PMOS@1||0|-2|R||D5G4;|ATTR_Delay(D5G1;NPX-1.5;Y3.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX-1.5;Y-3;)S@XP/2.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-9|0||||
NOff-Page|conn@1||10.5|0||||
NOff-Page|conn@2||0|12|||RRR|
NOff-Page|conn@3||0|-11.5|||R|
IpassTF;1{ic}|passTF@0||20.5|15|||D5G4;|ATTR_XN(D5FLeave alone;G1;NOLPX-3.25;Y-0.5;)S1|ATTR_XP(D5FLeave alone;G1;NOLPX3.25;Y-0.5;)S1
NWire_Pin|pin@0||5|2||||
NWire_Pin|pin@1||5|-2||||
NWire_Pin|pin@2||-5|-2||||
NWire_Pin|pin@3||-5|2||||
NWire_Pin|pin@4||-5|0||||
NWire_Pin|pin@5||5|0||||
Ngeneric:Invisible-Pin|pin@6||-1|28.5|||||ART_message(D5G5;)SpassTF
Ngeneric:Invisible-Pin|pin@7||-1|23.5|||||ART_message(D5G2;)Spass gate with seperate T/F control inputs
Awire|net@0|||1800|NMOS@1|d|2|2|pin@0||5|2
Awire|net@1|||900|pin@0||5|2|pin@5||5|0
Awire|net@2|||0|pin@1||5|-2|PMOS@1|d|2|-2
Awire|net@3|||0|PMOS@1|s|-2|-2|pin@2||-5|-2
Awire|net@4|||2700|pin@2||-5|-2|pin@4||-5|0
Awire|net@5|||1800|pin@3||-5|2|NMOS@1|s|-2|2
Awire|net@6|||2700|pin@4||-5|0|pin@3||-5|2
Awire|net@7|||1800|conn@0|y|-7|0|pin@4||-5|0
Awire|net@8|||900|pin@5||5|0|pin@1||5|-2
Awire|net@9|||1800|pin@5||5|0|conn@1|a|8.5|0
Awire|net@10|||900|conn@2|y|0|10|NMOS@1|g|0|5
Awire|net@11|||2700|conn@3|y|0|-9.5|PMOS@1|g|0|-5
Edrn||D5G2;|conn@1|y|O
EpassF||D5G2;|conn@3|a|I
EpassT||D5G2;|conn@2|a|I
Esrc||D5G2;|conn@0|a|I
X

# Cell pms1;2{ic}
Cpms1;2{ic}||artwork|1021415734000|1228434629412|E|ATTR_Delay(D5G1;HNPX-3;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.25;Y1;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-2|0|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@1||0|-2|-2|-2||
NPin|pin@3||0|1|1|1||
NPin|pin@4||-0.75|1|1|1||
NPin|pin@5||-0.75|-1|1|1||
NPin|pin@6||0|-1|1|1|YRR|
NPin|pin@7||0|-2|1|1|YRR|
NPin|pin@8||-3|0|||RR|
NPin|pin@9||-2.5|0|1|1|RR|
NPin|pin@10||0|2|1|1||
NPin|pin@11||-0.5|2.5||||
NPin|pin@12||0.5|1.5|1|1||
NPin|pin@13||-1.5|-1|1|1||
NPin|pin@14||-1.5|1|1|1||
AThicker|net@0|||FS900|pin@14||-1.5|1|pin@13||-1.5|-1|ART_color()I10
AThicker|net@1|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I10
AThicker|net@2|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I10
AThicker|net@3|||FS1800|pin@8||-3|0|pin@9||-2.5|0|ART_color()I10
AThicker|net@4|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I10
AThicker|net@5|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I10
AThicker|net@6|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I10
AThicker|net@7|||FS3150|pin@12||0.5|1.5|pin@11||-0.5|2.5|ART_color()I10
Ed||D5G1;|pin@1||O
Eg||D5G1;|pin@0||I
X

# Cell pms1;1{sch}
Cpms1;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-12;Y8;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-12.25;Y9;)S1|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@1||0|15|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*1.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-8.5|15||||
NOff-Page|conn@1||8|0||||
NWire_Pin|pin@0||0|0||||
Ngeneric:Invisible-Pin|pin@1||-1|31|||||ART_message(D5G6;)Spms1
Ngeneric:Invisible-Pin|pin@2||-1|26|||||ART_message(D5G2;)Sone fixed-size P-type transistor to VDD
Ipms1;2{ic}|pms1@1||19|18|||D5G4;|ATTR_Delay(D5G1;NPX-2;Y0.25;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.25;Y2.75;)S1
NPower|pwr@0||0|22||||
Awire|net@0|||900|pwr@0||0|22|PMOS@1|s|0|17
Awire|net@1|||1800|conn@0|y|-6.5|15|PMOS@1|g|-3|15
Awire|net@5|||1800|pin@0||0|0|conn@1|a|6|0
Awire|net@6|||2700|pin@0||0|0|PMOS@1|d|0|13
Ed||D5G2;|conn@1|y|O
Eg||D5G2;|conn@0|a|I
X

# Cell pms2;1{ic}
Cpms2;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX-3;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.25;Y1;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-2|0|1|1|||ART_color()I10
NThick-Circle|art@2||2|-4|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@1||0|-6|-2|-2||
Nschematic:Bus_Pin|pin@2||3|-4|-2|-2||
NPin|pin@3||0|1|1|1||
NPin|pin@4||-0.75|1|1|1||
NPin|pin@5||-0.75|-1|1|1||
NPin|pin@6||0|-1|1|1|YRR|
NPin|pin@7||0|-2|1|1|YRR|
NPin|pin@8||-3|0|||RR|
NPin|pin@9||-2.5|0|1|1|RR|
NPin|pin@10||0|2|1|1||
NPin|pin@11||-0.5|2.5||||
NPin|pin@12||0.5|1.5|1|1||
NPin|pin@13||-1.5|-1|1|1||
NPin|pin@14||-1.5|1|1|1||
NPin|pin@15||1.5|-3|1|1|YRR|
NPin|pin@16||1.5|-5|1|1|YRR|
NPin|pin@17||0|-2|1|1|YRR|
NPin|pin@18||3|-4|||RR|
NPin|pin@19||2.5|-4|1|1|RR|
NPin|pin@20||0|-6|||RR|
NPin|pin@21||0|-5|1|1|YRR|
NPin|pin@22||0.75|-5|1|1|YRR|
NPin|pin@23||0.75|-3|1|1|YRR|
NPin|pin@24||0|-3|1|1|YRR|
AThicker|net@0|||FS900|pin@14||-1.5|1|pin@13||-1.5|-1|ART_color()I10
AThicker|net@1|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I10
AThicker|net@2|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I10
AThicker|net@3|||FS1800|pin@8||-3|0|pin@9||-2.5|0|ART_color()I10
AThicker|net@4|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I10
AThicker|net@5|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I10
AThicker|net@6|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I10
AThicker|net@7|||FS3150|pin@12||0.5|1.5|pin@11||-0.5|2.5|ART_color()I10
AThicker|net@8|||FS2700|pin@24||0|-3|pin@17||0|-2|ART_color()I10
AThicker|net@9|||FS1800|pin@24||0|-3|pin@23||0.75|-3|ART_color()I10
AThicker|net@10|||FS900|pin@15||1.5|-3|pin@16||1.5|-5|ART_color()I10
AThicker|net@11|||FS1800|pin@19||2.5|-4|pin@18||3|-4|ART_color()I10
AThicker|net@12|||FS0|pin@22||0.75|-5|pin@21||0|-5|ART_color()I10
AThicker|net@13|||FS900|pin@21||0|-5|pin@20||0|-6|ART_color()I10
AThicker|net@14|||FS900|pin@23||0.75|-3|pin@22||0.75|-5|ART_color()I10
Ed||D5G1;|pin@1||O
Eg||D5G1;|pin@0||I
Eg2||D5G1;|pin@2||I
X

# Cell pms2;1{sch}
Cpms2;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-12;Y8;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-12.25;Y9;)S1|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@2||0|15|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*2.0
IPMOS;1{ic}|PMOS@3||0|7|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*2.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-8.5|15||||
NOff-Page|conn@1||8|0||||
NOff-Page|conn@2||8.5|7|||YRR|
NWire_Pin|pin@0||0|0||||
Ngeneric:Invisible-Pin|pin@1||-1|31|||||ART_message(D5G6;)S[pms2]
Ngeneric:Invisible-Pin|pin@2||-1|26|||||ART_message(D5G2;)S[two fixed-size P-type transistors to VDD]
Ipms2;1{ic}|pms2@0||20|22|||D0G4;|ATTR_Delay(D5G1;NPX-3;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y1;)S1
Ipms2a;2{ic}|pms2@1||20|10|||D5G4;|ATTR_Delay(D5G1;NPX-2;Y0.25;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.25;Y2.75;)S1
NPower|pwr@0||0|22||||
Awire|net@0|||900|pwr@0||0|22|PMOS@2|s|0|17
Awire|net@1|||1800|conn@0|y|-6.5|15|PMOS@2|g|-3|15
Awire|net@2|||2700|PMOS@3|s|0|9|PMOS@2|d|0|13|NET_ncc_match()SNCCmatch1
Awire|net@3|||0|conn@2|y|6.5|7|PMOS@3|g|3|7
Awire|net@4|||2700|pin@0||0|0|PMOS@3|d|0|5
Awire|net@5|||1800|pin@0||0|0|conn@1|a|6|0
Ed||D5G2;|conn@1|y|O
Eg||D5G2;|conn@0|a|I
Eg2||D5G2;|conn@2|a|I
X

# Cell pms2_sy;1{ic}
Cpms2_sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX-5;Y-1.5;)I100|ATTR_X(D5G1.5;HNOLPX4;Y2;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-1.75|0|1|1|||ART_color()I10
NThick-Circle|art@2||1.75|-4|1|1|||ART_color()I10
NThick-Circle|art@3||1.75|0|1|1|||ART_color()I10
NThick-Circle|art@4||-1.75|-4|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||3|-4|-2|-2||
Nschematic:Bus_Pin|pin@1||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@2||0|-6|-2|-2||
NPin|pin@3||0|1|1|1||
NPin|pin@4||-0.75|1|1|1||
NPin|pin@5||-0.75|-1|1|1||
NPin|pin@6||0|2|1|1||
NPin|pin@7||-0.5|2.5||||
NPin|pin@8||0.5|1.5|1|1||
NPin|pin@9||-1.25|-1|1|1||
NPin|pin@10||-1.25|1|1|1||
NPin|pin@11||1.25|-3|1|1|YRR|
NPin|pin@12||1.25|-5|1|1|YRR|
NPin|pin@13||0|-6|||RR|
NPin|pin@14||0|-5|1|1|YRR|
NPin|pin@15||0.75|-5|1|1|YRR|
NPin|pin@16||0.75|-3|1|1|YRR|
NPin|pin@17||0.25|-3|1|1|YRR|
NPin|pin@18||1.25|1|1|1|YRR|
NPin|pin@19||1.25|-1|1|1|YRR|
NPin|pin@20||0.25|-1|1|1||
NPin|pin@21||0.75|-1|1|1|YRR|
NPin|pin@22||0.75|1|1|1|YRR|
NPin|pin@23||0|1|1|1|YRR|
NPin|pin@24||-0.25|-3|1|1||
NPin|pin@25||-0.75|-3|1|1||
NPin|pin@26||-0.75|-5|1|1||
NPin|pin@27||0|-5|1|1|YRR|
NPin|pin@28||-1.25|-5|1|1||
NPin|pin@29||-1.25|-3|1|1||
NPin|pin@30||-0.25|-1|1|1||
NPin|pin@31||-3|0|||RR|
NPin|pin@32||-2.5|0|1|1|RR|
NPin|pin@33||-2.5|-4|1|1||
NPin|pin@34||3|-4|||RR|
NPin|pin@35||2.5|-4|1|1|RR|
NPin|pin@36||2.5|0|1|1||
NPin|pin@37||2.25|0|1|1||
NPin|pin@38||2.25|-4|1|1||
NPin|pin@39||-2.25|-4|1|1||
NPin|pin@40||-2.25|0|1|1||
AThicker|net@0|||FS1800|pin@17||0.25|-3|pin@16||0.75|-3|ART_color()I10
AThicker|net@1|||FS0|pin@15||0.75|-5|pin@14||0|-5|ART_color()I10
AThicker|net@2|||FS900|pin@16||0.75|-3|pin@15||0.75|-5|ART_color()I10
AThicker|net@3|||FS900|pin@11||1.25|-3|pin@12||1.25|-5|ART_color()I10
AThicker|net@4|||FS900|pin@14||0|-5|pin@13||0|-6|ART_color()I10
AThicker|net@5|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I10
AThicker|net@6|||FS900|pin@10||-1.25|1|pin@9||-1.25|-1|ART_color()I10
AThicker|net@7|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I10
AThicker|net@8|||FS3150|pin@8||0.5|1.5|pin@7||-0.5|2.5|ART_color()I10
AThicker|net@9|||FS2700|pin@3||0|1|pin@6||0|2|ART_color()I10
AThicker|net@10|||FS900|pin@18||1.25|1|pin@19||1.25|-1|ART_color()I10
AThicker|net@11|||FS900|pin@22||0.75|1|pin@21||0.75|-1|ART_color()I10
AThicker|net@12|||FS1800|pin@23||0|1|pin@22||0.75|1|ART_color()I10
AThicker|net@13|||FS0|pin@21||0.75|-1|pin@20||0.25|-1|ART_color()I10
AThicker|net@14|||FS900|pin@29||-1.25|-3|pin@28||-1.25|-5|ART_color()I10
AThicker|net@15|||FS900|pin@25||-0.75|-3|pin@26||-0.75|-5|ART_color()I10
AThicker|net@16|||FS0|pin@24||-0.25|-3|pin@25||-0.75|-3|ART_color()I10
AThicker|net@17|||FS1800|pin@26||-0.75|-5|pin@27||0|-5|ART_color()I10
AThicker|net@18|||FS0|pin@30||-0.25|-1|pin@5||-0.75|-1|ART_color()I10
AThicker|net@19|||FS2840|pin@17||0.25|-3|pin@30||-0.25|-1|ART_color()I10
AThicker|net@20|||FS2560|pin@24||-0.25|-3|pin@20||0.25|-1|ART_color()I10
AThicker|net@21|||FS1800|pin@31||-3|0|pin@32||-2.5|0|ART_color()I10
AThicker|net@22|||FS2700|pin@33||-2.5|-4|pin@32||-2.5|0|ART_color()I10
AThicker|net@23|||FS1800|pin@35||2.5|-4|pin@34||3|-4|ART_color()I10
AThicker|net@24|||FS900|pin@36||2.5|0|pin@35||2.5|-4|ART_color()I10
AThicker|net@25|||FS1800|pin@37||2.25|0|pin@36||2.5|0|ART_color()I10
AThicker|net@26|||FS1800|pin@38||2.25|-4|pin@35||2.5|-4|ART_color()I10
AThicker|net@27|||FS0|pin@39||-2.25|-4|pin@33||-2.5|-4|ART_color()I10
AThicker|net@28|||FS0|pin@40||-2.25|0|pin@32||-2.5|0|ART_color()I10
Ed||D5G1;|pin@2||O
Eg||D5G1;|pin@1||I
Eg2||D5G1;|pin@0||I
X

# Cell pms2_sy;1{sch}
Cpms2_sy;1{sch}||schematic|1021415734000|1157998674545||ATTR_Delay(D5G1;HNPX-20;Y-10.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-20.5;Y-9.5;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-13|-1||||
NOff-Page|conn@1||23.5|-1|||YRR|
NOff-Page|conn@2||21|-11||||
Ngeneric:Invisible-Pin|pin@0||-2.5|9|||||ART_message(D5G2;)S[symmetric fixed-size P-type two-stack]
Ngeneric:Invisible-Pin|pin@1||-2|14|||||ART_message(D5G6;)S[pms2_sy]
NWire_Pin|pin@2||0.5|-1||||
NWire_Pin|pin@3||4.5|-5||||
NWire_Pin|pin@4||4.5|-1||||
NWire_Pin|pin@5||0.5|-5||||
NWire_Pin|pin@6||-4|-11||||
NWire_Pin|pin@7||10|-11||||
Ipms2;1{ic}|pms2@0||-4|-1|||D0G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y1;)S@X/2.0
Ipms2;1{ic}|pms2@1||10|-1|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5G1.5;NOLPX2.25;Y1;)S@X/2.0
Ipms2_sy;1{ic}|pms2_sy@0||31|12|||D0G4;|ATTR_Delay(D5G1;NPX-5;Y-1.5;)I100|ATTR_X(D5G1.5;NOLPX4;Y2;)S1
Awire|net@0|||0|conn@1|y|21.5|-1|pms2@1|g|13|-1
Awire|net@1|||1800|conn@0|y|-11|-1|pms2@0|g|-7|-1
Awire|net@2|||0|pin@2||0.5|-1|pms2@0|g|-7|-1
Awire|net@3|||3150|pin@3||4.5|-5|pin@2||0.5|-1
Awire|net@4|||0|pms2@1|g2|7|-5|pin@3||4.5|-5
Awire|net@5|||1800|pin@4||4.5|-1|pms2@1|g|13|-1
Awire|net@6|||2250|pin@5||0.5|-5|pin@4||4.5|-1
Awire|net@7|||1800|pms2@0|g2|-1|-5|pin@5||0.5|-5
Awire|net@8|||2700|pin@6||-4|-11|pms2@0|d|-4|-7
Awire|net@9|||0|pin@7||10|-11|pin@6||-4|-11
Awire|net@10|||900|pms2@1|d|10|-7|pin@7||10|-11
Awire|net@11|||1800|pin@7||10|-11|conn@2|a|19|-11
Ed||D5G2;|conn@2|y|O
Eg||D5G2;|conn@0|a|I
Eg2||D5G2;|conn@1|a|I
X

# Cell pms2a;2{ic}
Cpms2a;2{ic}|pms2|artwork|1021415734000|1228434146914|E|ATTR_Delay(D5G1;HNPX-3;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.25;Y1;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-2|0|1|1|||ART_color()I10
NThick-Circle|art@2||-2|-4|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||-3|0|-2|-2||
Nschematic:Bus_Pin|pin@1||0|-6|-2|-2||
Nschematic:Bus_Pin|pin@2||-3|-4|-2|-2||
NPin|pin@3||0|1|1|1||
NPin|pin@4||-0.75|1|1|1||
NPin|pin@5||-0.75|-1|1|1||
NPin|pin@6||0|-1|1|1|YRR|
NPin|pin@7||0|-2|1|1|YRR|
NPin|pin@8||-3|0|||RR|
NPin|pin@9||-2.5|0|1|1|RR|
NPin|pin@10||0|2|1|1||
NPin|pin@11||-0.5|2.5||||
NPin|pin@12||0.5|1.5|1|1||
NPin|pin@13||-1.5|-1|1|1||
NPin|pin@14||-1.5|1|1|1||
NPin|pin@15||-1.5|-3|1|1|YRR|
NPin|pin@16||-1.5|-5|1|1|YRR|
NPin|pin@17||0|-2|1|1|YRR|
NPin|pin@18||-3|-4|||RR|
NPin|pin@19||-2.5|-4|1|1|RR|
NPin|pin@20||0|-6|||RR|
NPin|pin@21||0|-5|1|1|YRR|
NPin|pin@22||-0.75|-5|1|1|YRR|
NPin|pin@23||-0.75|-3|1|1|YRR|
NPin|pin@24||0|-3|1|1|YRR|
AThicker|net@0|||FS900|pin@14||-1.5|1|pin@13||-1.5|-1|ART_color()I10
AThicker|net@1|||FS0|pin@3||0|1|pin@4||-0.75|1|ART_color()I10
AThicker|net@2|||FS2700|pin@3||0|1|pin@10||0|2|ART_color()I10
AThicker|net@3|||FS1800|pin@8||-3|0|pin@9||-2.5|0|ART_color()I10
AThicker|net@4|||FS1800|pin@5||-0.75|-1|pin@6||0|-1|ART_color()I10
AThicker|net@5|||FS900|pin@6||0|-1|pin@7||0|-2|ART_color()I10
AThicker|net@6|||FS900|pin@4||-0.75|1|pin@5||-0.75|-1|ART_color()I10
AThicker|net@7|||FS3150|pin@12||0.5|1.5|pin@11||-0.5|2.5|ART_color()I10
AThicker|net@8|||FS2700|pin@24||0|-3|pin@17||0|-2|ART_color()I10
AThicker|net@9|||FS0|pin@24||0|-3|pin@23||-0.75|-3|ART_color()I10
AThicker|net@10|||FS900|pin@15||-1.5|-3|pin@16||-1.5|-5|ART_color()I10
AThicker|net@11|||FS0|pin@19||-2.5|-4|pin@18||-3|-4|ART_color()I10
AThicker|net@12|||FS1800|pin@22||-0.75|-5|pin@21||0|-5|ART_color()I10
AThicker|net@13|||FS900|pin@21||0|-5|pin@20||0|-6|ART_color()I10
AThicker|net@14|||FS900|pin@23||-0.75|-3|pin@22||-0.75|-5|ART_color()I10
Ed||D5G1;|pin@1||O
Eg||D5G1;|pin@0||I
Eg2||D5G1;|pin@2||I
X

# Cell pms3;1{ic}
Cpms3;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX-3;Y-1;)I100|ATTR_X(D5G1.5;HNPX2.75;Y3;)I1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-2|-8|1|1|||ART_color()I10
NThick-Circle|art@2||2|-4|1|1|||ART_color()I10
NThick-Circle|art@3||-2|0|1|1|||ART_color()I10
NPin|pin@0||0|-10|0.5|0.5||
NPin|pin@1||-2.5|-8|||RR|
NPin|pin@2||-3|-8|1|1|RR|
NPin|pin@3||-1.5|-7|1|1|YRR|
NPin|pin@4||-1.5|-9|1|1|YRR|
NPin|pin@5||0|-9|0.5|0.5||
NPin|pin@6||-0.75|-9|0.5|0.5||
NPin|pin@7||-0.75|-7|0.5|0.5||
Ngeneric:Invisible-Pin|pin@8||-3|-8||||
NPin|pin@9||0|-3|1|1|YRR|
NPin|pin@10||0.75|-3|1|1|YRR|
NPin|pin@11||0.75|-5|1|1|YRR|
NPin|pin@12||0|-5|1|1|YRR|
NPin|pin@13||0|-7|||RR|
NPin|pin@14||2.5|-4|1|1|RR|
NPin|pin@15||3|-4|||RR|
NPin|pin@16||0|-2|1|1|YRR|
NPin|pin@17||1.5|-5|1|1|YRR|
NPin|pin@18||1.5|-3|1|1|YRR|
NPin|pin@19||-1.5|1|1|1||
NPin|pin@20||-1.5|-1|1|1||
NPin|pin@21||0.5|1.5|1|1||
NPin|pin@22||-0.5|2.5||||
NPin|pin@23||0|2|1|1||
NPin|pin@24||-2.5|0|1|1|RR|
NPin|pin@25||-3|0|||RR|
NPin|pin@26||0|-2|1|1|YRR|
NPin|pin@27||0|-1|1|1|YRR|
NPin|pin@28||-0.75|-1|1|1||
NPin|pin@29||-0.75|1|1|1||
NPin|pin@30||0|1|1|1||
Nschematic:Bus_Pin|pin@31||3|-4|-2|-2||
Nschematic:Bus_Pin|pin@32||0|-10|-2|-2||
Nschematic:Bus_Pin|pin@33||-3|0|-2|-2||
AThicker|net@0|||FS2700|pin@0||0|-10|pin@5||0|-9|ART_color()I10
AThicker|net@1|||FS1800|pin@2||-3|-8|pin@1||-2.5|-8|ART_color()I10
AThicker|net@2|||FS900|pin@3||-1.5|-7|pin@4||-1.5|-9|ART_color()I10
AThicker|net@3|||FS0|pin@5||0|-9|pin@6||-0.75|-9|ART_color()I10
AThicker|net@4|||FS2700|pin@6||-0.75|-9|pin@7||-0.75|-7|ART_color()I10
AThicker|net@5|||FS1800|pin@7||-0.75|-7|pin@13||0|-7|ART_color()I10
AThicker|net@6|||FS900|pin@10||0.75|-3|pin@11||0.75|-5|ART_color()I10
AThicker|net@7|||FS900|pin@12||0|-5|pin@13||0|-7|ART_color()I10
AThicker|net@8|||FS0|pin@11||0.75|-5|pin@12||0|-5|ART_color()I10
AThicker|net@9|||FS1800|pin@14||2.5|-4|pin@15||3|-4|ART_color()I10
AThicker|net@10|||FS900|pin@18||1.5|-3|pin@17||1.5|-5|ART_color()I10
AThicker|net@11|||FS1800|pin@9||0|-3|pin@10||0.75|-3|ART_color()I10
AThicker|net@12|||FS2700|pin@9||0|-3|pin@16||0|-2|ART_color()I10
AThicker|net@13|||FS3150|pin@21||0.5|1.5|pin@22||-0.5|2.5|ART_color()I10
AThicker|net@14|||FS900|pin@29||-0.75|1|pin@28||-0.75|-1|ART_color()I10
AThicker|net@15|||FS900|pin@27||0|-1|pin@26||0|-2|ART_color()I10
AThicker|net@16|||FS1800|pin@28||-0.75|-1|pin@27||0|-1|ART_color()I10
AThicker|net@17|||FS1800|pin@25||-3|0|pin@24||-2.5|0|ART_color()I10
AThicker|net@18|||FS2700|pin@30||0|1|pin@23||0|2|ART_color()I10
AThicker|net@19|||FS0|pin@30||0|1|pin@29||-0.75|1|ART_color()I10
AThicker|net@20|||FS900|pin@19||-1.5|1|pin@20||-1.5|-1|ART_color()I10
Ed||D5G1;|pin@32||O
Eg||D5G1;|pin@33||I
Eg2||D5G1;|pin@31||I
Eg3||D5G1;|pin@8||I
X

# Cell pms3;1{sch}
Cpms3;1{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-12;Y8;)I100|ATTR_X(D5G1;HNPX-12.25;Y9;)I1|prototype_center()I[0,0]
IPMOS;1{ic}|PMOS@3||0|-1|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X*3.0
IPMOS;1{ic}|PMOS@4||0|7|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X*3.0
IPMOS;1{ic}|PMOS@5||0|15|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X*3.0
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-8.5|-1||||
NOff-Page|conn@1||8.5|7|||YRR|
NOff-Page|conn@2||8|-10.5||||
NOff-Page|conn@3||-8.5|15||||
Ngeneric:Invisible-Pin|pin@0||-1|26|||||ART_message(D5G2;)S[three fixed-size P-type transistors to VDD]
Ngeneric:Invisible-Pin|pin@1||-1|31|||||ART_message(D5G6;)S[pms3]
NWire_Pin|pin@2||0|-10.5||||
Ipms3;1{ic}|pms3@0||28|22.38|||D0G4;|ATTR_Delay(D5G1;NPX-3;Y-1;)I100|ATTR_X(D5G1.5;NPX2.75;Y3;)I1
Ipms3a;1{ic}|pms3a@0||27.5|5.5|||D5G4;|ATTR_Delay(D5G1;NPX-12;Y12;)I100|ATTR_X(D5G1;NPX-12.25;Y13;)I1
NPower|pwr@0||0|22||||
Awire|net@0|||2700|pin@2||0|-10.5|PMOS@3|d|0|-3
Awire|net@1|||0|PMOS@3|g|-3|-1|conn@0|y|-6.5|-1
Awire|net@2|||2700|PMOS@3|s|0|1|PMOS@4|d|0|5
Awire|net@3|||1800|pin@2||0|-10.5|conn@2|a|6|-10.5
Awire|net@4|||0|conn@1|y|6.5|7|PMOS@4|g|3|7
Awire|net@5|||2700|PMOS@4|s|0|9|PMOS@5|d|0|13
Awire|net@6|||1800|conn@3|y|-6.5|15|PMOS@5|g|-3|15
Awire|net@7|||900|pwr@0||0|22|PMOS@5|s|0|17
Ed||D5G2;|conn@2|y|O
Eg||D5G2;|conn@3|a|I
Eg2||D5G2;|conn@1|a|I
Eg3||D5G2;|conn@0|a|I
X

# Cell pms3a;1{ic}
Cpms3a;1{ic}|pms3|artwork|1021415734000|1228702104316|E|ATTR_Delay(D5G1;HNPX-12;Y8;)I100|ATTR_X(D5G1;HNPX-12.25;Y9;)I1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-2|-8|1|1|||ART_color()I10
NThick-Circle|art@2||2|-4|1|1|||ART_color()I10
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
NPin|pin@0||0|-10|0.5|0.5||
NPin|pin@1||-2.5|-8|||RR|
NPin|pin@2||-3|-8|1|1|RR|
NPin|pin@3||-1.5|-7|1|1|YRR|
NPin|pin@4||-1.5|-9|1|1|YRR|
NPin|pin@5||0|-9|0.5|0.5||
NPin|pin@6||-0.75|-9|0.5|0.5||
NPin|pin@7||-0.75|-7|0.5|0.5||
Ngeneric:Invisible-Pin|pin@8||-3|-8||||
NPin|pin@9||0|-3|1|1|YRR|
NPin|pin@10||0.75|-3|1|1|YRR|
NPin|pin@11||0.75|-5|1|1|YRR|
NPin|pin@12||0|-5|1|1|YRR|
NPin|pin@13||0|-7|||RR|
NPin|pin@14||2.5|-4|1|1|RR|
NPin|pin@15||3|-4|||RR|
NPin|pin@16||0|-2|1|1|YRR|
NPin|pin@17||1.5|-5|1|1|YRR|
NPin|pin@18||1.5|-3|1|1|YRR|
NPin|pin@19||1.5|1|1|1||
NPin|pin@20||1.5|-1|1|1||
NPin|pin@21||0.5|1.5|1|1||
NPin|pin@22||-0.5|2.5||||
NPin|pin@23||0|2|1|1||
NPin|pin@24||3|0|1|1|RR|
NPin|pin@25||2.5|0|||RR|
NPin|pin@26||0|-2|1|1|YRR|
NPin|pin@27||0|-1|1|1|YRR|
NPin|pin@28||0.75|-1|1|1||
NPin|pin@29||0.75|1|1|1||
NPin|pin@30||0|1|1|1||
Nschematic:Bus_Pin|pin@31||3|-4|-2|-2||
Nschematic:Bus_Pin|pin@32||0|-10|-2|-2||
Nschematic:Bus_Pin|pin@33||3|0|-2|-2||
AThicker|net@0|||FS2700|pin@0||0|-10|pin@5||0|-9|ART_color()I10
AThicker|net@1|||FS1800|pin@2||-3|-8|pin@1||-2.5|-8|ART_color()I10
AThicker|net@2|||FS900|pin@3||-1.5|-7|pin@4||-1.5|-9|ART_color()I10
AThicker|net@3|||FS0|pin@5||0|-9|pin@6||-0.75|-9|ART_color()I10
AThicker|net@4|||FS2700|pin@6||-0.75|-9|pin@7||-0.75|-7|ART_color()I10
AThicker|net@5|||FS1800|pin@7||-0.75|-7|pin@13||0|-7|ART_color()I10
AThicker|net@6|||FS900|pin@10||0.75|-3|pin@11||0.75|-5|ART_color()I10
AThicker|net@7|||FS900|pin@12||0|-5|pin@13||0|-7|ART_color()I10
AThicker|net@8|||FS0|pin@11||0.75|-5|pin@12||0|-5|ART_color()I10
AThicker|net@9|||FS1800|pin@14||2.5|-4|pin@15||3|-4|ART_color()I10
AThicker|net@10|||FS900|pin@18||1.5|-3|pin@17||1.5|-5|ART_color()I10
AThicker|net@11|||FS1800|pin@9||0|-3|pin@10||0.75|-3|ART_color()I10
AThicker|net@12|||FS2700|pin@9||0|-3|pin@16||0|-2|ART_color()I10
AThicker|net@13|||FS3150|pin@21||0.5|1.5|pin@22||-0.5|2.5|ART_color()I10
AThicker|net@14|||FS900|pin@29||0.75|1|pin@28||0.75|-1|ART_color()I10
AThicker|net@15|||FS900|pin@27||0|-1|pin@26||0|-2|ART_color()I10
AThicker|net@16|||FS0|pin@28||0.75|-1|pin@27||0|-1|ART_color()I10
AThicker|net@17|||FS1800|pin@25||2.5|0|pin@24||3|0|ART_color()I10
AThicker|net@18|||FS2700|pin@30||0|1|pin@23||0|2|ART_color()I10
AThicker|net@19|||FS1800|pin@30||0|1|pin@29||0.75|1|ART_color()I10
AThicker|net@20|||FS900|pin@19||1.5|1|pin@20||1.5|-1|ART_color()I10
Ed||D5G1;|pin@32||O
Eg||D5G1;|pin@33||I
Eg2||D5G1;|pin@31||I
Eg3||D5G1;|pin@8||I
X

# Cell triInv;1{ic}
CtriInv;1{ic}||artwork|1092081409000|1204140525662|E|ATTR_Delay(D5G1;HNPX3.5;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.5;Y2;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||0|1.25|0.5|0.5|||ART_color()I10
NThick-Circle|art@3||2|0|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||0|-2||||
Nschematic:Bus_Pin|pin@2||0|2||||
Nschematic:Bus_Pin|pin@4||-2.5|0||||
Nschematic:Bus_Pin|pin@6||2.5|0||||
NPin|pin@15||1.5|0|1|1||
NPin|pin@17||-1.5|0|1|1||
NPin|pin@18||-2.5|0||||
NPin|pin@20||-1.5|2|1|1||
NPin|pin@21||-1.5|-2|1|1||
NPin|pin@22||0|-1|1|1||
NPin|pin@23||0|-2|1|1||
NPin|pin@24||0|2|1|1||
NPin|pin@25||0|1.5|1|1||
AThicker|net@8|||FS3263|pin@15||1.5|0|pin@20||-1.5|2|ART_color()I10
AThicker|net@9|||FS337|pin@15||1.5|0|pin@21||-1.5|-2|ART_color()I10
AThicker|net@10|||FS0|pin@17||-1.5|0|pin@18||-2.5|0|ART_color()I10
AThicker|net@11|||FS2700|pin@21||-1.5|-2|pin@20||-1.5|2|ART_color()I10
AThicker|net@12|||FS2700|pin@23||0|-2|pin@22||0|-1|ART_color()I10
AThicker|net@13|||FS2700|pin@25||0|1.5|pin@24||0|2|ART_color()I10
Een||D5G1;|pin@0||I
EenB||D5G1;|pin@2||I
Ein||D5G1;|pin@4||I
Eout||D5G1;|pin@6||O
X

# Cell triInv;1{sch}
CtriInv;1{sch}||schematic|1092081210000|1157998403442||ATTR_Delay(D5G1;HNPX-12;Y-7;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-12;Y-5;)S1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-13|0||||
NOff-Page|conn@1||12|0||||
NOff-Page|conn@2||12|4|||RR|
NOff-Page|conn@3||12|-4|||RR|
Inms2b;1{ic}|nms2@0||0|-8|||D5G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2.25;Y1.5;)S@X
NWire_Pin|pin@1||-6|0||||
NWire_Pin|pin@2||-6|8||||
NWire_Pin|pin@3||-6|-8||||
NWire_Pin|pin@4||0|0||||
Ngeneric:Invisible-Pin|pin@5||-4|17|||||ART_message(D5G5;)StriInv
Ngeneric:Invisible-Pin|pin@6||-4|13|||||ART_message(D5G2;)Stristate inverter
Ipms2;1{ic}|pms2@0||0|8|||D5G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y1;)S@X
ItriInv;1{ic}|triInv@2||11|14|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2;)S1
Awire|net@0|||2700|nms2@0|d|0|-2|pin@4||0|0
Awire|net@1|||1800|conn@0|y|-11|0|pin@1||-6|0
Awire|net@2|||2700|pin@1||-6|0|pin@2||-6|8
Awire|net@3|||1800|pin@2||-6|8|pms2@0|g|-3|8
Awire|net@4|||900|pin@1||-6|0|pin@3||-6|-8
Awire|net@5|||1800|pin@3||-6|-8|nms2@0|g|-3|-8
Awire|net@6|||0|conn@3|y|10|-4|nms2@0|g2|3|-4
Awire|net@7|||0|conn@2|y|10|4|pms2@0|g2|3|4
Awire|net@9|||0|conn@1|a|10|0|pin@4||0|0
Awire|net@10|||2700|pin@4||0|0|pms2@0|d|0|2
Een||D5G2;|conn@3|a|I
EenB||D5G2;|conn@2|a|I
Ein||D5G2;|conn@0|a|I
Eout||D5G2;|conn@1|y|O
X

# Cell xor2;1{ic}
Cxor2;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX2.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX2.25;Y2.25;)S1|ATTR_drive0(D5G1;HPT)Sstrong0|ATTR_drive1(D5G1;HPT)Sstrong1|prototype_center()I[6000,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NThick-Circle|art@1||-1.5|-2|8|7|YRRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@2||-1.5|2|8|7|RRR||ART_color()I10|ART_degrees()F[0.0,1.0471976]
NThick-Circle|art@3||-3.75|0|6|6|3200||ART_color()I10|ART_degrees()I800
NThick-Circle|art@4||-4.5|0|6|6|3200||ART_color()I10|ART_degrees()I800
NThick-Circle|art@5||-2|0.5|1|1|||ART_color()I10
NThick-Circle|art@6||-2.5|-1.5|1|1|||ART_color()I10
Nschematic:Bus_Pin|pin@0||-3.5|-0.5|-2|-2||
NPin|pin@1||-1.5|-0.5|1|1||
NPin|pin@2||-3.5|-0.5||||
Nschematic:Bus_Pin|pin@3||-3.5|1.5|-2|-2||
Nschematic:Bus_Pin|pin@4||1.5|0|-2|-2||
NPin|pin@5||-3.5|0.5||||
NPin|pin@6||-2.5|0.5|1|1||
NPin|pin@7||-1|-1.25|1|1||
NPin|pin@8||-0.5|-1.75|1|1||
NPin|pin@9||-2|1.5|1|1||
NPin|pin@10||-3.5|1.5||||
Ngeneric:Invisible-Pin|pin@11||-3.5|0.5||||
NPin|pin@12||-3.5|-1.5||||
NPin|pin@13||-3|-1.5|1|1||
Ngeneric:Invisible-Pin|pin@14||-3.5|-1.5||||
AThicker|net@0|||FS0|pin@1||-1.5|-0.5|pin@2||-3.5|-0.5|ART_color()I10
AThicker|net@1|||FS0|pin@6||-2.5|0.5|pin@5||-3.5|0.5|ART_color()I10
AThicker|net@2|||FS3150|pin@8||-0.5|-1.75|pin@7||-1|-1.25|ART_color()I10
AThicker|net@3|||FS0|pin@9||-2|1.5|pin@10||-3.5|1.5|ART_color()I10
AThicker|net@4|||FS0|pin@13||-3|-1.5|pin@12||-3.5|-1.5|ART_color()I10
Eina||D5G1;|pin@0||I
EinaB||D5G1;|pin@14||I
Einb||D5G1;|pin@3||I
EinbB||D5G1;|pin@11||I
Eout||D5G1;|pin@4||O
X

# Cell xor2;1{sch}
Cxor2;1{sch}||schematic|1021415734000|1157998393633||ATTR_Delay(D5G1;HNPX-22;Y-13.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-22;Y-12.5;)S1|ATTR_drive0(D5G1;HNPTX-22;Y-14.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-22;Y-15.5;)Sstrong1|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-17|4||||
NOff-Page|conn@1||-17|-4|||Y|
NOff-Page|conn@2||12|0||||
NOff-Page|conn@3||25|-4|||RR|
NOff-Page|conn@4||25|4|||YRR|
Inms2b;1{ic}|nms2@0||-5|-12|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2.25;Y1.5;)S@X
Inms2b;1{ic}|nms2@1||5|-12|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2.25;Y1.5;)S@X
NWire_Pin|pin@0||-10|-8||||
Ngeneric:Invisible-Pin|pin@1||-3|18|||||ART_message(D5G2;)S[one-parameter fixed-size XOR]
NWire_Pin|pin@2||-12|10||||
NWire_Pin|pin@3||-12|-4||||
Ngeneric:Invisible-Pin|pin@4||0.5|24.5|||||ART_message(D5G6;)S[xor2]
NWire_Pin|pin@5||-10|8||||
NWire_Pin|pin@6||-5|0||||
NWire_Pin|pin@7||-5|3.5||||
NWire_Pin|pin@8||5|0||||
NWire_Pin|pin@9||-10|4||||
NWire_Pin|pin@10||18|4||||
NWire_Pin|pin@11||18|-8||||
NWire_Pin|pin@12||-12|-12||||
NWire_Pin|pin@13||20|-4||||
NWire_Pin|pin@14||20|-12||||
NWire_Pin|pin@15||20|10||||
NWire_Pin|pin@16||18|8||||
NWire_Pin|pin@17||-1|10||||
NWire_Pin|pin@18||1|12||||
NWire_Pin|pin@19||1|10||||
NWire_Pin|pin@20||-1|12||||
Ipms2;1{ic}|pms2@0||-5|12|||D0G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y1;)S@X
Ipms2;1{ic}|pms2@1||5|12|||D0G4;|ATTR_Delay(D5G1;NOJPX-3;Y-1.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y1;)S@X
Ixor2;1{ic}|xor2@0||28.48|18.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y2.25;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Awire|net@0|||2700|pin@3||-12|-4|pin@2||-12|10
Awire|net@1|||0|pin@3||-12|-4|conn@1|y|-15|-4
Awire|net@2|||2700|pin@6||-5|0|pms2@0|d|-5|6
Awire|net@3|||2700|pin@6||-5|0|pin@7||-5|3.5
Awire|net@4|||900|pin@7||-5|3.5|nms2@0|d|-5|-6
Awire|net@5|||1800|pin@8||5|0|conn@2|a|10|0
Awire|net@6|||1800|pin@6||-5|0|pin@8||5|0
Awire|net@7|||900|pin@8||5|0|nms2@1|d|5|-6
Awire|net@8|||2700|pin@0||-10|-8|pin@9||-10|4
Awire|net@9|||2700|pin@9||-10|4|pin@5||-10|8
Awire|net@10|||0|pin@9||-10|4|conn@0|y|-15|4
Awire|net@11|||0|nms2@0|g2|-2|-8|pin@0||-10|-8
Awire|net@12|||1800|pin@10||18|4|conn@4|y|23|4
Awire|net@13|||2700|pin@11||18|-8|pin@10||18|4
Awire|net@14|||1800|nms2@1|g2|8|-8|pin@11||18|-8
Awire|net@15|||2700|pin@12||-12|-12|pin@3||-12|-4
Awire|net@16|||0|nms2@0|g|-8|-12|pin@12||-12|-12
Awire|net@17|||1800|pin@13||20|-4|conn@3|y|23|-4
Awire|net@18|||2700|pin@14||20|-12|pin@13||20|-4
Awire|net@19|||1800|nms2@1|g|2|-12|pin@14||20|-12
Awire|net@20|||900|pin@15||20|10|pin@13||20|-4
Awire|net@21|||0|pms2@0|g2|-2|8|pin@5||-10|8
Awire|net@22|||2700|pin@8||5|0|pms2@1|d|5|6
Awire|net@23|||900|pin@16||18|8|pin@10||18|4
Awire|net@24|||1800|pms2@1|g2|8|8|pin@16||18|8
Awire|net@25|||0|pin@17||-1|10|pin@2||-12|10
Awire|net@26|||450|pin@18||1|12|pin@17||-1|10
Awire|net@27|||0|pms2@1|g|2|12|pin@18||1|12
Awire|net@28|||1800|pin@19||1|10|pin@15||20|10
Awire|net@29|||1350|pin@20||-1|12|pin@19||1|10
Awire|net@30|||1800|pms2@0|g|-8|12|pin@20||-1|12
Eina||D5G2;|conn@0|a|I
EinaB||D5G2;|conn@4|a|I
Einb||D5G2;|conn@1|a|I
EinbB||D5G2;|conn@3|a|I
Eout||D5G2;|conn@2|y|O
X