chips/omegaCounter/40nm/test.spi

   1 * Self loaded min geometry inverter, sample HSPICE file
   2
   3 * Include the model files
   4
   5 * Include the hspice model files for 0.18u technology.
   6
   7 ******************************************************************
   8 * Set Process, Voltage and Temperature corner
   9 ******************************************************************
  10
  11 .protect
  12
  13 * 90nm
  14 *.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT
  15 *.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_RES
  16 *.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_18
  17 *.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_na18
  18 *.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_DIO_esd
  19 *.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_DIO_18
  20
  21 * 40nm
  22 .lib '/import/async/cad/process/tsmcsun045/sun_spice_models/1.01/models/toplevel_cln40gp.l' TOP_TT
  23
  24 .unprotect
  25
  26
  27 .param sup=0.9    * Supply voltage
  28 .temp 80          * Temperature
  29
  30 ******************************************************************
  31 * Standard Parameters and Options
  32 ******************************************************************
  33
  34 .param vsupply=sup
  35 .param vhi=sup
  36 .param vlo=0
  37 .param strong0=0 * Used in verilog, just needs to be defined to run hspice
  38 .param strong1=1 * Used in verilog, just needs to be defined to run hspice
  39
  40 .options ACCT OPTS post
  41 *.option post probe
  42 * .opt scale=0.05u
  43 .op
  44
  45 .param AVT0N = AGAUSS(0.0,  '0.01 / 0.1' , 1)
  46 .param AVT0P = AGAUSS(0.0,  '0.01 / 0.1' , 1)
  47 .param ABN = AGAUSS(0.0,  '0.02 / 0.1' , 1)
  48 .param ABP = AGAUSS(0.0,  '0.02 / 0.1' , 1)
  49
  50 .post=3
  51
  52 .include 'omegaCounter.spi'
  53
  54 .tran 1n 400n
  55
  56 .end
  57